ee 5316_phase locked loop_arch

8/8/2019 EE 5316_Phase Locked Loop_arch

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- Anjan Govindaraju

- Sharath Patil



PLL Design Spec

Design of a CMOS phase locked loop with +2.5 V power supplies

using 0.25um technology.

Schematic design and layout to be performed in Cadence.

Frequency Tuning

Range

Lock

Time

Power

dissipation

Current

Density

Min.

GateWidth

Min.

GateLength

2.4 GHz 1.9 ²2.9

GHz

Less than 5us

Less than 300mW

Less than

600

uA/um2

0.3um 0.3um



PLL - Circuit synchronizing an output signal (generated by an oscillator)with a reference signal.

Locked state - Phase error between the oscillator and the reference signal is

zero.

Applications - Jitter Reduction, Skew Reduction and Frequency Synthesis.

Introduction

Reference

FrequencyOutput

signalPhase

Detector

Loop

Filter

Voltage

Controlled Oscillator

VCO output



PLL types

a) Linear PLL (LPLL) :-

Analog multiplier (Mixer) is used as the phase detector.

Passive or Active RC filter is used as the loop filter.

MultiplierLoop

FilterVCO

VCO output

Output

signalReference

Frequency



b) Digital PLL :-

Digital

PD

Analog

LFVCO

Reference

Frequency

VCO output

Output

signal

÷ N

counter

Phase Detector is digital while the loop filter and VCO are still

analog (also called as a semi-analog circuit).

Some of the DPLL applications include Frequency Synthesizers

which incorporate a ³÷N counter´ inserted between VCO and PD.

VCO frequency = N * Reference frequency.



Digital

PD

Digital

LFDCO

Reference

Frequency

VCO output

Output

signal

÷ N

counter

c) All-Digital PLL

All the components are digital ± So a Digitally controlled

oscillator (DCO) is used instead of a VCO.

Digital loop filter is implemented either in digital circuitry or it

can be made programmable.

The signals within the system are digital too.



Phase Detectors

Mixer Phase detectors ± Double balanced mixers (four-diode ring mixer)

are used; Passive (diodes) detectors provide better DC stability than the

active counterparts and are suitable for low-noise designs. Simple but

incapable of frequency discrimination.

Sampling Phase Detectors - Used in frequency synthesizers where the

output frequency is an integral multiple of the input. Useful for high

frequency PLL applications where optimum phase noise is a requirement,

but requires an external circuitry to bring the circuit into lock range.

XOR phase detectors ± Advantageous when a high frequency VCO is to

be locked to a low frequency reference. Very low gain and an external

circuitry to initially achieve lock.

Phase frequency detectors with charge pump.



Phase-Frequency detectors with Charge pump

Phase Frequency Detector

Phase Frequency Detector with Charge Pump

CHARGE PUMP



Circuits which detect Phase and frequency prove useful as they increase

the acquisition range and lock speed of PLLs.

Output of other phase detectors don¶t give the information whether the

VCO is too high or too low in frequency.

Two D-Flip flops are used with their data inputs (D - input) tied ³high´and their clock inputs given the reference and VCO frequencies,

respectively. Their outputs are fed to the charge pump circuit.

Outputs of the flip-flops turn on the current sources which source or sink

currents to the capacitor (of the loop filter). This ramps up or down the

capacitor output voltage.

If VCO frequency is higher than the reference frequency the output will go

to the positive voltage limit and vice-versa. If both are equal, output is

proportional to the phase difference.

Phase-Frequency detectors with Charge pump



Loop Filter

C p is the capacitor used in the Loop Filter.

R is the resistor used to add a µzero¶ to the circuit in order to provide stability.

Loop Filter



VCO

PLL requires that oscillators be ³tunable´ , i.e., output frequency be

linearly proportional to control input (voltage).

VCOs can be implemented either as Ring oscillators or LC oscillators.

The characteristic curve of a VCO can be represented as :

out = 0 + K

VCO* Vcont

2 - 1 = Tuning range



Voltage Controlled R ing oscillators

It consists of odd number of Inverters whose output oscillates between

two voltage levels

Inverters are connected in the form of a µring¶; the output of the last

inverter is fed back into the first.

Frequency is controlled by varying the voltage of the current sources.



LC oscillator

An LC circuit consists of an inductor and a capacitor which form the

tank circuit.

An electric current alternates between them at the circuit's resonant

frequency.



Even though LC VCO has a superior phase noise performance it has a

few drawbacks such as Small Tuning Range, Large Layout Area and

Higher Power Consumption.

Due to Design simplicity and Cost effectiveness, a ring VCO is preferredover LC VCO.

Also they have a Wider Tuning Range than LC VCO.

Why Ring oscillators are preferred over LC«



Phase

Frequency

Detector

Loop

Filter

Voltage

Controlled

Oscillator

VCOoutput

Charge

Pump

Output

signal

Reference

Frequency

Summary ± Final Architecture



References

1. ³Design of Analog CMOS integrated circuits´, Behzad Razavi,Tata

McGraw Hill edition.

2. ³RF Microelectronics ,́ Behzad Razavi, Prentice Hall Inc.

3. ³Radio Frequency Circuit Design´, W.Alan Davis, Krishna Agarwal,John Wiley and Sons Inc.

4. ³Comparison of LC and Ring VCOs for PLLs in a 90 nm Digital CMOS

Process´, Ming-ta Hsieh, Gerald E. Sobelman, 2006.

5. ³Voltage Controlled Ring Oscillator with Wide Tuning Range and Fast

Voltage Swing ́ , Nicodimus Retdian, Shigetaka Takagi, Nobuo Fujii,

2002.

6. ³The design of Low noise oscillators ,́ Ali Hajmiri, Thomas H Lee,

2004.



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ee 5316_phase locked loop_arch

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