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EE105 – Fall 2015 Microelectronic Devices and Circuits

Prof. Ming C. Wu

wu@eecs.berkeley.edu

511 Sutardja Dai Hall (SDH)

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Why Differential?

•  Differential circuits are much less sensitive to noises and interferences

•  Differential configuration enables us to bias amplifiers and connect multiple stages without using coupling or bypass capacitors

•  Differential amplifiers are widely used in IC’s –  Excellent matching of transistors, which is critical for

differential circuits –  Differential circuits require more transistors à not an

issue for IC

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MOS Differential-Pair Basic Configuration Two matched MOS transistors

Common current bias"Differential signls" applied to vG1 and vG2

(equal amplitude but opposite sign)"Differential outputs" are produced at vD1 and vD2

Note in differential configuration, VGS is fixed for both Q1 and Q2

ID1 = ID2 =I2

I2=kn2VGS −Vtn( )2

VGS =Vtn +Ikn

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MOS Differential-Pair Differential Pair

Rejects Common-Mode Inputs The common voltages applied to both Q1 and Q2 are referred to ascommon mode, VCM .Common mode inputs usually comefrom noises or interferences.Differential pair should reject VCM :

Since VGS1 =VGS2 =Vtn +Ikn

is fixed in differential pair, VCM simply changes the voltage at Source, VS.The drain currents remain fixed:

I1 = I2 =I2

vD1 =VDD −I2RD = vD2

Differential output vD1 − vD2 = 0

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Example VDD=VSS=1.5V, I=0.4mA, RD=2.5kΩ. Minimum voltage across current source VCS=0.4V

For Q1 and Q2: kn=4mA/V2, Vtn=0.5V. Find VS, ID1, ID2, VD1, VD2 for 3 different VCM below:

Due to symmetry, ID1 = ID2 = I / 2 for all 3 VCM values

VGS =Vtn + I / kn = 0.5+ 0.32 = 0.82VVD1 =VD2 =VDD − 0.5I ⋅RD =1.5− 0.2×2.5=1VDifferential output VD1 −VD2 = 0

VS = 0−VGS= −0.82V

VS =1−VGS= 0.18V

VS = −0.2−VGS= −1.02V

Maximum VCM should keep Q1 and Q2 in SaturationVDS >VGS −Vtn; VD −VS >VG −VS −Vtn; VCM ,max =VG,max =VD +Vtn =1.5VMinimum VCM should keep VS above minimum current source voltage, VCSVCM ,min = −VSS +VCS,min +VGS = −1.5+ 0.82+ 0.4 = −0.28V

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Operation with Differential Input Voltage iD1 =

kn2vGS1 −Vt( )2 ; iD2 =

kn2vGS2 −Vt( )2

iD1 − iD2 =kn2

vGS1 − vGS2( ) = kn2vid

square both sides, and recall iD1 + iD2 = I

2 iD1iD2 = I −kn2vid

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substitute iD2 = I − iD1, solve quadratic equation:

iD1,2 =I2± knI

vid2

1− (vid / 2)2

I / knI2=

12knVOV

2 ⇒ kn = I /VOV2

iD1,2 =I2±

IVOV

vid2

1− (vid / 2)2

VOV2

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Operation with Differential Input Voltage

iD1,2 =I2±

IVOV

vid2

1− (vid / 2)2

VOV2

Near vid = 0 :

1− (vid / 2)2

VOV2 ≈1 (neglect high-order terms)

iD1 =I2+

IVOV

vid2

iD2 =I2−

IVOV

vid2

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The linear range of operation of the MOS differential pair can be extended by

operating the transistor at a higher value of VOV

iD1,2 =I2±

IVOV

vid2

1− (vid / 2)2

VOV2

Current of Differential Pair for Various Overdrive Voltage

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Small Signal Operation

vG1 =VCM +12vid; vG2 =VCM −

12vid

AC equivalent circuit

T-models vo1 = 0− gm (vid / 2)RD = −gmRDvid / 2vo2 = 0− gm (−vid / 2)RD = gmRDvid / 2Differential mode voltage gain:

Ad =vo2 − vo1

vid= gmRD

Output For differential AC small signal, the differential pair is “anti-symmetric”. The potential at the mid point (Source) is zero. This is called “Virtual Ground” This virtual ground is obtained without using a large bypass capacitor à much smaller area and better frequency response

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Differential Half Circuit

Q1 biased at I2

Ad =

vod2vid2

=vodvid

= gm RD || ro( )

Because the two halves of the circuitsare anti-symmetric, and Source is atvirtual ground, we can simplifed and just analyze the "half circuit"

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Differential Amplifier with Current-Source Loads

Q3 and Q4 are PMOS current sources(active loads)From half-circuit

Ad =vodvid

= gm1 ro1 || ro3( )

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Cascode configurations for bothamplifying transistors and currentsource loads.From half-circuit

Ad =vodvid

= gm1 Ron || Rop( )

Ron = gm3ro3( )ro1

Rop = gm5ro5( )ro7

If all transistors are identical,Ron = Rop = gmro

2

Ad =12gm

2 ro2

Cascode Differential Amplifier