EECS 362EECS 362Computer Architecture Computer Architecture

ProjectsProjectsLecture 1Lecture 1Instructor: Alok ChoudharyInstructor: Alok Choudhary

Co-instructor: Avery ChingCo-instructor: Avery Ching

OutliOutlinene

Course Overview Course Overview Administrative Matters Administrative Matters Course Structure Course Structure Recap of Pipeline ProcessorRecap of Pipeline Processor First Week’s AssignmentFirst Week’s Assignment

Course Course OverviewOverview

Course involves the design and evaluation of Course involves the design and evaluation of a pipelined processor: a pipelined processor: ISA designISA design Design and test of componentsDesign and test of components Design and test of datapath/controlDesign and test of datapath/control Evaluating for correctness and performance using Evaluating for correctness and performance using

benchmark programsbenchmark programs The target instruction set is a subset of the The target instruction set is a subset of the

DLX ISADLX ISA If you haven’t taken EECS 361 - If you haven’t taken EECS 361 - Drop the Drop the

class!class!

Course Course InformationInformation

Instructor: Professor Alok ChoudharyInstructor: Professor Alok Choudhary Room: L469 TechRoom: L469 Tech Phone: (847) 467-4129Phone: (847) 467-4129 E-mail: choudhar@ece.northwestern.eduE-mail: choudhar@ece.northwestern.edu Office Hours: TBDOffice Hours: TBD

Co-instructor: Avery ChingCo-instructor: Avery Ching Room: L460 TechRoom: L460 Tech Phone: (847) 467-2299Phone: (847) 467-2299 E-mail: aching@ece.northwestern.eduE-mail: aching@ece.northwestern.edu Office Hours: TBDOffice Hours: TBD

Teaching Assistant: Kenin ColomaTeaching Assistant: Kenin Coloma Room: L460 TechRoom: L460 Tech Phone: (847) 467-2299Phone: (847) 467-2299 E-mail: kcoloma@ece.northwestern.eduE-mail: kcoloma@ece.northwestern.edu Office Hours: TBDOffice Hours: TBD

Class web page:Class web page:http://www.ece.northwestern.edu/~aching/EECS362/http://www.ece.northwestern.edu/~aching/EECS362/

Textbooks: Textbooks: The DLX Instruction Set Architecture Handbook The DLX Instruction Set Architecture Handbook (provided by (provided by instructors)instructors) Philip M. Sailer and David R. KaeliPhilip M. Sailer and David R. Kaeli Morgan Kauffman Publishers, 1996.Morgan Kauffman Publishers, 1996.

Computer Organization and Design: The Hardware/Software Computer Organization and Design: The Hardware/Software InterfaceInterface David A. Patterson and John L. HennessyDavid A. Patterson and John L. Hennessy Morgan Kaufmann Publisher, 2002 or 2005Morgan Kaufmann Publisher, 2002 or 2005

Course Course PhilosophyPhilosophy

The entire class will be a project class. The entire class will be a project class. One of the two classes (Thursdays), each group will meet me One of the two classes (Thursdays), each group will meet me

individually. Each group will meet for 25 minutes.individually. Each group will meet for 25 minutes. The other class (Tuesdays) requires each group to make a 25 The other class (Tuesdays) requires each group to make a 25

minute presentation to rest of the class. The presentation minute presentation to rest of the class. The presentation should be professional and put on the web.should be professional and put on the web.

Each group will do the following:Each group will do the following: Describe goals for the current week (and if they were accomplished)Describe goals for the current week (and if they were accomplished) Goals for the next weekGoals for the next week Problems and difficulties encountered and how they were solvedProblems and difficulties encountered and how they were solved Put all the material including the talk and summary of progress on Put all the material including the talk and summary of progress on

their group web page (latest by one day after it was presented to their group web page (latest by one day after it was presented to get credit for it).get credit for it).

Grading Grading 30% weekly progress30% weekly progress 70% final project and results (due on last day of class with the 70% final project and results (due on last day of class with the

report)report)

What is What is available?available?

dlxccdlxcc - a C compiler for DLX - a C compiler for DLX dlxasmdlxasm – an assembler for DLX – an assembler for DLX dlxsimdlxsim and and dlxviewdlxview – a command-line and – a command-line and

graphical DLX simulator. Used to determine graphical DLX simulator. Used to determine correct program behavior for debugging.correct program behavior for debugging.

Description of these tools are available in the Description of these tools are available in the book and on the course web page.book and on the course web page.

Both executables and original sources are Both executables and original sources are available – benchmarking and testing programs available – benchmarking and testing programs will be provided as the course progresses.will be provided as the course progresses.

Also, see the web site given in the book and at Also, see the web site given in the book and at MKP (www.mkp.com).MKP (www.mkp.com).

DLX DLX ISAISA

Most similar to MIPSMost similar to MIPS Load/StoreLoad/Store 32 GP registers32 GP registers 32 Single precision FP registers32 Single precision FP registers

MIPS R3000 Instruction Set MIPS R3000 Instruction Set ArchitectureArchitecture

Instruction CategoriesInstruction Categories Load/StoreLoad/Store ComputationalComputational Jump and BranchJump and Branch Floating PointFloating Point

coprocessorcoprocessor Memory ManagementMemory Management SpecialSpecial

R0 - R31

PC HI

LO

OP rs rt

OP immediate

OP target

rd sa funct

Instruction Format

F0 - F31

A Pipelined A Pipelined DatapathDatapath

IF/ID

Register

ID/E

x Register

Ex/M

em R

egister

Mem

/Wr R

egister

PC

DataMem

WADi

RA Do

IUn

it

A

I

RFile

Di

Ra

Rb

Rw

MemWr

RegWr ExtOp

ExecUnit

busA

busB

Imm16

ALUOp

ALUSrc

Mu

x

1

0

MemtoReg

1

0

RegDst

Rt

Rd

Imm16

PC+4PC+4

Rs

Rt

PC+4

Zero

Branch

10

Clk

Ifetch Reg/Dec Exec Mem Wr

What to Do What to Do NextNext

Form groups of 3-4 (work in a team)Form groups of 3-4 (work in a team) First weekFirst week

Go through the software and documentation (will be helpful to you in Go through the software and documentation (will be helpful to you in understanding how you would develop your design)understanding how you would develop your design)

The simulator does not tell you how to design the processorThe simulator does not tell you how to design the processor Understand instruction set for DLXUnderstand instruction set for DLX Give thought to how you would design a pipelined processorGive thought to how you would design a pipelined processor Present your thoughts during the second class (Tuesday – 1/9/2007) of Present your thoughts during the second class (Tuesday – 1/9/2007) of

second weeksecond week Toolset tutorial for those who need it this upcoming Thursday Toolset tutorial for those who need it this upcoming Thursday

1/11/2007 in L4601/11/2007 in L460 Each of the Each of the nn groups should then present 1/ groups should then present 1/nnth th of the DLX ISA.of the DLX ISA.

Register OpsRegister Ops Branch/JumpBranch/Jump Load/StoreLoad/Store Floating Point and OthersFloating Point and Others

Each week document each group member’s contributions on Each week document each group member’s contributions on group websitegroup website