eecs 370 discussion 1 smbc. eecs 370 discussion exam 2 solutions posted online will be returned in...
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EECS 370 Discussion
SMBC
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EECS 370 Discussion
Exam 2
• Solutions posted online
• Will be returned in next discussion (12/9)– Grades hopefully up on CTools earlier
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EECS 370 Discussion
Roadmap to end of semester
• Homework 7 – Thursday 12/5
• Project 4 – Friday 12/6
• Final Exam – Monday 12/16 10:30 am – 12:30 pmmake sure you don’t have a conflict…
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EECS 370 Discussion
• Project 4– Overview– Tips– Example
• Virtual Memory– Motivation– Page Tables– Translation Lookaside Buffer– Hierarchical Page Table
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EECS 370 Discussion
Project 4
Start from correct P1 code- remove printstate()- add printaction()
What are the three times you access memory?
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EECS 370 Discussion
Project 4
Start from correct P1 code- remove printstate()- add printaction()
What are the three times you access memory?LW, SW, and Fetch
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EECS 370 Discussion
Project 4
Implement an arbitrary cache- 2D array of structs, perhaps
Possible Function Prototypes:• int load(int address)• void store(int address, int data)
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EECS 370 Discussion
Project 4
@@@ transferring word [0-3] from the memory to the cache@@@ transferring word [0-0] from the cache to the processor@@@ transferring word [4-7] from the memory to the cache@@@ transferring word [6-6] from the processor to the cache@@@ transferring word [1-1] from the cache to the processor@@@ transferring word [4-7] from the cache to the memory@@@ transferring word [20-23] from the memory to the cache@@@ transferring word [23-23] from the cache to the processor@@@ transferring word [2-2] from the cache to the processor@@@ transferring word [20-23] from the cache to nowhere@@@ transferring word [28-31] from the memory to the cache@@@ transferring word [30-30] from the cache to the processor@@@ transferring word [3-3] from the cache to the processor
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sw 0 1 6lw 0 1 23lw 0 1 30halt
Fetch
Fetch
Fetch
SW
LW
LWCache Miss
Fetch
Cache Miss
Cache Miss
Cache Miss
Eviction (dirty)
Eviction (clean)
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EECS 370 Discussion
Virtual Memory
Virtual Addresses map to Physical Addresses
Software sees:
Hardware sees:
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EECS 370 Discussion
Virtual Memory
Virtual Addresses map to Physical Addresses
Software sees:Virtual Addresses
Hardware sees:Physical Addresses
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EECS 370 Discussion
Virtual MemoryMotivation - Efficiency
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Address Space
0x0
0xFF
Program 1
Program 2
Program 3
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EECS 370 Discussion
Virtual MemoryMotivation - Efficiency
12
Address Space
0x0
0xFF
Program 1
Program 2
Program 3
Program 1
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EECS 370 Discussion
Virtual MemoryMotivation - Efficiency
13
Address Space
0x0
0xFF
Program 1
Program 2
Program 3
Program 1
Program 2
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EECS 370 Discussion
Virtual MemoryMotivation - Efficiency
14
Address Space
0x0
0xFF
Program 1
Program 2
Program 3
Program 2
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EECS 370 Discussion
Virtual MemoryMotivation - Efficiency
15
Address Space
0x0
0xFF
Program 1
Program 2
Program 3
Program 2
Program 3
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EECS 370 Discussion
Virtual MemoryMotivation - Efficiency
16
Address Space
0x0
0xFF
Program 1
Program 2
Program 3
Program 2
Program 3
Wasted Space
Wasted Space
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EECS 370 Discussion
Virtual MemoryMotivation - Efficiency
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Address Space
0x0
0xFF
Program 2
Program 3
Wasted Space
Wasted Space
This wouldn’t happen if we could split up programs into smaller chunks
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EECS 370 Discussion
Virtual MemoryMotivation - Size
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Address Space
0x0
0xFF
Program 1
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EECS 370 Discussion
Virtual MemoryMotivation - Size
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Programs bigger than main memory simply can’t be run?
How do I play Civ 5 then?(6.98 GB)
Address Space
0x0
0xFF
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EECS 370 Discussion
Virtual MemoryMotivation - Security
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Program 1(Operating System)
Program 2(Written by you)
Address Space
0x0
0xFF
Program 1
Program 2
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EECS 370 Discussion
Virtual MemoryMotivation - Security
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Program 1(Operating System)
Program 2(Written by you)
Address Space
0x0
0xFF
Program 1
Program 2
Writes tomemory…
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EECS 370 Discussion
Virtual MemoryMotivation - Security
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Program 1(Operating System)
Program 2(Written by you)
Address Space
0x0
0xFF
Program 1
Program 2
Writes tomemory…
Crashes
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EECS 370 Discussion
Virtual Memory
Solution:
Program is split into smaller chunks (pages)Virtual Addresses map to where page is actually stored
Could be Main Memory or Disk
Memory acts like a cache for the disk
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EECS 370 Discussion
Virtual MemoryMotivation - Efficiency
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Address Space
0x0
0xFF
Program 1
Program 2
Program 3
Program 2
Program 3
Wasted Space
Wasted Space
Part of Program 1
Part of Program 1
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EECS 370 Discussion
Virtual MemoryMotivation - Size
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Address Space
0x0
0xFF
Program 1(1/4)
Program 1(2/4)
Program 1(3/4)
Program 1(1/4)
Program 1(2/4)
Program 1(3/4)
Program 1(4/4)
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EECS 370 Discussion
Virtual MemoryMotivation - Size
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Address Space
0x0
0xFF
Program 1(1/4)
Program 1(4/4)
Program 1(3/4)
Program 1(1/4)
Program 1(2/4)
Program 1(3/4)
Program 1(4/4)
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EECS 370 Discussion
Virtual Memory
We can also protect memory
Check addresses during translationonly allow writes from the correct programs
Mark entire pages as read-only
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EECS 370 Discussion
Virtual MemoryPage Table
Data Structure for address translationIndexed by Virtual Page Number
Each entry hasPhysical Page NumberValid BitDirty Bit
LRU Policy for evictions
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EECS 370 Discussion
Virtual Memory
Page Table is usually stored in Main Memory
What’s the problem here?
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EECS 370 Discussion
Virtual Memory
Page Table is usually stored in Main Memory
What’s the problem here?Two memory accesses per memory access
SUPER SLOW!
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EECS 370 Discussion
Virtual Memory
Solution:
Translation Lookaside Buffer (TLB)special cache for Page Table entries only
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EECS 370 Discussion
Virtual MemoryTLB Hit
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Translation Lookaside
Buffer
Virtual Page Number
Physical Page Number
Page Table
Data
Data
Processor
Main Memory
Physical Page Number
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EECS 370 Discussion
Virtual MemoryTLB Hit
33
Translation Lookaside
BufferVirtual Page Number
Virtual Page NumberPage Table
Data
Processor
Main Memory
Physical Page Number
Physical Page Number
Data
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EECS 370 Discussion
Virtual Memory
Hierarchical Page Tables:Page Table points to locations of other Page TablesBottom level points to actual Physical Address
Uses much less space on averageUses much more space at worst
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EECS 370 Discussion
Virtual Memory
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Superpage Table
Subpage Table
Physical Address
Physical Address
Physical Address
Physical Address
Subpage Table
Physical Address
Physical Address
Physical Address
Physical Address