eﬀectiveness analysis of dvfs and dpm in mobile devicescsl.skku.edu/papers/jcst12.pdf · youngbin...

Seo Y, Kim J, Seo E. E!ectiveness analysis of DVFS and DPM in mobile devices. JOURNAL OF COMPUTER SCIENCE

AND TECHNOLOGY 27(4): 781–790 July 2012. DOI 10.1007/s11390-012-1264-6

E!ectiveness Analysis of DVFS and DPM in Mobile Devices

Youngbin Seo1, Jeongki Kim2, and Euiseong Seo3

1Computer Science and Engineering Major, University of Science and Technology, 217 Gajeong-ro, Yuseong-gu, Daejeon305-350, Korea

2Electronics and Communications Research Institute, 138 Gajengno, Yuseong-gu, Daejeon, Korea3College of Information and Communication Engineering, Sungkyunkwan University, 2066 Seubu-ro, Jangan-gu

Suwon 440-746, Korea

E-mail: [email protected]; [email protected]; [email protected]

Received September 11, 2011; revised May 8, 2012.

Abstract The demand for high-performance embedded processors in multimedia mobile electronics is growing and theirpower consumption thus increasingly threatens battery lifetime. It is usually believed that the dynamic voltage and frequencyscaling (DVFS) feature saves significant energy by changing the performance levels of processors to match the performancedemands of applications on the fly. However, because the energy e"ciency of embedded processors is rapidly improving,the e!ectiveness of DVFS is expected to change. In this paper, we analyze the benefit of DVFS in state-of-the-art mobileembedded platforms in comparison to those in servers or PCs. To obtain a clearer view of the relationship between powerand performance, we develop a measurement methodology that can synchronize time series for power consumption withthose for processor utilization. The results show that DVFS hardly improves the energy e"ciency of mobile multimediaelectronics, and can even significantly worsen energy e"ciency and performance in some cases. According to this observation,we suggest that power management for mobile electronics should concentrate on adaptive and intelligent power managementfor peripheral devices. As a preliminary design, we implement an adaptive network interface card (NIC) speed control thatreduces power consumption by 10% when NIC is not heavily used. Our results provide valuable insights into the design ofpower management schemes for future mobile embedded systems.

Keywords dynamic voltage scaling, power management, battery management, energy e"ciency, smart phone

1 Introduction

The functions of mobile multimedia consumer elec-tronics such as portable media players, smart phones,and digital cameras are rapidly diversifying as a resultof digital convergence. Furthermore, the resolution ofimages and videos as well as the complexity of gameshandled by mobile electronics are continually growing.Both concurrent execution of multiple applications andprocessing of high-definition audio, video and imagesrequire strong processor performance. Therefore, thesetrends are driving manufacturers to use powerful pro-cessors in the embedded systems of mobile multimediaelectronics[1].

However, as the power consumption of a processorincreases in proportion to both the clock frequencyand the square of the operating voltage, stronger pro-cessors generally require more power. The processor isone of the major power consumers in mobile multimedia

embedded systems[2]. Therefore, the demand for high-performance processors in mobile multimedia electron-ics poses a serious threat to battery lifetime. In fact,the battery life of cutting-edge smart phones is merelysix hours when they run multimedia applications.

Dynamic voltage and frequency scaling (DVFS) isa feature that adjusts the clock frequency and opera-ting voltage of a processor on the fly. When DVFStechnology is applied, a processor reduces additionalpower consumption caused by unnecessarily high clockfrequency when the system load is low, and thereforethe processor achieves significant energy savings. DVFSe!ectiveness in both servers and PCs has been provedfor many commercial products over a long time. There-fore, most modern processors employ the DVFS featurein one way or another.

However, because of rapid improvement in proces-sor design and manufacturing technology, the amountof energy required to execute an instruction has

Regular PaperThis research was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF)

funded by the Ministry of Education, Science and Technology under Grant Nos. 2009-0089491, 2010-0003453.2012 Springer Science +Business Media, LLC & Science Press, China

782 J. Comput. Sci. & Technol., July 2012, Vol.27, No.4

been steadily decreasing[3]. In addition, the fine-grained fabrication technology is decreasing the dy-namic power consumption of processors. Consequently,the proportion of leakage power in the total power con-sumption is increasing[4]. Considering that a significantportion of DVFS benefit comes from a lowered operat-ing voltage, a decrease in the proportion of dynamicpower leads to diminishing potential benefit of DVFSaccording to Amdahl’s law[5].

The energy e"ciency improvement from DVFScomes at a cost. To preserve the quality of services,operating systems must determine the performance de-mands of applications accurately. As every applicationhas its own performance demand and tolerance level toexecution delays, prediction of the performance demandof applications is di"cult. Moreover, as the perfor-mance demand of multimedia applications grows moreburdensome, the penalty of inaccurate prediction wor-sens. Therefore, the e!ectiveness of DVFS in modernmobile devices should be quantitatively assessed to jus-tify this cost or penalty in performance.

DVFS algorithms collect diverse parameters aboutsystem conditions and predict the performance demandof applications in execution. According to the predic-tion results, the embedded operating system initiatesperformance transitions.

When the DVFS algorithms underestimate perfor-mance demand, the service quality of applications withdeadlines, such as multimedia applications and games,will be critically harmed by unexpected execution de-lays. On the contrary, overestimation of performancedemand by DVFS algorithms will induce the use of ex-cessively high frequency, which in turn generates largepower consumption and therefore decreases the energye"ciency of the system.

Although most contemporary operating systems usevariants of interval-based DVFS algorithms, their inac-curacy in performance decisions has been continuallyhighlighted[6-12]. Therefore, considering the shrinkingbenefits and expanding side-e!ects, a careful evaluationof the value of DVFS in mobile electronics is in order.

Although some research e!orts on the use of DVFSin mobile devices have been published, only a few ofthem evaluate DVFS in real mobile embedded systems.Moreover, there is little known about the di!erencesin DVFS characteristics between mobile embedded sys-tems and other computing systems. In this paper, weanalyze the e!ectiveness of DVFS in mobile multimediaelectronics and suggest a strategy for power manage-ment for mobile devices based on the results.

To analyze the power consumption patterns ofshort-term events, we suggest a novel synchroniza-tion methodology for processor power utilization. The

suggested measurement technique can synchronize timeseries for power consumption and those for processorutilization within 10 ms precision. The amount of en-ergy required to finish a certain application event canbe measured using this scheme. To clarify the characte-ristics of DVFS in mobile devices, the e!ectiveness ofDVFS in both embedded systems and diverse comput-ing systems, including servers and laptops, is evaluated.

Finally, based on our observations we suggest a stra-tegy for power management of mobile electronics thatconcentrates on the power consumption of peripheraldevices. As a preliminary approach, we introduce anexample of a power management scheme for a periphe-ral device.

The remainder of the paper is organized as follows.Section 2 describes the background and related work re-garding the power consumption of processors, DVFS al-gorithms, and power management schemes for periphe-ral devices for mobile multimedia electronics. Section3 introduces our processor utilization and power con-sumption measurement methodology. Then Section 4analyzes the e!ectiveness and impacts of DVFS in mo-bile platforms in comparison to other computing sys-tems, including servers and laptops. Based on theanalysis, we suggest a strategy for power managementfor mobile multimedia electronics in Section 5. Finally,we conclude the paper in Section 6.

2 Background and Related Work

2.1 Processor Power Consumption

The power consumption, P , of a CMOS-based pro-cessor is related to its clock frequency f and operatingvoltage V as P ! V 2 ·f . Also, the relation V ! f holdsfor these processors[13-14]. The dramatically increasedpower consumption caused by high clock frequency hasthreatened the battery lifetime in mobile multimediaelectronics.

Although high performance is required in somecases, processors remain idle or under low load mostof the time. Under low load or idleness, a high clockfrequency results in unnecessarily additional power con-sumption. DVFS manages the tradeo! between perfor-mance and power consumption by adjusting the fre-quency and operating voltage on the fly.

A DVFS operation consists of two steps: a clocktransition and a voltage transition. Previously, proce-ssors were halted during performance transition ope-rations, which take up a few hundred µs. Recent proces-sors perform transition operations following the proce-dure represented by Fig.1. When lowering performance,the frequency change occurs first. On the contrary,

Youngbin Seo et al.: E!ectiveness Analysis of DVFS and DPM in Mobile Devices 783

Fig.1. Internal operation sequences of processors during perfor-

mance level transitions.

when raising performance, the voltage must be in-creased before increasing the clock speed. The proces-sor needs to suspend its operation only for the frequencychange, which takes less than 10 µs, in state-of-the-artprocessors[6].

The voltage transition requires approximately 100µs. Therefore, even though there is no long suspen-sion for processor operations, the entire transition pro-cess requires over 100 µs. However, in comparison tothe length of time slices, which are the smallest timeunits of task scheduling, the transition time is negligi-bly short.

Currently, processor clock speeds have remained atthe same level for a decade owing to the power wall,whereby the power consumption of a processor exceedsthe limit allowed for thermal dissipation or power con-sumption of a system. Because of this situation, DVFSis one of the most e!ective means for reducing the powerconsumption and increasing the energy e"ciency of aprocessor[13]. However, even server or desktop proces-sors, for which both the total power consumption andthe proportion of dynamic power to total power con-sumption are large, show greatly varying DVFS e!ec-tiveness, depending on the diverse workload and pro-cessor parameters[15]. Considering that both energy-per-instruction and the proportion of dynamic powerto total power are small in mobile embedded proces-sors in comparison to servers and PCs, DVFS e!ective-ness should be evaluated before it is utilized in mobiledevices.

2.2 Existing DVFS Algorithms

When there is no deadline for an application, it isbest to execute the application at the lowest clock fre-quency for the best energy e"ciency. However, becausemultimedia and interactive applications have implicitor explicit deadlines, DVFS algorithms must provide

su"cient performance for applications that are running.In hard real-time systems, prediction accuracy is

critical for system correctness[16-17]. Therefore, everytask in a hard real-time system explicitly provides infor-mation on its performance demand and deadline. Whenthis performance information is gathered for all appli-cations in the system, prediction of the performance de-mand becomes a straightforward problem[18]. In spiteof its accuracy, this approach is not used in commoditymobile electronics because existing applications mustbe modified to be served with proper performance.

Predicting future performance demands based on thepast behavior of applications does not require any appli-cation modifications. Therefore, this is a viable optionfor soft real-time systems including most multimediamobile electronics.

DVFS algorithms that make predictions based onhistory can be broadly categorized as interval-basedalgorithms or task-based algorithms[10]. Task-basedalgorithms[10-12,18-20] analyze the deadline and work-load of each task, and then adjust the processor perfor-mance for each task based on the results. Interval-basedalgorithms[8,21-22] measure processor utilization in pre-vious time intervals and use this information to set thecurrent performance level for the next time interval.

In general, task-based algorithms save more energyand provide more suitable performance than interval-based algorithms. Task-based algorithms assume, how-ever, that all tasks have explicit or implicit deadlines.As many applications do not have timeliness require-ments, this assumption may cause meaningless deadlinedetection overheads in multimedia embedded systems.In addition, the runtime overhead and implementa-tion complexity of task-based algorithms are generallyhigher than those of interval-based algorithms. There-fore, interval-based algorithms are more widely used incommercial products.

However, in spite of their popularity, interval-basedalgorithms frequently fail to predict performance de-mand, which can result in unexpected execution delays.Prediction failures for interval-based algorithms can becategorized into three typical cases: underestimationsby averaging, late performance transitions, and inaccu-rate predictions[6].

Interval-based algorithms take the average processorutilization during the last whole interval as the predic-tion basis for the performance demand of the next in-terval. However, it ignores the timeliness requirementsof applications. Suppose that a game requires 20ms ofexecution at maximum performance to react to a com-mand. Even though the required computation load isthe same, providing only 2% of the maximum perfor-mance for 1 s may result in totally di!erent user expe-riences because of an unexpected execution delay.


However, if the target processor can be set to a 2% per-formance level and the interval length is 1 s, an interval-based algorithm will provide such low performance dur-ing the next interval.

A second problem occurs because of the relativelylong interval length. The length of an interval is setto be su"ciently long to obtain meaningful informa-tion about the system load and to prevent excessivelyfrequent performance switching. In general, the inter-val duration lasts from tens of milliseconds to a fewseconds. However, the activation intervals of multime-dia or interactive applications are dramatically shorter.Therefore, interval-based algorithms occasionally pro-vide the performance required a long time after it isfirst needed.

Finally, the performance demand prediction for thenext interval, which can range in length from a few tensof milliseconds to a few seconds, shows poor hit rates.In particular, the prediction accuracy of interval-basedalgorithms is less than 50% for multimedia and interac-tive applications[7]. As stated previously, frequent er-roneous predictions lead to a loss of quality of servicesor to energy waste, as shown in Fig.2.

Fig.2. Performance demand prediction for interval (b) based on

the history of interval (a) fails because the performance demand

diminishes in interval (b). The prediction fails again in inter-

val (c) since high performance demand spontaneously occurs in

interval (b).

2.3 Power Management of Peripheral Devices

If processor power consumption is diminishing, thenthe power consumption of other components will pro-portionally increase in comparison to the power con-sumption of the entire system. Furthermore, as morediverse functionalities are integrated into mobile de-vices, various peripherals such as wireless network inter-face cards (NICs), cameras, GPS sensors, motion sen-sors, and ambient sensors, are included in mobile de-vices. Therefore, the contribution of peripheral devicesto total power consumption will steadily increase[23].

Hardware vendors have been providing DPM (dy-namic power management) features for the peripheralcomponents of traditional computing systems, whichmake a component sleep while idle. However, as aperipheral device remains unavailable until it is fullyawakened, the DPM feature may significantly harm thequality of services that require real-time responsiveness.Therefore, smart power management algorithms, forboth processors and peripheral devices are necessary.

DPM algorithms that guarantee QoS in hard real-time systems have been suggested[24]. By identifyingthe first point at which a device is used after idling,DPM algorithms can determine whether performancetransitions of the device violate task deadlines. Theycan also decide when to initiate the wake-up transitionfor the device.

Unlike hard real-time systems, most applications ina mobile device are sporadic tasks, for which bothstarting and execution times are di"cult to predict.Therefore, it is challenging to apply the methods forhard real-time systems to consumer electronics. Conse-quently, a few studies have attempted to anticipate theuse of a device based on its usage history[25-26].

In spite of the growing number of peripheral devicesin mobile gadgets, there has been very little researchon power management for peripherals in comparison tothat for processors.

3 Measurement Methodology

3.1 Measurement Device

The power consumption of target systems was mea-sured using a programmable DMM (digital multime-ter). The DMM used in our experiments supports 3 000readings/s. But because the basic scheduling length ofembedded operating systems is approximately 10 ms,we programmed it to sample every 10ms.

The DMM can measure both AC and DC current.Except the server system, which has an internal powersupply, we measured the power input to the systems atthe DC cables between the AC/DC adapters and thesystems by cutting the cables and connecting the DMMto both ends of the cables in a series. When we mea-sured the server system, we connected the DMM to theAC cable to the server.

3.2 CPU Utilization

Existing utilities that have been used to measureprocessor utilization samples at second granularityare not adequate for identifying performance demandchanges for multimedia or interactive applications, forwhich activation intervals last for only a few tens of mil-liseconds. Therefore, we built our own tool to measure


processor usage changes at millisecond granularity.The /proc file system, which contains information

about task and system status, records the number ofticks used by each task and by the whole system. TheCPU utilization measurement tool tracks changes inthe numbers in every predefined time interval. As aresult, the tool can monitor how much processor timewas used for each application during the last time inter-val, as shown in Fig.3. The measurement interval herehas nothing to do with the interval of interval-basedalgorithms.

Fig.3. Processor utilization measurement tool collects tick-usage

data for each task from the /proc file system.

The accuracy and meaning of the measurement re-sults depend on the measurement interval. Extremelyshort measurement intervals induce a significant proces-sor overhead, and therefore may hinder the executionof target applications and increase power consumption.On the contrary, excessively long intervals scale downthe sensitivity to changes in performance demand.

In this study, the measurement interval was set to10ms, which is the length of the minimum schedulingunit. When sampling every 10ms, the tool adds lessthan 9% processor load. As the processor utilizationdata in this paper refer to processor usage by the over-all system, the actual processor demand of a target ap-plication is less than the results presented here by ap-proximately 9%.

When the overall processor utilization becomes satu-rated because of the additional performance demandof the measurement tool, the target application maynot execute at its original speed. Therefore, the targetworkloads to be analyzed were carefully chosen to avoidsaturation of processor utilization.

3.3 Power-CPU Synchronization

DVFS e!ectiveness seems to change with power con-sumption and therefore energy e"ciency according tovariations in performance demands. Consequently, ei-ther power consumption data or processor utilizationdata alone are insu"cient for an understanding of the

behavioral characteristics of a DVFS algorithm. Thus,it is necessary to display both types of data on a singleplane as a function of time.

We first used the NTP (network time protocol) tosynchronize the clocks of both the DMM host and tar-get board to try to synchronize the data with times-tamps from the clocks. However, even with a directwired connection between the target board and theDMM host, significant di!erences as long as 0.1 s oc-curred between the clocks. Thus, we concluded thatusing NTP is not an adequate approach for our pur-pose.

We therefore developed a synchronization methodthat takes a power consumption signature as a mile-stone in time series data. The pseudocode illustratedin Fig.4 gives a sudden high load and decreases theload gradually. At the bottom point, it changes di-rection and increases the load again. Execution of thepseudocode generates a unique power consumption pat-tern that is “M”-shaped, as shown in Fig.5.

do burst():conduct a lot of arithmetic operationsreturn

do sleep (timer):sleep for timer ms.return

Generate signature()://increasing sleep intervalfor (timer = 0; timer < 100; timer++) {

do burst();do sleep (timer);

}//decreasing sleep intervalfor (timer = 100; timer > 0; timer++) {

do burst();do sleep (timer);return

}

Fig.4. Power consumption signature generation pseudocode.

Fig.5. Power consumption signature, the “M” shape, appears at

the 1 s point. It is used to synchronize the power measurement

time series and processor usage time series.


Execution of the code induces an instant increase inpower consumption and marks the “M” shape in thetime series of the measurement result, so we know theexact starting time of the signature generation codeand take this signature as the synchronization pointbetween power measurement data and processor uti-lization data. In the analysis, we ran the signaturegeneration code before every time we ran target appli-cations.

After every experiment, we obtained two kinds oftime series, which are for processor utilization andpower consumption, respectively. Since it is easy tomark the time point of the signature on the processorutilization time series, we can correlate both time seriestogether by unifying the signature starting points onthem. The amount of energy consumption for accom-plishing a specific event or activity can be calculatedbased on the combined time series.

We used this methodology in our research to mea-sure the amount of energy used for specific activity.

4 Analysis of DVFS E!ectiveness

4.1 Target Systems and Applications

We evaluated the DVFS characteristics in mobileplatforms in comparison to other types of systems, in-cluding server and laptop platforms. Table 1 lists allthe system specifications. All the systems were recentlymanufactured, o!-the-shelf commercial products.

Table 1. Hardware Platform Specifications

Platform Part DescriptionEMB1 CPU 532 Mhz single core

Memory 128 MB RAMStorage Flash diskDVFS 533, 266 and 133Mhz

EMB2 CPU 1.6Ghz single core + HyperthreadMemory 128 MB RAMStorage Flash diskDVFS 1600, 1333, 1067 and 800Mhz

LAP CPU 1.83Ghz dual coreMemory 1GB RAMStorage 2.5 in. hard diskDVFS 1833, 1333 and 1000 Mhz

SVR CPU 2.27Ghz hyperthreaded quad coreMemory 4GB RAMStorage 3.5 in. hard diskDVFS 2268, 2000 and 1600 Mhz

As shown in Fig.6, both EMB1 and EMB2 wereequipped with 3.5-inch and 7-inch touch screen LCDs,respectively. Each also had a sound chipset and a1Gbps wired NIC. LAP had a 15 inch LCD displaywith other peripherals, such as wireless and wired NICsand speakers. The power consumption of SVR excludeddisplays, keyboards and mice.

Because EMB1 has a di!erent instruction set ar-chitecture (ISA), the software packages available di!erfrom those for the other platforms. Therefore, directcomparison of the energy e"ciency for a certain taskbetween EMB1 and the other platforms may be un-fair. Therefore, we excluded EMB1 from the compara-tive analysis and it was only used in the experiment tomeasure the processor contribution to the power con-sumption of the entire system.

Fig.6. EMB1 board and digital multimeter.

We carefully selected target applications to reflectcommon workload characteristics of multimedia mobileelectronics. The selected applications are listed in Ta-ble 2. To maintain consistency between experiments,we recorded and played the keyboard and mouse inputsfor interactive applications, such as WEB and OFFICE,by using an input recording tool.

Table 2. Workload Description

Name DescriptionHQMov 1280 ! 720 10Mbps MPEG4 movie file playLQMov 352 ! 288 500Kbps MPEG4 movie file playMUS 320 Kbps MP3 music file playWEB A popular web browser browsing a portal siteOFFICE A word processor performing file open, editing,

and word search

In order to analyze both the DVFS hardware issuesand its e!ectiveness combined with a DVFS algorithm,the Ondemand algorithm[22] was used in our evaluation.

As shown in Fig.7, Ondemand is one of the popularinterval-based algorithms, which is equipped and beingwidely used in the Linux kernel. It is a variant of thetraditional interval-based algorithms that fits the fastperformance transition speed of modern processors byusing much shortened interval length, which can be setanywhere between a few hundred milliseconds and a fewseconds depending on the power state transition latencyof the processor. Ondemand also has a fast-up thres-hold that prevents excessively long response delay. If


the CPU utilization of the last interval exceeds the fast-up threshold, the processor will immediately ramp upthe clock speed to its maximum. To summarize, Onde-mand conducts aggressive performance adjustments incomparison to conventional interval-based algorithms.In our research, the interval length was set to 80ms asin the default configuration.

for every CPU in the systemevery X milliseconds

Get utilization since last checkif (utilization > UP THRESHOLD)

Increase frequency to MAXevery Y milliseconds

Get utilization since last checkif (utilization < DOWN THRESHOLD)

Decrease frequency by 20%

Fig.7. Pseudocode of the Ondemand algorithm at a high level[22].

To measure the power consumption of EMB1, EMB2and LAP, we obtained the current and voltage fromthe DC output of the corresponding power adaptors.The power consumptions of all systems were measuredat the inputs to the power supply units. In addition,EMB1 was customized to expose the power input tothe processor core, which is the main execution unit ofa mobile embedded processor, so that a DMM directlymeasures the processor core power consumption.

4.2 Power Consumption Break-Down

To identify the processor power consumption as aproportion of that of the whole system, we measuredboth processor and system power consumption underdiverse system conditions. Table 3 shows the results.

Table 3. Relative Power Consumption of the ProcessorCore in EMB1 in Comparison to Overall

System Power Consumption

ClockState

Processor System Contribution(Mhz) Power (mW) Power (W) (%)532 Busy 244.3 4.59 5.3266 Busy 109.3 4.32 2.5133 Busy 59.8 4.27 1.4532 Idle 15.4 4.17 0.4266 Idle 9.7 4.16 0.2133 Idle 9.3 4.15 0.2

The busy state in Table 3 means that the systemwas executing a dummy while-loop, so that the proces-sor continually executed instructions. When the systemwas busy, the power consumed by the processor repre-sented up to 5.3% of the total power. However, it wasusually less than 4%. When the system was idle, theproportion decreased even further. We believe that thislow idling power can be attributed to clock gating orsimilar power-saving techniques.

In addition, we can verify that the reduced powerconsumption of the processor due to the decreased clockspeed barely a!ected system power consumption. Thedi!erences in contribution between the highest clockand lowest clock speeds were 3.9% and 0.2% under thebusy state and idle state, respectively.

Considering the characteristics of modern mobileworkloads, such as web page rendering and video de-coding, a lower clock speed will undoubtedly directlya!ect the execution or response time of applications.As mentioned above, the overhead and possible perfor-mance risks induced by DVFS algorithms sometimes re-sult in unexpected execution delays when they make in-correct predictions about future performance demands.When the clock speed was adjusted to 266Mhz fromthe highest point, the power decreased by only 5.9%.Furthermore, when the clock speed was decreased to133Mhz from 266Mhz, there was only a 1.2% powerreduction. It is di"cult to believe that this potentialenergy saving o!sets the risks to QoS. As this di!erencebecomes even more negligible when the system idles, itwould be hard to justify the use of DVFS algorithmsduring idle time.

As a result, we conclude that, although the proces-sor vendor provides three performance steps, the e"-cacy of DVFS is highly doubtful in EMB1 according toour data.

4.3 Energy Consumption

We measured the energy consumption of playingmedia files during a fixed time frame for HQMov, LQ-Mov and MUS. For WEB and OFFICE, we executeda set of activities of each application in a fixed timeframe. If the activity set finished before the end of thetime frame, the system idled for the remaining time.

Fig.8 shows the energy consumption of SVR. Be-cause the processor performance of SVR is a few timesfaster than that of LAP and EMB1, it idled most oftime when it ran the workloads used in our study. Fur-thermore, the processor of SVR automatically goes tolow-power sleep mode when it is idle and thus the powerconsumption of the processor has nothing to do with

Fig.8. Energy consumption of SVR.


the clock speed when it is idling. Therefore, DVFS didnot perform well under HQMov, LQMov and MUS, forwhich the processor was idling most of time.

However, because WEB and OFFICE require sig-nificant amounts of processing capacity in a short time,DVFS saved up to 12% of energy consumption for theseworkloads.

LAP consumed less power than SVR because a lap-top usually consists of low-power components. More-over, laptop processors are generally designed to achieveenergy e"ciency by fully utilizing DVFS. Consequently,LAP saved energy as much as approximately up to 15%of total energy consumption by using lower clock speedsor the DVFS algorithm as shown in Fig.9.

Fig.9. Energy consumption of LAP.

In contrast to SVR, the DVFS algorithm for LAPyielded less energy saving for both WEB and OFFICEthan for the other workloads. This is because bothWEB and OFFICE have high performance demandson LAP, and therefore the DVFS algorithm maintainedthe highest clock speed most of time.

In Subsection 4.2 we predicted that DVFS wouldbe barely e!ective in EMB1 due to the low power con-sumption. However, because processors significantlycontribute to the total power consumption in bothSVR and LAP, despite variations, the e"cacy of DVFSin both SVR and LAP was significant in our experi-ments.

Finally, Fig.10 shows the results of EMB2. As weverified in Subsection 4.2, embedded processors haveextremely low-power consumption and therefore the

Fig.10. Energy consumption of EMB2.

e!ectiveness of DVFS is limited. We can find these phe-nomena also in Fig.10. The amount of energy saved us-ing DVFS was less than 4% for every workload. Theabnormally low energy consumption under HQMov at0.8Ghz is due to frame skipping for insu"cient proces-sor performance.

Using 0.8Ghz for both WEB and OFFICE worsenedthe energy e"ciency. We believe that this is becausethe additional energy from prolonged use of the NICor flash storage o!sets the saved energy from loweredclock speed. In order to match the vast performancedemand of both WEB and OFFICE workloads, DVFSused the highest clock speed whenever processing loadwas given to the system. Therefore, DVFS did notmake any meaningful di!erences from the constantlyhigh clock speed for both workloads.

5 Discussion and Suggestion

We found that DVFS saves only a small amountof energy, or sometimes even worsens the energy e"-ciency or execution time. In particular, the prolonga-tion of execution time due to a decreased clock speedusually harms user experiences with mobile electronicsmore dramatically than other systems because the per-formance of mobile processors is generally marginal formost modern multimedia applications. Finally, unlikeconventional computers, the power consumption of aprocessor accounts for less than 5% of the total powerconsumption. Therefore, it would be more beneficial tofocus on the power management of peripheral devices.

Most embedded systems employ a system-widepower management policy, or some variant of the greedyapproach[25] to manage the power states of periphe-rals. Under a system-wide power management pol-icy, peripherals sleep simultaneously only when the sys-tem sleeps. Conversely, all peripherals remain awakewhile the system is on. The greedy approach putsa peripheral to sleep when the component idles for alarger amount of time than a predefined threshold.

The greedy approach can be applied to existing sys-tems with only minor modifications of operating sys-tems, and existing applications benefit in terms of en-ergy e"ciency without modification. However, becauseit does not anticipate the future use of peripheral de-vices, significant execution delays may occur as a resultof power state transitions. In addition, as a peripheralmust remain awake for a predefined threshold beforegoing to sleep, it may lose energy that could be savedwith smarter algorithms.

Therefore, like existing DVFS algorithms, DPM al-gorithms must be redesigned to reflect the character-istics of target applications, as well as other informa-tion, such as user behavior and ambient conditions, to


proactively adjust the power states of peripherals.As a preliminary study for the design of new DPM

algorithms, we choose the wired NIC of EMB2 as thefirst target. The power consumption of an NIC in-creases with its operating speed[27]. It is not unusualfor a portable media player or mobile Internet device toemploy a wired NIC for the transfer of massive amountsof data. However, it is likely that its burst performanceis rarely used.

We measured the power consumption of the over-all system while changing the network speed. As il-lustrated in Table 4, there was a di!erence of up to1.2W, which is approximately 10% of the total powerconsumption, between the highest speed and the lowestspeed. Based on this observation, we implemented anautomatic performance setter that adjusts NIC accord-ing to the NIC utilization status. If the NIC is beingheavily used, it is set to work at 1000Mbps. Conversely,if the networking load is light, the NIC is set to itsminimum speed. As expected, the prototype showed asignificant enhancement of energy e"ciency by up to10%, which is approximately three times as much asthe e!ectiveness of DVFS.

Table 4. Idle Power Consumption of the Overall Dystemfor Di!erent NIC Speeds

NIC Speed (Mbps) Power (W)1000 12.84100 12.0010 11.64

The LCD is another good example of the target pe-ripherals for intelligent dynamic power management.The LCD equipped in EMB2 consumes about 5 W,which takes 40% of the total power consumption. Manycommercial products now dim their LCDs to save en-ergy under low light conditions or when the gadget isidle for a predefined threshold time.

6 Conclusions

The DVFS algorithm and the DVFS feature havebeen important contributors to improving energy ef-ficiency in most computing systems. However, suspi-cion about the e!ectiveness of DVFS in mobile multi-media electronics, which can be equipped with manyperipheral devices, has arisen since the emergence oflow-power mobile processors. Although there have beenmany studies on e"cient DVFS utilization, to the bestof our knowledge this is the first study to quantitativelyinvestigate the actual e!ectiveness of DVFS in mobilemultimedia devices, including smart phones.

We proposed a novel measurement technique thatcan determine the energy required for handling a shortevent, such as opening a web page or searching for

a word. Using the suggested measurement scheme,we analyzed DVFS e!ectiveness in diverse computingsystems, including mobile embedded platforms. Theresults show that the power reduction due to DVFS isless than 5% in mobile platforms, and therefore, DVFSbarely improves energy e"ciency and can even some-times significantly worsen both energy e"ciency andperformance.

From our analysis we can conclude that power mana-gement for mobile electronics should focus on the powerconsumption of peripheral devices. Based on the sug-gested strategy, we designed and implemented an au-tomatic speed setter for a wired NIC, which consumesa significant amount of power because of its high fre-quency internal circuit. The prototype implementationsaved up to 10% of the overall system power when theNIC was not being heavily used without any significantimpact on performance.

We expect that the DVFS evaluation results and themeasurement techniques suggested in this paper will behelpful for optimization of multimedia mobile electron-ics, for which energy e"ciency is critical to productvalue.

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Youngbin Seo received his B.S.and M.S. degrees in electrical engi-neering from Ajou University. Heis an engineer at LG U+ and con-ducting research projects on embed-ded systems software currently. Heis also a Ph.D. candidate at Univer-sity of Science and Technology, Ko-rea. His research interest covers em-bedded operating systems, embed-

ded system architectures and sensor networks.

Jeongki Kim received his B.S.,M.S., and Ph.D. degrees in computerscience from Chonbuk National Uni-versity. Currently, he is a senior re-searcher at Electronics and Telecom-munications Research Institute, Ko-rea. His research area includes em-bedded system software, parallel pro-cessing, and database engineering.

Euiseong Seo received his B.S.,M.S., and Ph.D. degrees in com-puter science from Korea AdvancedInstitute of Science and Technology(KAIST) in 2000, 2002, and 2007, re-spectively. He is currently an assis-tant professor in College of Informa-tion and Communication Engineer-ing at Sungkyunkwan University,Korea. Before joining Sunkyunkwan

University in 2012, he had been an assistant professor at Ul-san National Institute of Science and Technology (UNIST),Korea from 2009 to 2012, and a research associate at thePennsylvania State University from 2007 to 2009. His re-search interests are in power-aware computing, real-timesystems, embedded systems, and virtualization.

eﬀectiveness analysis of dvfs and dpm in mobile devicescsl.skku.edu/papers/jcst12.pdf · youngbin...

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