ei502 microprocessors & micrtocontrollers part3hardwareinterfacing
DESCRIPTION
Hardware interfacing fundamentals for microprocessors, specifically for 8085TRANSCRIPT
Mallabhum Institute of Technology Debasis Das 1
EI 502Microprocessors
& Microcontrollers
Part 3(Hardware Interfacing)
Debasis Das
Aug 2011
Mallabhum Institute of Technology Debasis Das 2
Fetch Cycle
Aug 2011
Mallabhum Institute of Technology Debasis Das 3
Timing: Op Code Fetch (Mov A,B)
Aug 2011
Mallabhum Institute of Technology Debasis Das 4
MVI C,FF
Aug 2011
Mallabhum Institute of Technology Debasis Das 5
Instruction Cycle
Aug 2011
Mallabhum Institute of Technology Debasis Das 6
Memory Read Cycle
Aug 2011
Mallabhum Institute of Technology Debasis Das 7
Memory Read Cycle
Aug 2011
Mallabhum Institute of Technology Debasis Das 8
Memory Write
Aug 2011
Mallabhum Institute of Technology Debasis Das 9
Memory Write Cycle
Aug 2011
Mallabhum Institute of Technology Debasis Das 10
Demultiplexing AD0-8
Aug 2011
Mallabhum Institute of Technology Debasis Das 11
Memory & I/OControl Signals
Aug 2011
Mallabhum Institute of Technology Debasis Das 12
256 x 4 Memory
Aug 2011
Mallabhum Institute of Technology Debasis Das 13
1k x 8 Memory
Aug 2011
Mallabhum Institute of Technology Debasis Das 14
Memory: 2k x 8 using 1k x 8
Aug 2011
Mallabhum Institute of Technology Debasis Das 15
2k x 8 Memory
Aug 2011
Mallabhum Institute of Technology Debasis Das 16
8k x 8 Memory
Aug 2011
Mallabhum Institute of Technology Debasis Das 17
2 k x 8 Memory
Aug 2011
Mallabhum Institute of Technology Debasis Das 18
Timing: IN port
Aug 2011
Mallabhum Institute of Technology Debasis Das 19
I/O Read Cycle
Aug 2011
Mallabhum Institute of Technology Debasis Das 20
I/O Mapped I/O
Aug 2011
Mallabhum Institute of Technology Debasis Das 21
OUT port
Aug 2011
Mallabhum Institute of Technology Debasis Das 22
Memory Mapped I/O
Aug 2011
Mallabhum Institute of Technology Debasis Das 23
Memory & I/O
Aug 2011