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    Electronic Circuits Analysis Lab Manual

    Dept of ECE 1

    MADANAPALLE INSTITUTE OF TECHNOLOGY & SCIENCE

    ANGALLU, MADANAPALLE517325

    ELECTRONIC CIRCUITS ANALYSIS

    LABORATORY MANUAL

    DEPARTMENT

    OF

    ELECTRONICS & COMMUNICATION ENGINEERING

    JULY2012

    Lab Incharge Head of the Department

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    MADANAPALLE INSTITUTE OF TECHNOLOGY & SCIENCE

    ANGALLU, MADANAPALLE517325

    MITS MITS / ECE

    LAB WISE-LABMANAUALS DEPARTMENT : ECE

    ELECTRONIC CIRCUITS

    LABORATORY MANUAL

    DEPARTMENT

    OF

    ELECTRONICS & COMMUNICATION ENGINEERING

    JULY2012-2013

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    INDEX

    S.NO NAME OF THE EXPERIMENT PAGE NO

    SOFT WARE:

    1. COMMON EMITTER AMPLIFIER 4

    2. COMMON SOURCE AMPLIFIER 7

    3. TWO STAGE RC COUPLED AMPLIFIER 10

    4. CURRENT SHUNT FEED BACK AMPLIFIER 14

    5. WIEN BRIDGE OSCILLATOR USING TRANSISTORS 17

    6. RC PHASE SHIFT OSCILLATOR 19

    7. CLASS A AND CLASS AB POWER AMPLIFIERS 22

    8. HIGH FREQUENCY COMMON BASE AMPLIFIER 28

    HARD WARE:

    9. TWO STAGE RC COUPLED AMPLIFER 31

    10. CURRENT SHUNT FEED BACK AMPLIFIER 34

    11. CLASS A AND CLASS AB POWER AMPLIFIERS 37

    12. SINGLE TUNED VOLTAGE AMPLIFIER 41

    13. HARTLEY AND COLPITTS OSCILLATORS 43

    14. MOSFET AMPLIFIER 45

    ADDITIONAL EXPERIMENTS:

    15. SERIES VOLTAGE REGULATOR 48

    16. SHUNTVOLTAGE REGULATOR 50

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    1.COMMON EMITTER AMPLIFIER

    AIM:

    a)To design CE single stage amplifier with potential divider circuit using NPN

    Transistor 2N2923 for the specifications : IC= 3 mA, Vce = 10v,= 190, & IR1=

    32IB.

    b) To observe dc operating point, frequency response, & C.R.O waveforms using

    MULTISIM software.

    APPARATUS: - Multisim Soft ware.

    DESIGN PROCEDURE:

    Vcc=

    Select Vre Vce

    Select Vre = 5v

    Re=Vre/Ic

    Vrc= Vcc-VCE-VRE

    Rc=VRC/Ic

    IB=Ic/

    IR1=32IB

    IR2=IR1-IB

    VB=VBE+VRE

    R2=VB/IR2

    R1= (VCC-VB)/IR1

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    CIRCUIT DIAGRAM:

    PROCEDURE:-

    1. Rig up the circuit using multisim software and verify the results using DC

    operating point analysis (simulate----analysis ---- DC operating point)

    2. Rig up the circuit using multisim software and verify the results using AC

    analysis (Simulate ---- analysis ----- AC analysis)

    3.Rig up the circuit using multisim software and verify the results using

    oscilloscope

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    EXPECTED WAVEFORMS:

    RESULT:-

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    2.COMMON SOURCE AMPLIFIER

    AIM: a) To design a single stage FET Common Source amplifier with potential

    divider circuit using 2n4861 FET-N channel for the following specifications:

    VDD= 24V,ID= 1ma,VGS=2V,VPMAX=13V,RL=1K.

    b) To observe dc operating point, frequency response, & C.R.O waveforms.

    APPARATUS: Multisim soft ware.

    DESIGN PROCEDURE:

    VDSmin= Vpmax+ 1 - VGS

    VS=VRD= (VDD- VDS)/2

    RD=RS= VRD/ID

    VG=VR2=VS-VGS

    SELECT R2 = 1M

    R1=(VR1* R2)/VR2

    CIRCUIT DIAGRAM:

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    PROCEDURE:- 1. Rig up the circuit using multisim software and verify the

    results using DC operating point analysis (simulate----analysis ---- DC operating

    point)

    2. Rig up the circuit using multisim software and verify the results using AC

    analysis (Simulate ---- analysis ----- AC analysis)

    3..Rig up the circuit using multisim software and verify the results using

    Oscilloscope

    EXPECTED WAVEFORMS:

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    RESULT:

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    3.TWO STAGE RC COUPLED AMPLIFIER

    AIM:

    Q1) Design a single stage transistor amplifier with potential divider circuit

    (using an npn si transistors) with following specifications.

    IC=1.6ma,VCE=7.6v,RC=2.2k,VCC=12v, I1=10IB and =54. Verify the DCvalues (Voltage and current) at various nodes using Multisim software

    DESIGN:IB=IC/

    VCC=IC(RC+RE)+VCE;

    RE=0.516k V2=VBE+ICRE; V2=

    V2=I1R2; R2=V2/(I1=10IB) ;

    I1=VCC/(R1+R2) ; (R1+R2)= ;

    R1=

    PROCEDURE:Rig up the circuit using multisim software and verify the

    results using DC operating point analysis (simulate analysis DC

    operating point)

    Q2) Design a single stage transistor amplifier with potential divider circuit

    (using an npn si transistors) with following specifications.

    IC=2.32ma,VCE=5.7v,RC=2.2k,VCC=12v, I1=10IB and =33. Verify the DC

    values (Voltage and current) at various nodes using Multisim software

    DESIGN:

    IB=IC/=

    VCC=IC(RC+RE)+VCE;

    RE=0.51k V2=VBE+ICRE;

    V2=I1R2; R2=V2/(I1=10IB) ;

    I1=VCC/(R1+R2) ; (R1+R2)=

    PROCEDURE: Rig up the circuit using multisim software and verify the

    results using DC operating point analysis (simulate analysis DC

    operating point)

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    Q3) Cascade above two stages and find overall gain (choose Cc=4.7f,

    Ce=470f, hfe=50) find the frequency response, DC operating points and

    parameter sweep of load resister.

    ANALYSIS:

    Stage-2: AI2= -hfe/(1+hoeRL2) ;

    Ri2= hie+hreAI2RL2;

    Av2= -AI2*RL2/Ri2;

    Stage -1: RL1

    AI1=

    Ri1=

    Av1=

    Overall gain Av = Av1*Av2

    Avs = Av*Ri/(Ri+RS) ; Ri =

    CIRCUIT DIAGRAM:

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    PROCEDURE:- 1. Rig up the circuit using multisim software and verify the

    results using DC operating point analysis (simulate----analysis ---- DC operating

    point)

    2. Rig up the circuit using multisim software and verify the results using AC

    analysis (Simulate ---- analysis ----- AC analysis)

    3..Rig up the circuit using multisim software and verify the results using

    Oscilloscope

    EXPECTED WAVEFORMS:

    RESULT:

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    4.CURRENT SHUNT FEEDBACK AMPLIFIER

    AIM: Design current shunt feed back amplifier with a feedback resistance 5K

    using transistor BC 107. Obtain DC operating point and frequency response.

    APPARATUS: Multisim software.

    DESIGN PROCEDURE:

    I R

    I F

    R ER

    E F E

    I I I I I

    AI IR I C 2 IB2 IC1 IB1S B2 C1 B1 S

    I IC2 hFE 50, hFE 50

    B2 B1I R

    IC2 R CR1

    C1 C1 I 2I R

    IB1Rhie

    AI

    D 1AI

    AIF

    A

    DI =

    AV I R

    A 0 O C 2 C

    VF VS IS RS IF RS

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    CIRCUIT DIAGRAM:

    PROCEDURE:- 1. Rig up the circuit using multisim software and verify the

    results using DC operating point analysis (simulate----analysis ---- DC operating

    point)

    2. Rig up the circuit using multisim software and verify the results using AC

    analysis (Simulate ---- analysis ----- AC analysis)

    3..Rig up the circuit using multisim software and verify the results using

    Oscilloscope

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    EXPECTED WAVEFORMS:

    RESULT:

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    5.WIEN BRIDGE OSCILLATOR USING TRANSISTORS

    AIM:To study and calculate frequency of. Wein Bridge Oscillator.

    APPARATUS:

    Transistor (BC107)2no,

    Resistors10K - 4no,1K - 3no,2.2K, 33K, 6.8K,

    Capacitors - 10 F - 2no, 100uF, 0.01uF 2no, SDC Kit, CRO, Connecting

    wires.

    DESIGN PROCEDURE:

    Formula f =1/2(R1C1R2C2)

    Given R=10k, C=0.01uf

    If R1=R2 ; C1=C2

    fT = 1/ 2RC

    CIRCUITDIAGRAM:

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    PROCEDURE:

    1. Connections are made as per the circuit diagram

    2. Feed the output of the oscillator to a C.R.O by making adjustments in the

    Potentiometer connected in the +ve feedback loop, try to obtain a stable

    sine Wave.

    3. Measure the time period of the waveform obtained on CRO. & calculate

    the Frequency of oscillations.

    4. Repeat the procedure for different values of capacitance.

    MODEL WAVE FORM:

    RESULT:

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    6.RC PHASE SHIFT OSCILLATOR

    AIM:

    a) Design RC phaseshift oscillator to have resonant frequency of 6KHz.

    Assume R1= 100k, R2= 22K, RC= 4 K ,RE=1K & VCC= 12V.

    b)Obtain hfe for the above designed value for AV> - 29, R2 RC.

    APPARATUS: Multisim software.

    DESIGN PROCEDURE:

    A) Let R = 10K

    Fr = 1

    ___________

    2Rc(6+4K) WHERE K=Rc/R

    B)hfe 23= 29/K for sustained oscillations

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    CIRCUIT DIAGRAM:

    VCC

    12V

    VCC

    R1R3

    100kohm4kohm

    C2

    10C1

    Q24

    2N2222A10uF

    R2 11 100uF

    22kohmR41kohm

    0

    C6 C5 C4

    7

    9R7 R6 R5

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    PROCEDURE: Rig up the circuit using multisim software and verify theresults

    using Oscilloscope.

    RESULT:

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    7.CLASS A,AB,B,C POWER AMPLIFIERS

    AIM :

    To study the operation of Class A, Class AB, Class B, Class C power

    amplifiers.

    APPARATUS: Multisim soft ware.

    CIRCUIT DIAGRAM:

    V2 12V R2 R51kohm 1kohm

    47uFC2

    R3XSC1

    Q147uF 30kohm GR1 PN2369AC1

    TA B

    100ohm

    V1R450mV

    100ohm35.36mV_rms1000Hz0Deg

    THEORY:

    The classification of amplifiers is based on the position of the quiescent

    point and extent of the characteristics that is being used to determine the method

    of operation.

    There are 4 classes of operations.They are

    1.Class A 2.Class AB 3.Class B 4.Class C

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    CLASS A:- In class A operation the quiescent point and the input signal are such

    that the current in the output circuit (at the collector) flows for all times. Class A

    amplifier operates essentially over a linear portion of its characteristic there by

    giving rise to minimum of distortion .

    CLASS B:- In class B operation , the quiescent point is at an extreme end of the

    characteristic , so that under quiescent conditions the power drawn from the dc

    power supply is very small .If the input signal is sinusoidal, amplification takes

    place for only half cycle.

    CLASS AB:- A class AB amplifier is the one that operates between the two

    extremes defined for class A and Class B. Hence the output signal exists for

    more than 1800of the input signal.

    CLASS C :- In class C operation, the quiescent operating point is chosen such

    that output signal (voltage or current)is zero for more than on half of the input

    sinusoidal signal cycle.

    PROCEDURE:

    1. An input sine wave (peak-peak)of 50mV is applied to the circuit.

    2. connect the output to the C.R.O.

    3. varying R3value, observe and record the output waveforms for different

    classes of operation.

    4. Also observe the Vi& Vowaveforms using parameter sweep for different

    classes of operation.

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    OBSERVATIONS:

    CLASS A:

    CLASS AB :

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    CLASS B :

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    CLASS C :

    RESULT :

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    8.HIGH FREQUENCY COMMON BASE AMPLIFIER

    AIM - Design a common Base high frequency amplifier with a over all gain of30

    and Lower cut off frequency of 130 Hz and Higher cut frequency 10 MHz .

    Transistor Specifications: hib =

    22.6, hfb

    = -0.98, hrb

    = 2.910-4 ,

    hob

    = 0.49s,IC

    =

    1.35ma = -IE, VCE =5.85V, VEB= 0.6V, VCB= 5.25V.

    Verify the DC values (Voltage and current) at various nodes using Multisim software

    APPARATUS: Multisim software.

    DESIGN PROCEDURE:

    1. DESIGN OF BIASING CIRCUIT :

    VBE= 0.6V, VCE = 5.85V, IC = 1.35mA = -IE

    VCB = 5.25V

    Find the value of Re:

    KVL to Input:

    Find the value of RC:

    KVL to Output :

    VccICRC - VCB = 0

    RC=

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    2.DESIGN OF AMPLIFIER CIRCUIT :

    1.To find Cb

    Assume Rs = 100 Calculate the value of Cb

    f L= 1

    _____________

    2(Rs + Ri)Cb

    2. To calculate RL

    Av = - hfb RL/Ri

    Overall gain = Avs = Av * Ri/(Ri+Rs)

    For the above circuit Ri1=Ri = hib

    Avs = - hib * RL1/(Ri+Rs) ;

    RL1= RL// Rc

    3. To Calculate Shunt Capacitance Csh

    fh =1

    2RLC sh

    The Internal junction capacitance Cbc 3pf

    Csh = Cbc+ Csh

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    CIRCUIT DIAGRAM :

    XSC1

    GA B T

    Rs Cb10uF BC107BP 10uF Cb110 11 12 3100ohm

    Q1 Rc 8ReV15kohm R5 Csh1kohm

    1 m 1 o m p 7.07mV_rms 7VEE

    12V 61000Hz 2V0Deg VCC

    0

    PROCEDURE: 1.Rig up the circuit using multisim software and verify the

    results using DC operating point analysis (Simulate ------Analysis------ DC

    operating point)

    2. Rig up the circuit using multisim software and verify the results using AC

    analysis (Simulate--- Analysis--- AC analysis)

    RESULTS:

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    9.TWO STAGE RC COUPLED AMPLIFIER

    AIM:

    1. To study the Two-stage RC coupled amplifier.

    2. To measure the voltage gain of the amplifier at 1KHz.

    3. To obtain the frequency response characteristic and the band width of the

    amplifier.

    EQUIPMENT:

    Two stage RC coupled amplifier, trainer.

    1. Signal Generator.

    2. C.R.O

    3. Connecting patch cords.

    CIRCUIT DIAGRAM:

    VCC

    12V

    R1 RC R6R3 2.2kohm33kohm 2.2kohmCC 15kohm C2

    C1 Q1 10uF Q2 10uFRG BC107BP BC107BP

    15kohm10uF

    C3 OUTPUT

    INPUT V CE 10uF VO50mV R2 RE 10uF R4 R5

    5.1kohm 510ohm 2.7kohm 1kohm

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    PROCEDURE:

    1.Switch ON the power supply.

    2.Connect the signal generator with sine wave output 50mV p-p at the

    input terminals.

    3.Connect the C.R.O at output terminals of the module.

    4. Measure the voltage at the second stage of amplifier.

    5.Now vary the input frequency from 10Hz to 1MHz in steps,and for every

    value of input frequency note the output voltage keeping the input

    amplitude at constant value.

    6. Calculate the gain magnitude of the amplifier using the formula

    Gain = Vo/Vi

    Gain in dB= 20 log (Vo / Vi)

    7. Plot a graph of frequency versus gain (dB) of the amplifier. Sample

    frequency response graph is as shown in fig. Below.

    OBSERVATION:

    Vi= 50mV(p-p)

    Frequency VOGain =20 log

    (Vo/Vi)dB

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    FREQUENCY RESPONSE:

    0.707 VO/VI

    Gain VO/VI

    FL FH Frequency

    RESULT:

    The gain of the amplifier at 1 KHz is ------

    The BW of the amplifier is -------

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    10.CURRENT SHUNT FEEDBACK AMPLIFIER

    AIM:

    1.To study the current shunt feedback amplifier2.To measure the voltage gain of the amplifier at 1KHz.

    3.To obtain the frequency response characteristic and the band width

    of the amplifier.

    EQUIPMENT:

    Current shunt feed back amplifier trainer.

    4. Signal Generator.

    5. C.R.O

    6. Connecting patch cords.

    CIRCUIT DIAGRAM:

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    PROCEDURE:

    1.Switch ON the power supply.

    2.Connect the signal generator with sine wave output 50mV p-p at the

    input terminals.

    3.Connect the C.R.O at output terminals of the module.

    4.Measure the voltage at the second stage of amplifier.

    5.Now vary the input frequency from 10Hz to 1MHz in steps, and for

    each value of input frequency note the output voltage keeping the

    input amplitude at constant value.

    6. Calculate the gain magnitude of the amplifier using the formula

    Gain = Vo/Vi

    Gain in dB= 20 log (Vo / Vi)

    7. Plot a graph of frequency versus gain (dB) of the amplifier. Sample

    frequency response graph is as shown in fig. Below.

    OBSERVATIONS :

    Vi= 50mV(p-p)

    Frequency VO Gain =20 log (Vo/Vi)dB

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    FREQUENCY RESPONSE:

    RESULT:

    The gain of the amplifier at 1 KHz is ------

    The BW of the amplifier is -------

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    11.CLASS A/B/C/AB POWER AMPLIFIER

    AIM: To study the operation of Class A, Class B, Class AB and Class C power

    amplifiers.

    EQUIPMENT:

    1.Class/A/B/C/AB amplifier trainer

    2.Function generator.

    3.C.R.O

    4. Connecting patch cords.

    CIRCUIT DIAGRAM:

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    PROCEDURE:

    1.Connect the circuit as shown in the circuit diagram, and get the circuit

    verified by your Instructor.

    2.Connect the signal generator with sine wave at 1KHz and keep the

    amplitude at .5V (peak-to-peak)

    3.Connect the C.R.O across the output terminals.

    4.Now switch ON the trainer and see that the supply LED glows.

    5.Keep the potentiometer at minimum position, observe and record

    the waveform from the C.R.O.

    6.Slowly varying the potentiometer, observe the outputs for the

    Class A/B/AB/C amplifiers as shown in fig.

    CLASS A:

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    CLASS B:

    CLASS AB:

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    CLASS C :

    RESULT:

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    12.SINGLE TUNED VOLTAGE AMPLIFIER

    AIM: 1.To calculate the resonant frequency of tank circuit.

    2. To plot the frequency response of the tuned amplifier.

    EQUIPMENT:

    1. Tuned voltage amplifier trainer.

    2. Function generator.

    3. C.R.O.

    4. Connecting patch cords.

    CIRCUIT DIAGRAM:

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    PROCEDURE:

    1.Connect the circuit as shown in fig and get the circuit verified by

    your Instructor.

    2. Connect the signal generator with sine wave at the input and

    keep the amplitude to minimum position, and connect a C.R.O at

    output terminals of the circuit.

    3.Apply the amplitude between 1.6v to 4.4v to get the distortion

    less output sine wave.

    4.Now, vary the input frequency in steps and observe and record

    The output voltage.

    5.Calculate the gain of the tuned RF amplifier using the formula

    Gain = out put voltage/ input voltage.

    6.plot a graph with input frequency versus gain (in dBs)

    Gain (in dBs) = 20 log (Vo/Vi)

    Graph :-

    Gain

    Frequency

    RESULT:

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    13.HARTLEY AND COLPITTS OSCILLATORS

    AIM: To design Hartley and Colpitts Oscillatorsto have resonant frequency of 1KHz.

    APPARATUS:

    BJT(BC107),Resistors(2.2k,100k,10k,1k),

    Capacitors(10f,100f,0.33 f), Decade inductance box ,RPS.

    EQUIPMENT:

    1. SDC kit.

    2. Function generator.

    3. C.R.O.

    DESIGN PROCEDURE:

    Hartley Oscillator

    F = 1 / (2LeqC)Where Leq=L1+L2

    Colpitts Oscillator

    F = 1 / (2LCeq)Where Ceq= (c1*c2) / (c1+c2)

    CIRCUIT DIAGRAMS:HARTLEY OSCILLATOR:

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    COLPITTS OSCILLATOR:

    EXPECTED WAVEFORM:

    RESULT:

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    14.COMMON SOURCE FET AMPLIFIER

    AIM: 1. To obtain the frequency response of the common source FET Amplifier

    2. To find the Bandwidth.

    APPRATUS:

    N-channel FET (BFW11),Resistors (6.8K, 1M, 1.5K),Capacitors(0.1F, 47F)

    Regulated power Supply (0-30V), Function generator, CRO,CRO probes,Bread board,

    Connecting wires

    CIRCUIT DIAGRAM:

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    PROCEDURE:

    1. Connections are made as per the circuit diagram.

    2. A signal of 1 KHz frequency and 50mV peak-to-peak is applied at the

    Input of amplifier.

    3. Output is taken at drain and gain is calculated by using the expression,

    Av=V0/Vi

    4. Voltage gain in dB is calculated by using the expression,

    Av=20log 10(V0/Vi)

    5. Repeat the above steps for various input voltages.6. Plot Avvs. Frequency

    7. The Bandwidth of the amplifier is calculated from the graph using the

    Expression,

    Bandwidth BW=f2-f1

    Where f1is lower 3 dB frequency, f2is upper 3 dB frequency

    OBSERVATIONS:

    S.NO INPUT

    VOLTAGE(Vi)

    OUTPUT

    VOLTAGE(V0)

    VOLTAGE GAIN

    Av= (V0/Vi)

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    MODEL GRAPH:

    .

    RESULT:

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    15.SERIES VOLTAGE REGULATOR

    AIM : To study and design a Series voltage regulator and to observe the load

    regulation feature.

    EQUIPMENT :

    1. Series voltage regulated power supply trainer.

    2. Multimeter.

    3. Patch chords

    CIRCUIT DIAGRAM:

    3055 + -

    560E ILRs + -

    IR +

    500EUn Regulated - IZ VOInput

    VZ=12V50%

    PROCEDURE:

    1. Switch ON the power supply.

    2. Observe the Unregulated voltage at the output of rectifier.

    3. Connect this voltage to the input of series voltage regulator circuit.4. Keep the load resistance 1K at constant.

    5. Observe the output voltage VO = VZ-VBE

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    6. And also observe the voltage across RS,and values of IR,IL and IZ.

    7. Compare the practical values with theoretical values.

    8. By changing the load resistance, observe the output voltage and various

    currents.

    OBSERVATIONS:

    RL VO IR IZ IL

    LOAD REGULATION :

    VO

    RL

    RESULT:

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    16.SHUNT VOLTAGE REGULATOR

    AIM : To study and design a Shunt Regulator and to observe the load

    regulation feature.

    EQUIPMENT :

    1. Shunt regulated power supply trainer.

    2. Multimeter.

    3. Patch chords.

    CIRCUIT DIAGRAM:

    RS+ - + -

    220E+

    IL

    Un Regulated 8.2V IC 1K

    In put - RLVO

    50%3055

    PROCEDURE:

    1.Switch On the main power supply.

    2.Observe the unregulated voltage at the output of rectifier.

    3.Connect this voltage to the input of shunt Regulator circuit

    4.Keep the load resistance 1K constant.

    5.Observe the output voltage across the load resistor V0 =VZ+ VBE

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    6.Also observe IL, IS & IC.

    7.Compare the practical values with theoretical values.

    8.By changing the load resistance, observe the output voltage and

    various currents.

    OBSERVATIONS:

    RL VO IS IC IL

    LOAD REGULATION:

    VO

    RL

    RESULT: