embedded operating systems · pdf filee.g.: minix by a. tanenbaum, qnx (rtos), mach kernel 3.0...
TRANSCRIPT
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Embedded Operating Systems
Unit I and Unit II
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Syllabus – Unit I Operating System Concepts Real-Time Tasks and Types Types of Real-Time Systems Real-Time Operating Systems
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UNIT I
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Operating System
Manager: CPU, I/O, memory Abstraction: Hides details of h/w from the user Layers of protection: Users…supervisor Support: Applications run above Bit length and OS: 32-bit…64-bit 32-bit Windows 7 or 64-bit Windows 7 No. of apps don’t run on 64-bit ver ! Many cross compilers, IDEs don’t run on 64-bit ver !
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What’s an embedded system?
Wiki: An embedded system is a special-purpose
system in which the computer is completely encapsulated by or dedicated to the device or system it controls.
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Embedded Operating Systems Why Embedded Systems need OS? They are complex, run multiple tasks , have many I/Os and
networks to manage
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Embedded Operating Systems
eCos Embedded Linux RTLinux FreeDOS FreeRTOS LynxOS RTOS MicroSuse NetBSD OpenBSD Inferno (operating
system) ITROM
OSE OS-9 QNX RTEMS RTXC Quadros VxWorks Windows CE Windows XP Embedded SymbianOS T2 SDE
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Network OS (NOS) Specialized in managing networked systems alone E.g.: Windows NT, Microsoft server, Novell Netware
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Layers of OS
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History of OS MSDOS: 1980-81 Unix: 1970, Ken Thomson and Dennis Ritchie Windows: 1990s… Windows 3.0 Linux: 1991, Linus Torvalds
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Functions - OS Process management Memory management I/O Management File Management Support to Multiprogramming Protection Security Network management
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Kernel Functions Interrupt handling Task creation and scheduling Inter Process communication Support for I/O devices Memory allocation and deallocation File system management Network management
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Facts - kernel While loading OS, specific kernel options have to be
configured. This is w.r.t. h/w Changing Mother Board, Processor, memory require
kernel updates For E.S. boards, it is important to know type of board so
that kernel can be selected and configured
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Types of Kernel Monolithic Kernel Microkernel
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Monolithic Kernel It has simple design and is a large single process Runs entirely in single address space i.e.: kernel space
and in supervisory mode Kernel is bulky and is difficult to extend and maintain E.g.: Unix, Linux, MSDOS
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Monolithic Kernel
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Microkernel It is minimum amount of software to provide the
mechanisms needed to implement an OS mechanisms => low-level address, space management,
thread management, and IPC Kernel is broken down into separate processes (servers) Some of the processes (servers) run in kernel space and
some run in user-space E.g.: MINIX by A. Tanenbaum, QNX (RTOS), Mach kernel
3.0 by CMU
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Microkernel
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Tasks/Processes A program in execution is a process Task or a job can also be used to denote process Process can be in any one of 5 states broadly
1. New2. Ready3. Running4. Blocked5. Exit
For each task there is Task Control Block (TCB)
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State transition diagram of a process
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Task (Process) Control Block
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Multitasking Time multiplexing Context Context switch Overhead
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Task scheduling Techniques, methods.. Time, priority, order?? Scheduling policy of OS decides CPU bound tasks and I/O bound tasks CPU bound tasks are computation intensive I/O bound tasks need more I/O time
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Quality points that rate Scheduling algorithms
CPU utilization: % of time CPU working Response time: task waiting for CPU to respond Turnaround time (TAT): time interval from which the task
is presented to the system to the instance at which task exits after completion
Throughput rate: No. of tasks processed in unit time
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Scheduling Algorithms
1. Non-preemptive scheduling Co-operative scheduling Shortest job next Priority based scheduling
2. Preemptive scheduling Round robin scheduling Pre-emptive priority Pre-emptive SJN/ Shortest remaining time (SRT)
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Threads
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Interrupt Handling In OS interrupts are used either with h/w support or by
pure software ISR Interrupt latency Sequence of actions following an interrupt: Saving current context Determine ID of the interrupt Switch to new context Starting the execution of interrupt handler (ISR)
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Interrupts and Task Switching Task switching is accomplished by the mechanism of
interrupts
The total switching latency =interrupt latency + dispatch latency
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Inter Process (Task) Communications (IPC)
Where is communication needed? Processes in the same machine, and processes in
different machines might need to communicate to share data, or to send queries and receive responses Two of the task communication methods are
i) Shared memoryii) Message passing – e.g.: Semaphores, Pipes, Mailbox, RPC
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Shared Memory
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Message Passing
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Producer – Consumer Paradigm Sender – receiver communication is a Producer –
Consumer Paradigm Consumer consumes if producer produces Producer needs to produce as long as consumer
consumes it Bounded buffer problem: sender side…receiver side
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Task SynchronizationThere are three aspects to it. First, how different tasks with conflicting actions can
cause havoc. Second, how to avoid such situations and third, if such a
situation occurs, how to get out of it.
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Task Synchronization Race Condition Critical Section Solution to Race Condition Automicity Disable interrupts Locks - mutex
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Deadlocks What is Deadlock? What are the Necessary conditions? Mutual exclusion Hold & wait Non-Preemption Circular Wait
How to deal with them? Ignore, avoid, prevent, detect and recover
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Tasks and their Conflicts Priority Inversion ? Solution to this : Priority Inheritance and Priority Ceiling
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Device Drivers in OS What are they? What are the types? What are the design issues?
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Layers Associated with Device Driver
I/O Service I/O Request
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Real-Time Systems & Real-time Tasks It consists of many tasks with at least one time
constrained task Real-Time tasks Hard real-time and Soft real-time Can be pre-emptive or non-preemptive Periodic, Aperiodic, Sporadic
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What does an RTOS do?
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Kernel Services of an RTOS
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Real-time Scheduling Algorithms
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UNIT II
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Syllabus – Unit II Processor basics Integrated Processors:
SOC History of ARM
Processors Hardware Platforms ARM Architecture Interrupt Vector Table ARM Programming
Assembly Language Instruction Set Read only and Read-Write
Memory ARM9 ARM-Cortex-M3 Case Study of BeagleBone
Black Board
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Embedding: Multiple processors, memories, multiple standard source solutions (IP Cores), analog units
SYSTEM-ON-CHIP (SOC)
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A SOC Embedded System-with two internal ASICs, two internal processor and peripheral interfaces
ASIPs
Program data and memory Port
IPs
Data Address generator
Program Address generator
Multiprocessor DSP
RISC processor
Other Digital circuits-Timer,MUXs
Port Interfaces
DMAC
Interrupt Controller
Analog circuits,A /D
EEPROM
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History of the ARM Processor Acorn Computers Ltd. (UK) developed ARM1,
ARM2…ARM5 Acorn Computers Ltd. + Apple Computers + VLSI Tech.
Group Advanced RISC Machines Ltd. ARM6, ARM 7 …most popular and still widely used ARM9, ARM10 ,ARM11 CORTEX 90% of embedded 32-bit RISC processors used are ARM
processors
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The ARM Core What is meant by the ‘core’? The core is the ‘processing unit’ or the ‘computing
engine’ It has all the computing power, and this aspect is
decided by the architecture, which represents the basic design of the processor
The ARM Microcontroller is ARM core with peripherals added to it
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ARM SOC – Core with Peripherals
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The RISC Architecture These apply to most of the instructions of ARM1) Instructions are of the same size, that is, 32 bits2) Instructions are executed in one cycle3) Only the load and store instructions access memory
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Advanced Features of ARM Thumb MMU and MPU Cache Debug interface Embedded ICE macrocell Fast multiplier Enhanced instructions Jazelle DBX (Direct Bytecode eXecution) Vector floating point unit Synthesizable
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Features of ARM which make it special Data bus width Computational capability Low Power Pipelining Multiple Register instructions DSP Enhancements
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Operating Modes Of ARM
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Register Set
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CPSR
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Interrupt Vector Table
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Programming the ARM processor Can be done in Assembly as well as in high level languagesAssembly Language Programming: Instruction set
features:1) Instructions are of the same size, that is, 32 bits2) Only the load and store instructions access memory3) Barrel shifter..more than I bit of shift/rotation4) Conditions can be appended to the instructionsData Types and Data Alignment: 32-bit…2 words each 16-bits…byte Both Little Endian and Big Endian supported 4 banks of memory
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Instruction Set
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Data Processing Instructions Move
Shift
Move and Shift together
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Conditional Execution
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Data Processing Instructions Arithmetic
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Data Processing Instructions Logical
Compare
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Load-Store Instructions
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Branch Instructions
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Loading constants-immediate mode ARM has the limitation that its instruction size should nor
exceed 32 bits This means that the constant should fit in the word
length of 32 bits along with the opcode, condition code, register code and other information
So, we can’t have a 32-bit constant embedded in the instruction!
ARM uses an ingenious technique… the use of rotation of a small number to generate a large number
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Constants
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Multiple Load and Store
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Readonly and Read/Write Memory The two memory areas defined by the compiler are
‘Readonly’ for code and ‘Read/write’ memory for data This corresponds to ROM and RAM RAM is used for intermediate results, for temporary
storage, etc., as this is volatile memory In the readonly memory, data is written using directives
like DCD, DCW, etc.
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ARM 9
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ARM 9 32-bit Harvard Architecture 5-stage pipeline DSP instructions E.g.: LPC29XX (2917, 2919, 2927, 2927) 125 MHz core, 2.0 USB host-device, CAN, LIN, 56KB
SRAM, 768KB Flash, three10-bit ADC, multiple serial & parallel interfaces
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ARM Cortex-M3
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ARM Cortex-M3 Up to 100 MHz CPU frequency 3-stage pipeline Harvard architecture Separate instruction, data and peripheral bus 64 KB SRAM, 512KB Flash Ethernet MAC, USB host-device 8-channel DMA controller 4 UARTs, 2 CAN ports, 2-SSP controllers, SPI interface 3 I2C interfaces, 8-channel 12-bit ADC, 10-bit DAC, PWM 4 timers, RTC, 70 general purpose I/O pins
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BeagleBone Black low-cost, open source, community-supported development
platform for ARM® Cortex™-A8 processor developers and hobbyists
Shipped with the Debian GNU/Linux™ in onboard FLASH Other Linux distributions and operating systems are also
supported on BeagleBone Black including: Ubuntu, Android, Fedora
http://www.ti.com/tool/beaglebk http://beagleboard.org/ http://elinux.org/Beagleboard:BeagleBoneBlack – to get all h/w
details Blogs
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BeagleBone Black
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BeagleBone Black – Features Processor : 1GHz AM3359 Sitara ARM Cortex-A8 512 DDR Memory On-chip 10/100 Ethernet 512MB DDR3 RAM 4GB 8-bit eMMC on-board flash storage with Debian GNU/Linux 3D graphics accelerator NEON floating-point accelerator 2x PRU 32-bit microcontrollers USB client for power & communications USB host Ethernet HDMI 2x 46 pin headers
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BeagleBone Black – Programming BoneScript JavaScript C++ programming with Eclipse IDE with CDT
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Thank you