embedded system arm
DESCRIPTION
Diffrence Between RISC and CISC and ARM Programmer's model.TRANSCRIPT
Q:1
CISC – Complex Instruction Set Computer
Characterized by many instructions which can perform involved operations
CISC code is Compact
Can be many clock cycles per instruction
Large Silicon Area > Higher cost per die
Von Neumann Architecture – Same Program and Data Memory
RISC – Reduced Instruction Set Computer
More modern architecture
One instruction executed per clock cycle > very fast
Harvard Architecture
Separate Program and data memory
Q:2
As an example, the following code performs a 64-bit addition of two numbers held in r0-r1 and
r2-r3, using the C condition code flag to store the intermediate carry:
Q:3
As an example, the following code performs a 64-bit addition of two numbers held in r0-r1 and
r2-r3, using the C condition code flag to store the intermediate carry:
Q:2
Q:2.2
Data Processing Instructions:
ARM data processing instructions enable the programmer to perform arithmetic
and logical operations on data values in registers. All other instructions just
move data around and control the sequence of program execution, so the data
processing instructions are the only instructions which modify data values.
By default data processing instructions does not effect the conditional flags. To cause the conditional
flags to be updated, post fixing the instruction with s.
Sr.No Instruction Operation
1 ADD r0,r1,r2 r0 = r1+r2
2 ADC r0,r1,r2 r0 = r1+r2+c
Internal organization of ARM Register Bank (r0 to r15)
Two Read ports to A Bus and B Bus
One Write port from ALU Bus
Additional read / write port for r15
Barrel Shifter : shift or rotate second operand by any number of bits
ALU performs arithmetic and logical functions
Dedicated PC incrementer
3 SUB r0,r1,r2 r0 = r1 – r2
4 SBC r0,r1,r2 r0 = r1 - r2 – Not (C)
5 RSB r0,r1,r2 r0 = r2 - r1
6 RSC r0,r1,r2 r0 = r2-r2 - Not (C )
Sr. No Instruction Operation
1 CMP r1,r2 r1 - r2 and set the flag register
2 CMN r1,r2 r2 + r1 and set the f lag register
3 TST r1,r2 r1 and r2 and set the flag register
4 TEQ r1,r2 r1 EOR r2 and set the flag register
Sr. No Instruction Operation
1 AND r0,r1,r2 r0 = r1 and r2
2 ORR r0,r1,r2 r0 = r1 or r2
3 EOR r0,r1,r2 r0 = r1 xor r2
4 BIC r0,r1,r2 r0 = r1 and (not) r2
Q:2.3
Q:3
Assembler: A program that translates assembly language software into the machine codes placed
in a file called ‘.exe’ (executable) file.
Linker: A program that links the compiled codes with the other codes and provides the input for a loader or locator.
2) ES: An embedded system is one that has computer-hardware with software embedded in it as one of
its most important component.
ASIC: ASICs are designed using the VLSI design tools with processor GPP or ASIP and analog
circuits embedded into the design. The designing is done using the Electronic Design
Automation (EDA) tool.
FPGA: These are Field Programmable Gate Arrays on a chip. The chip has a large number of
arrays with each element having fusable links. Each element of array consists of several XOR,
AND, OR, multiplexer, demultiplexer and tristate gates. By appropriate programming of the
fusable links, a design of a complex digital circuit is created on the chip.