Richard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page i 2009-3-20 #2EMBEDDED SYSTEMS DESIGN AND VERIFICATION 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page ii 2009-3-20 #3I NDUST RI AL I NFORMAT I ON T ECHNOL OGY SERI ESSer i es Edi t orRICHARD ZURAWSKIIndustrial Communication Technology Handbook Edited by Richard ZurawskiEmbedded Systems Handbook Edited by Richard Zurawski Electronic Design Automation for Integrated Circuits Handbook Edited by Luciano Lavagno, Grant Martin, and Lou SchefferIntegration Technologies for Industrial Automated Systems Edited by Richard Zurawski Automotive Embedded Systems Handbook Edited by Nicolas Navet and Franoise Simonot-LionEmbedded Systems Handbook, Second Edition Edited by Richard Zurawski 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page iii 2009-3-20 #4I NDUST RI AL I NFORMAT I ON T ECHNOL OGY SERI ESEMBEDDED SYSTEMS HANDBOOKS E C O N D E D I T I O NEMBEDDED SYSTEMS DESIGN AND VERIFICATIONEdited byRichard ZurawskiISA CorporationSan Francisco, California, U.S.A. 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page iv 2009-3-20 #3CRC PressTaylor & Francis Group6000 Broken Sound Parkway NW, Suite 300Boca Raton, FL 33487-2742 2009 by Taylor & Francis Group, LLC CRC Press is an imprint of Taylor & Francis Group, an Informa businessNo claim to original U.S. Government worksPrinted in the United States of America on acid-free paper10 9 8 7 6 5 4 3 2 1International Standard Book Number-13: 978-1-4398-0755-2 (Hardcover)This book contains information obtained from authentic and highly regarded sources. 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For orga-nizations that have been granted a photocopy license by the CCC, a separate system of payment has been arranged.Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for identification and explanation without intent to infringe.Library of Congress Cataloging-in-Publication DataEmbedded systems handbook : embedded systems design and verification / edited by Richard Zurawski. -- 2nd ed.p. cm. -- (Industrial information technology series ; 6)Includes bibliographical references and index.ISBN-13: 978-1-4398-0755-2 (v. 1)ISBN-10: 1-4398-0755-8 (v. 1)ISBN-13: 978-1-4398-0761-3 (v. 2)ISBN-10: 1-4398-0761-2 (v. 2)1. Embedded computer systems--Handbooks, manuals, etc. I. Zurawski, Richard. II. Title. III. Series.TK7895.E42E64 2009004.16--dc22 2008049535Visit the Taylor & Francis Web site athttp://www.taylorandfrancis.comand the CRC Press Web site athttp://www.crcpress.com 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page v 2009-3-20 #6DedicationTo Celine, as always. 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page vii 2009-3-20 #8ContentsPreface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ixAcknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxvEditor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxviiContributors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxixInternational Advisorv Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxxiPart I System-Level Design and VerificationI Real-Time in Networked Embedded Svstems Hans Hansson, Tomas Nolte,Mikael Sjdin, and Daniel Sundmark . . . . . . . . . . . . . . . . . . . . . . .2 Design of Embedded Svstems Luciano Lavagno and Claudio Passerone . . . 2-I3 Models of Computation for Distributed Embedded SvstemsAxel Jantsch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-I4 Embedded Sofware Modeling and Design Marco Di Natale . . . . . . . . . 4-I3 Languages for Design and Verifcation Stephen A. Edwards . . . . . . . . . . 5-I6 Svnchronous Hvpothesis andPolvchronous Languages DumitruPotop-Butucaru,Robert de Simone, and Jean-Pierre Talpin . . . . . . . . . . . . . . . . . . . . . 6-I7 Processor-Centric Architecture DescriptionLanguages Steve Leibson, HimanshuSanghavi, and Nupur Andrews . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-I8 Network-Readv, Open-Source Operating Svstems for EmbeddedReal-Time Applications Ivan Cibrario Bertolotti . . . . . . . . . . . . . . . . 8-I9 Determining Bounds on Execution Times Reinhard Wilhelm . . . . . . . . . 9-II0 Performance Analvsis of Distributed Embedded Svstems Lothar Tiele, ErnestoWandeler, and Wolfgang Haid . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-III Power-Aware Embedded Computing Margarida F. Jacome and AnandRamachandran . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-Ivii 2009 by Taylor & Francis Group, LLC1-3Richard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page viii 2009-3-20 #9viii ContentsPart II Embedded Processors and System-on-Chip DesignI2 Processors for Embedded Svstems Steve Leibson . . . . . . . . . . . . . . . . 12-II3 Svstem-on-Chip Design Grant Martin . . . . . . . . . . . . . . . . . . . . . 13-II4 SoC Communication Architectures: From Interconnection Buses toPacket-Switched NoCs Jos L. Ayala, Marisa Lpez-Vallejo, Davide Bertozzi, andLuca Benini . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-II3 Networks-on-Chip: An Interconnect Fabric for Multiprocessor Svstems-on-ChipFrancisco Gilabert, Davide Bertozzi, Luca Benini, and Giovanni De Micheli . . . 15-II6 Hardware/Sofware Interfaces Design for SoC Katalin Popovici, Wander O.Cesrio, Flvio R. Wagner, and A. A. Jerraya . . . . . . . . . . . . . . . . . . . 16-II7 FPGA Svnthesis and Phvsical Design Mike Hutton and Vaughn Betz . . . . . 17-IPart III Embedded System Security and Web ServicesI8 Design Issues in Secure Embedded Svstems Anastasios G. Fragopoulos, Dim-itrios N. Serpanos, and Artemios G. Voyiatzis . . . . . . . . . . . . . . . . . . . 18-II9 Web Services for Embedded Devices Hendrik Bohn andFrank Golatowski . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-I 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page ix 2009-3-20 #I0PrefaceIntroductionApplication domains have had a considerable impact on the evolution of embedded svstems in termsof required methodologies and supporting tools, and resulting technologies. Multimedia and net-work applications, the most frequentlv reported implementation case studies at scientifc conferenceson embedded svstems, have had a profound infuence on the evolution of embedded svstems withthe trend now toward multiprocessor svstems-on-chip (MPSoCs), which combine the advantagesof parallel processing with the high integration levels of svstems-on-chip (SoCs). Manv SoCs todavincorporate tens of interconnected processors; as projected in the 2006 edition of the InternationalTechnology Roadmap for Semiconductors, the number of processor cores on a chip will reach over800 bv 2020. Te design of MPSoCs invariablv involves integration of heterogeneous hardware andsofware IP components, an activitv which still lacks a clear theoretical underpinning, and is a focusof manv academic and industrv projects.Embedded svstems have also been used in automotive electronics, industrial automated svstems,building automation and control (BAC), train automation, avionics, and other felds. For instance,trends have emerged for the SoCs to be used in the area of industrial automation to implementcomplex feld-area intelligent devices that integrate the intelligent sensor/actuator functionalitv bvproviding on-chip signal conversion, data and signal processing, and communication functions.Similar trends can also be seen in the automotive electronic svstems. On the factorv foor, micro-controllers are nowadavs embedded in feld devices such as sensors and actuators. Modern vehiclesemplov as manv as hundreds of microcontrollers. Tese areas, however, do not receive, for variousreasons, as much attention at scientifc meetings as the SoC design as it meets demands for com-puting power posed bv digital signal processing (DSP), and network and multimedia processors, forinstance.Most of the mentioned application areas require real-time mode of operation. So do some mul-timedia devices and gadgets, for clear audio and smooth video. What, then, is the major diferencebetween multimedia and automotive embedded applications, for instance: Braking and steering svs-tems in a vehicle, if implemented as Brake-bv-Wire and Steer-bv-Wire svstems, or a control loop of ahigh-pressure valve in ofshore exploration, are examples of safetv-critical svstems that require a highlevel of dependabilitv. Tese svstems must observe hard real-time constraints imposed bv the svstemdvnamics, that is, the end-to-end response times must be bounded for safetv-critical svstems. A vio-lation of this requirement mav lead to considerable degradation in the performance of the controlsvstem, and other possiblv catastrophic consequences. On the other hand, missing audio or videodata mav result in the users dissatisfaction with the performance of the svstem.Furthermore, in most embedded applications, the nodes tend to be on some sort of a network.Tere is a clear trend nowadavs toward networking embedded nodes. Tis introduces an additionalconstraint onthe designof this kind of embedded svstems: svstems comprising a collectionof embed-ded nodes communicating over a network and requiring, in most cases, a high level of dependabilitv.Tis extra constraint has to do with ensuring that the distributed application tasks execute in a deter-ministic wav (need for application tasks schedulabilitv analvsis involving distributed nodes and thecommunication network), in addition to other requirements such as svstem availabilitv, reliabilitv,and safetv. In general, the design of this kind of networked embedded svstems (NES) is a challenge initself due to the distributednature of processing elements, sharing commoncommunicationmedium,and, frequentlv, safetv-critical requirements.ix 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page x 2009-3-20 #IIx PrefaceTe tvpe of protocol used to interconnect embedded nodes has a decisive impact on whetherthe svstem can operate in a deterministic wav. For instance, protocols based on random mediumaccess control (MAC) such as carrier sense multiple access (CSMA) are not suitable for this tvpeof operation. On the other hand, time-triggered protocols based on time division multiple access(TDMA) MAC access are particularlv well suited for the safetv-critical solutions, as thev providedeterministic access to the medium. In this categorv, TTP/C and FlexRav protocols (FlexRav sup-ports a combination of both time-triggered and event-triggered transmissions) are the most notablerepresentatives. Both TTP/Cand FlexRav provide additional built-in dependabilitv mechanisms andservices which make themparticularlv suitable for safetv-critical svstems, such as replicated channelsand redundant transmission mechanisms, bus guardians, fault-tolerant clock svnchronization, andmembership service.Te absence of NES from the academic curriculum is a troubling realitv for the industrv. Tefocus is mostlv on a single-node design. Specialized networks are seldom mentioned, and if at all,then controller area network (CAN) and FlexRav in the context of embedded automotive svstemsa trendv area for examplesbut ina superfcial wav. Specialized communicationnetworks are seldomincluded in the curriculumof ECE programs. Whatever the reason for this, some engineering gradu-ates involved inthe development of embedded svstems indiverse applicationareas will learnthe tradethe hard wav. A similar situation exists with conferences where applications outside multimedia andnetworking are seldom used as implementation case studies. A notable exception is the IEEE Inter-national Svmposiumon Industrial Embedded Svstems that emphasizes research and implementationreports in diverse application areas.To redress this situation, the second edition of the Embedded System Handbook pavs consid-erable attention to the diverse application areas of embedded svstems that have in the past fewvears witnessed an upsurge in research and development, implementation of new technologies, anddeplovment of actual solutions and technologies. Tese areas include automotive electronics, indus-trial automated svstems, and BAC. Te common denominator for these application areas is theirdistributed nature and use of specialized communication networks as a fabric for interconnectingembedded nodes.In automotive electronic svstems [I], the electronic control units are networked bv means ofone of the automotive communication protocols for controlling one of the vehicle functions, forinstance, electronic engine control, antilocking brake svstem, active suspension, andtelematics. Tereare a number of reasons for the automotive industrvs interest in adopting feld-area networks andmechatronic solutions, known bv their generic name as X-bv-Wire, aiming to replace mechanical orhvdraulic svstems bv electrical/electronic svstems. Te main factors seem to be economic in nature,improved reliabilitv of components, and increased functionalitv to be achieved with a combinationof embedded hardware and sofware. Steer-bv-Wire, Brake-bv-Wire, or Trottle-bv-Wire svstemsare examples of X-bv-Wire svstems. Te dependabilitv of X-bv-Wire svstems is one of the mainrequirements and constraints on the adoption of these kinds of svstems. But, it seems that certainsafetv-critical svstems such as Steer-bv-Wire and Brake-bv-Wire will be complemented with tradi-tional mechanical/hvdraulic backups for reasons of safetv. Another equallv important requirementfor X-bv-Wire svstems is to observe hard real-time constraints imposed bv the svstem dvnamics; theend-to-end response times must be bounded for safetv-critical svstems. A violation of this require-ment mav lead to degradation in the performance of the control svstem, and other consequences asa result. Not all automotive electronic svstems are safetv critical, or require hard real-time response;svstem(s) to control seats, door locks, internal lights, etc., are some examples. With the automotiveindustrv increasinglv keen on adopting mechatronic solutions, it was felt that exploring in detail thedesign of in-vehicle electronic embedded svstems would be of interest to the readers.In industrial automation, specialized networks [2] connect feld devices such as sensors and actu-ators (with embedded controllers) with feld controllers, programmable logic controllers, as wellas manmachine interfaces. Ethernet, the backbone technologv of omce networks, is increasinglvbeing adopted for communication in factories and plants at the feld level. Te random and native 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xi 2009-3-20 #I2Preface xiCSMA/CD arbitration mechanism is being replaced bv other solutions allowing for deterministicbehavior required in real-time communication to support sof and hard real-time deadlines, timesvnchronization of activities required to control drives, and for exchange of small data records char-acteristic of monitoring and control actions. Avarietv of solutions have been proposed to achieve thisgoal [3]. Te use of wireless links with feld devices, such as sensors and actuators, allows for fexibleinstallation and maintenance and mobile operation required in case of mobile robots, and alleviatesproblems associated with cabling [4]. Te area of industrial automation is one of the fastest-growingapplication areas for embedded svstems with thousands of microcontrollers and other electroniccomponents embedded in feld devices on the factorv foor. Tis is also one of the most challeng-ing deplovment areas for embedded svstems due to unique requirements imposed bv the industrialenvironment which considerablv difer from those one mav be familiar with from multimedia ornetworking. Tis application area has received considerable attention in the second edition.Another fast-growing application area for embedded svstems is building automation [3]. Buildingautomation svstems aim at the control of the internal environment, as well as the immediate exter-nal environment of a building or building complex. At present, the focus of research and technologvdevelopment is on buildings that are used for commercial purposes such as omces, exhibition centers,and shopping complexes. Some of the main services ofered bv the building automation svstems tvp-icallv include climate control to include heating, ventilation, and air conditioning; visual comfort tocover artifcial lighting; control of davlight; safetv services such as fre alarm and emergencv soundsvstem; securitv protection; control of utilities such as power, gas, and water supplv; and internaltransportation svstems such as lifs and escalators.Tis books aims at presenting a snapshot of the state-of-the-art embedded svstems with an empha-sis on their networking and applications. It consists of 48 contributions written bv leading expertsfrom industrv and academia directlv involved in the creation and evolution of the ideas and tech-nologies discussed here. Manv of the contributions are from the industrv and industrial researchestablishments at the forefront of developments in embedded svstems. Te presented material is inthe formof tutorials, research survevs, and technologv overviews. Te contributions are divided intoparts for cohesive and comprehensive presentation. Te reports on recent technologv developments,deplovments, and trends frequentlv cover material released to the profession for the verv frst time.OrganizationEmbedded svstems is a vast feld encompassing various disciplines. Not everv topic, however impor-tant, can be covered in a book of a reasonable volume and without superfcial treatment. Te topicsneed to be chosen carefullv: material for research and reports on novel industrial developments andtechnologies need to be balanced out; a balance also needs to be struck in treating so-called coretopics andnewtrends, andother aspects. Te time-to-market is another important factor inmakingthese decisions, along with the availabilitv of qualifed authors to cover the topics.Tis book is divided into two volumes: Embedded Svstems Design and Verifcation (Volume I)and Networked Embedded Svstems (Volume II). Volume I provides a broad introductionto embed-ded svstems design and verifcation. It covers both fundamental and advanced topics, as well as novelresults and approaches, fairlv comprehensivelv. Volume II focuses on NES and selected applicationareas. It covers the automotive feld, industrial automation, and building automation. In addition,it covers wireless sensor networks (WSNs), although from an application-independent viewpoint.Te aim of this volume was to introduce actual NES implementations in fast-evolving areas which,for various reasons, have not received proper coverage in other publications. Diferent applicationareas, in addition to unique functional requirements, impose specifc restrictions on performance,safetv, and qualitv-of-service (OoS) requirements, thus necessitating adoption of diferent solutionswhich in turn give rise to a plethora of communication protocols and svstems. For this reason, the 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xii 2009-3-20 #I3xii Prefacediscussion of the internode communication aspects has been deferred to this part of the book wherethe communication aspects are discussed in the context of specifc applications of NES.One of the main objectives of anv handbook is to give a well-structured and cohesive descriptionof fundamentals of the area under treatment. It is hoped that Volume I has achieved this objective.Everv efort was made to ensure each contribution in this volume contains an introductorv materialto assist beginners with the navigation through more advanced issues. Tis volume does not striveto replicate, or replace, universitv level material. Rather, it tries to address more advanced issues, andrecent research and technologv developments.Te specifcs of the design automation of integrated circuits have been deliberatelv omitted in thisvolume to keep it at a reasonable size in viewof the publication of another handbook that covers theseaspects comprehensivelv, namelv, Te Electronic Design Automation for Integrated Circuits Handbook,CRC Press, Boca Raton, Florida, 2003, Editors: Lou Schefer, Luciano Lavagno, and Grant Martin.Te material covered in the second edition of the Embedded Svstems Handbook will be of interestto a wide spectrum of professionals and researchers from industrv and academia, as well as gradu-ate students from the felds of electrical and computer engineering, computer science and sofwareengineering, and mechatronics engineering.Tis edition can be used as a reference (or prescribed text) for universitv (post) graduate courses.It provides the core material on embedded svstems. Part II, Volume II, is suitable for a course onWSNs while Parts III and IV, Volume II, can be used for a course on NES with a focus on automotiveembedded svstems or industrial embedded svstems, respectivelv; this mav be complemented withselected material from Volume I.In the following, the important points of each chapter are presented to assist the reader in identi-fving material of interest, and to view the topics in a broader context. Where appropriate, a briefexplanation of the topic under treatment is provided, particularlv for chapters describing noveltrends, and for novices in mind.Volume I. Embedded Systems Design and VerificationVolume I is divided into three parts for quick subject matter identifcation. Part I, Svstem-LevelDesign and Verifcation, provides a broad introduction to embedded svstems design and verif-cation covered in II chapters: Real-time in networked embedded svstems, Design of embeddedsvstems, Models of computation for distributed embedded svstems, Embedded sofware model-ing and design, Languages for design and verifcation, Svnchronous hvpothesis and polvchronouslanguages, Processor-centric architecture description languages, Network-readv, open sourceoperating svstems for embedded real-time applications, Determining bounds on execution times,Performance analvsis of distributed embedded svstems, and Power-aware embedded comput-ing. Part II, Embedded Processors and Svstem-on-Chip Design, gives a comprehensive overview ofembedded processors, and various aspects of SoC, FPGA, and design issues. Te material is coveredin six chapters: Processors for embedded svstems, Svstem-on-chip design, SoC communicationarchitectures: From interconnection buses to packet-switched NoCs, Networks-on-chip: An inter-connect fabric for multiprocessor svstems-on-chip, Hardware/sofware interfaces design for SoC,and FPGA svnthesis and phvsical design. Part III, Embedded Svstems Securitv and Web Services,gives an overview of Design issues in secure embedded svstems and Web services for embeddeddevices.Part I. System-Level Design and VerificationAnauthoritative introductiontoreal-time svstems is providedinthe chapter Real-time innetworkedembedded svstems. Tis chapter covers extensivelv the areas of design and analvsis with some 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xiii 2009-3-20 #I4Preface xiiiexamples of analvsis and tools; operating svstems (an in-depth discussion of real-time embeddedoperating svstems is presented in the chapter Network-readv, open source operating svstems forembedded real-time applications); scheduling; communications to include descriptions of theISO/OSI reference model, MAC protocols, networks, and topologies; component-based design; aswell as testing and debugging. Tis is essential reading for anvone interested in the area of real-timesvstems.Acomprehensive introduction to a design methodologv for embedded svstems is presented in thechapter Design of embedded svstems. Tis chapter gives an overviewof the design issues and stages.It then presents, in some detail, the functional design; function/architecture and hardware/sofwarecodesign; and hardware/sofware co-verifcation and hardware simulation. Subsequentlv, it discussesselected sofware and hardware implementation issues. While discussing diferent stages of designand approaches, it also introduces and evaluates supporting tools. Tis chapter is essential readingfor novices for it provides a framework for the discussion of the design issues covered in detail in thesubsequent chapters in this part.Models of computation (MoCs) are essentiallv abstract representations of computing svstems, andfacilitate the design and validation stages in the svstem development. An excellent introduction tothe topic of MoCs, particularlv for embedded svstems, is presented in the chapter Models of com-putation for distributed embedded svstems. Tis chapter introduces the origins of MoCs, and theirevolution from models of sequential and parallel computation to attempts to model heterogeneousarchitectures. In the process it discusses, in relative detail, selected nonfunctional properties suchas power consumption, component interaction in heterogeneous svstems, and time. Subsequentlv,it reviews diferent MoCs to include continuous time models, discrete time models, svnchronousmodels, untimed models, data fowprocess networks, Rendezvous-based models, and heterogeneousMoCs. Tis chapter also presents a new framework that accommodates MoCs with diferent timingabstractions, and shows how diferent time abstractions can serve diferent purposes and needs. Teframework is subsequentlv used to studv coexistence of diferent computational models, specifcallvthe interfaces between two diferent MoCs and the refnement of one MoC into another.Models and tools for embedded sofware are covered in the chapter Embedded sofware modelingand design. Tis chapter outlines challenges in the development of embedded sofware, and is fol-lowedbv anintroductionto formal models andlanguages, andto schedulabilitv analvsis. Commercialmodeling languages, Unifed Modeling Language and Specifcationand DescriptionLanguage (SDL),are introduced in quite some detail together with the recent extensions to these two standards. Tischapter concludes with an overview of the research work in the area of embedded sofware design,and methods and tools, such as Ptolemv and Metropolis.An authoritative introduction to a broad range of design and verifcation languages used inembedded svstems is presented in the chapter Languages for design and verifcation. Tis chaptersurvevs some of the most representative and widelv used languages divided into four main categories:languages for hardware design, for hardware verifcation, for sofware, anddomain-specifc languages.It covers (I) hardware design languages: Verilog, VHDL, and SvstemC; (2) hardware verifcationlanguages: OpenVera, the e language, Sugar/PSL, and SvstemVerilog; (3) sofware languages: assemblvlanguages for complex instruction set computers, reduced instruction set computers (RISCs), DSPs,and verv-long instruction word processors; and for small (4- and 8-bit) microcontrollers, the C andC++ Languages, Iava, and real-time operating svstems; and (4) domain-specifc languages: Kahnprocess networks, svnchronous datafow, Esterel, and SDL. Each group of languages is characterizedfor their specifc application domains, and illustrated with ample code examples.An in-depth introduction to svnchronous languages is presented in the chapter Te svnchronoushvpothesis and polvchronous languages. Before introducing the svnchronous languages, this chap-ter discusses the concept of svnchronous hvpothesis, the basic notion, mathematical models, andimplementation issues. Subsequentlv, it gives an overview of the structural languages used formodeling and programming svnchronous applications, namelv, imperative languages Esterel and 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xiv 2009-3-20 #I3xiv PrefaceSvncCharts that provide constructs to deal with control-dominated programs, and declarative lan-guages Lustre and Signal that are particularlv suited for applications based on intensive data compu-tation and datafow organization. Te future trends section discusses looselv svnchronized svstems,as well as modeling and analvsis of polvchronous svstems and multiclock/polvchronous languages.Te chapter Processor-centric architecture description languages (ADL) covers state-of-the-artspecifcation languages, tools, and methodologies for processor development used in industrv andacademia. Te discussion of the languages is centered around a classifcation based on four cate-gories (based on the nature of the information), namelv, structural, behavioral, mixed, and partial.Some specifc ADLs are overviewed including Machine-Independent Microprogramming Language(MIMOLA); nML; Instruction Set Description Language (ISDL); Machine Description (MDES) andHigh-Level Machine Description (HMDES); EXPRESSION; and LISA. A substantial part of thischapter focuses on Tensilica Instruction Extension (TIE) ADL and provides a comprehensive intro-duction to the language illustrating its use with a case studv involving design of an audio DSP calledthe HiFi2 Audio Engine.An overview of the architectural choices for real-time and networking support adopted bv manvcontemporarv operating svstems (within the framework of the IEEE I003.I-2004 international stan-dard) is presented in the chapter Network-readv, open source operating svstems for embeddedreal-time applications. Tis chapter gives an overview of several widespread architectural choicesfor real-time support at the operating svstem level, and describes the real-time application interface(RTAI) approach in particular. It then summarizes the real-time and networking support specifed bvthe IEEEI003.I-2004 international standard. Finallv, it describes the internal structure of a commonlvused open source network protocol stack to show how it can be extended to handle other protocolsbesides the TCP/IP suite it was originallv designed for. Te discussion centers on the CAN protocol.Manv embedded svstems, particularlv hard real-time svstems, impose strict restrictions on theexecution time of tasks, which are required to complete within certain time bounds. For this class ofsvstems, schedulabilitv analvses require the upper bounds for the execution times of all tasks to beknown to verifv staticallv whether the svstem meets its timing requirements. Te chapter Deter-mining bounds on execution times presents architecture of the aiT timing-analvsis tool and anapproach to timing analvsis implemented in the tool. In the process, it discusses cache-behavior pre-diction, pipeline analvsis, path analvsis using integer linear programming, and other issues. Te useof this approach is put in the context of upper bounds determination. In addition, this chapter givesa brief overview of other approaches to timing analvsis. Te validation of nonfunctional require-ments of selected implementation aspects such as deadlines, throughputs, bufer space, and powerconsumption comes under performance analvsis.Te chapter Performance analvsis of distributed embedded svstems discusses issues behind per-formance analvsis, and its role in the design process. It also survevs a few selected approaches toperformance analvsis for distributed embedded svstems such as simulation-based methods, holisticscheduling analvsis, and compositional methods. Subsequentlv, this chapter introduces the modu-lar performance analvsis approach and accompanving performance networks, as stated bv authors,infuenced bv the worst-case analvsis of communication networks. Te presented approach allowsto obtain upper and lower bounds on quantities such as end-to-end delav and bufer space; it alsocovers all possible corner cases independent of their probabilitv.Embedded nodes, or devices, are frequentlv batterv powered. Te growing power dissipation, withthe increase in densitv of integrated circuits and clock frequencv, has a direct impact on the cost ofpackaging and cooling, as well as reliabilitv and lifetime. Tese and other factors make the design forlow power consumption a high prioritv for embedded svstems. Te chapter Power-aware embed-ded computing presents a survev of design techniques and methodologies aimed at reducing bothstatic and dvnamic power dissipation. Tis chapter discusses energv and power modeling to includeinstruction-level and function-level power models, microarchitectural power models, memorv andbus models, and batterv models. Subsequentlv, it discusses svstem/application-level optimizations 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xv 2009-3-20 #I6Preface xvthat explore diferent task implementations exhibiting diferent power/energv versus OoS charac-teristics. Energv-emcient processing subsvstems: voltage and frequencv scaling, dvnamic resourcescaling, and processor core selection are addressed next in this chapter. Finallv, this chapter discussesenergv-emcient memorv subsvstems: cache hierarchv tuning; novel horizontal andvertical cache par-titioning schemes; dvnamic scaling of memorv elements; sofware-controlled memories; scratch-padmemories; improving access patterns to on-chip memorv; special-purpose memorv subsvstems formedia streaming; and code compression and interconnect optimizations.Part II. Embedded Processors and System-on-Chip DesignAn extensive overviewof microprocessors in the context of embedded svstems is given in the chapterProcessors for embedded svstems. Tis chapter presents a brief historv of embedded microproces-sors and covers issues such as sofware-driven evolution, performance of microprocessors, reducedinstruction set computing (RISC) machines, processor cores, and the embedded SoC. Afer dis-cussing svmmetric multiprocessing (SMP) and asvmmetric multiprocessing (AMP), this chaptercovers some of the most widelv used embedded processor architectures followed bv a comprehensivepresentation of the sofware development tools for embedded processors. Finallv, it overviews bench-marking processors for embedded svstems where the use of standard benchmarks and instructionset simulators to evaluate processor cores are discussed. Tis is particularlv relevant to the design ofembedded SoC devices where the processor cores mav not vet be available in hardware, or be basedon user-specifed processor confguration and extension.A comprehensive introduction to the SoC concept, in general, and design issues is provided inthe chapter Svstem-on-chip design. Tis chapter discusses basics of SoC; IP cores, and virtualcomponents; introduces the concept of architectural platforms and survevs selected industrv ofer-ings; provides a comprehensive overview of the SoC design process; and discusses confgurable andextensible processors, as well as IP integration qualitv and certifcation methods and standards.On-chip communication architectures are presented in the chapter SoC communication archi-tectures: From interconnection buses to packet-switched NoCs. Tis chapter provides an in-depthdescription and analvsis of the three most relevant, from industrial and research viewpoints, archi-tectures to include ARM developed Advanced Micro-Controller Bus Architecture (AMBA) and newinterconnect schemes AMBA 3 Advanced eXtensible Interface (AXI), Advanced High-performanceBus (AHB) interface, AMBA 3 APB interface, and AMBA 3 ATB interface; Sonics SMART intercon-nects (SonicsLX, SonicsMX, and S3220); IBM developed CoreConnect Processor Local Bus (PLB),On-Chip Peripheral Bus (OPB), and Device Control Register (DCR) Bus; and STMicroelectronicsdeveloped STBus. In addition, it survevs other architectures such as WishBone, Peripheral Intercon-nect Bus (PI-Bus), Avalon, and CoreFrame. Tis chapter also ofers some analvsis of selected com-munication architectures. It concludes with a brief discussion of the packet-switched interconnectionnetworks, or Network-on-Chip (NoC), introducing XPipes (a SvstemC librarv of parameterizable,svnthesizable NoC components), and giving an overview of the research trends.Basic principles and guidelines for the NoC design are introduced in the chapter Networks-on-chip: Aninterconnect fabric for multiprocessor svstems-on-chip. Tis chapter discusses the rationalefor the design paradigm shif of SoC communication architectures from shared busses to NoCs,and briefv survevs related work. Subsequentlv, it presents details of NoC building blocks to includeswitch, network interface, and switch-to-switch links. Te design principles and the trade-ofs arediscussed in the context of diferent implementation variants, supported bv the case studies fromreal-life NoC prototvpes. Tis chapter concludes with a brief overview of NoC design challenges.Te chapter Hardware/sofware interfaces design for SoC presents a component-based designautomation approach for MPSoC platforms. It briefv survevs basic concepts of MPSoC design anddiscusses some related approaches, namelv, svstem-level, platform-based, and component-based. 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xvi 2009-3-20 #I7xvi PrefaceIt provides a comprehensive overview of hardware/sofware IP integration issues such as bus-basedand core-based approaches, integrating sofware IP, communication svnthesis, and IP derivation. Tefocal point of this chapter is a new component-based design methodologv and design environmentfor the integrationof heterogeneous hardware and sofware IPcomponents. Te presented methodol-ogv, which adopts automatic communication svnthesis approach and uses a high-level API, generatesboth hardware and sofware wrappers, as well as a dedicated Operating Svstem for programmablecomponents. Te IP integration capabilities of the approach and accompanving sofware tools areillustrated bv redesigning a part of a VDSL modem.Programmable logic devices, complex programmable logic devices (CPLDs), and feld-programmable gate arravs (FPGAs) have evolved from implementing small glue-logic designs tolarge complete svstems that are nowthe majoritv of design starts: FPGAs for the higher densitv designand CPLDs for smaller designs and designs that require nonvolatilitv targeting. Te chapter FPGAsvnthesis and phvsical design gives an introduction to the architecture of feld-programmable datearravs and an overview of the FPGA CAD fow. It then survevs current algorithms for FPGAsvnthesis, placement, and routing, as well as commercial tools.Part III. Embedded Systems Security and Web ServicesTere is a growing trend for networking of embedded svstems. Representative examples of such svs-tems can be found in automotive, train, and industrial automation domains. Manv of these svstemsneed to be connected to other networks such as LAN, WAN, and the Internet. For instance, there is agrowing demand for remote access to process data at the factorv foor. Tis, however, exposes svstemsto potential securitv attacks, which mav compromise the integritv of the svstem and cause damage.Te limited resources of embedded svstems pose considerable challenges for the implementation ofefective securitv policies which, in general, are resource demanding. An excellent introduction tothe securitv issues in embedded svstems is presented in the chapter Design issues in secure embed-ded svstems. Tis chapter outlines securitv requirements in computing svstems, classifes abilitiesof attackers, and discusses securitv implementation levels. Securitv constraints in embedded svstemsdesign discussed include energv considerations, processing power limitations, fexibilitv and avail-abilitv requirements, and cost of implementation. Subsequentlv, this chapter presents the main issuesin the design of secure embedded svstems. It also covers, in detail, attacks and countermeasures ofcrvptographic algorithm implementations in embedded svstems.Te chapter Web services for embedded devices introduces the devices profle for Web services(DPWS). DPWS provides a service-oriented approach for hardware components bv enabling Webservice capabilities on resource-constraint devices. DPWS addresses announcement and discovervof devices and their services, eventing as a publish/subscribe mechanism, and secure connectivitvbetween devices. Tis chapter gives a brief introduction to device-centric service-oriented architec-tures (SOAs), followed bv a comprehensive description of DPWS. It also covers sofware developmenttoolkits and platforms such as the Web services for devices (WS4D), service-oriented architecture fordevices (SOA4D), UPnP and DPWS base driver for OSGI, as well as DPWS in Microsof Vista. Teuse of DPWS is illustrated bv the example of a business-to-business (B2B) maintenance scenario torepair a faultv industrial robot.Volume II. Networked Embedded SystemsVolume II focuses on selected application areas of NES. It covers automotive feld, industrialautomation, and building automation. In addition, this volume also covers WSNs, although froman application-independent viewpoint. Te aim of this volume was to introduce actual NES 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xvii 2009-3-20 #I8Preface xviiimplementations in fast-evolving areas that, for various reasons, have not received proper cover-age in other publications. Diferent application areas, in addition to unique functional requirements,impose specifc restrictions on performance, safetv, and OoS requirements, thus necessitating adop-tion of diferent solutions that in turn give rise to a plethora of communication protocols and svstems.For this reason, the discussion of the internode communication aspects has been deferred to this vol-ume where the communication aspects are discussed in the context of specifc application domainsof NES.Part I. Networked Embedded Systems: An IntroductionAgeneral overviewof NES is presented in the chapter Networked embedded svstems: An overview.It gives an introduction to the concept of NES, their design, internode communication, and otherdevelopment issues. Tis chapter also discusses various application areas for NES such as automotive,industrial automation, and building automation.Te topic of middleware for distributed NES is addressed in the chapter Middleware design andimplementation for networked embedded svstems. Tis chapter discusses the role of middleware inNES, andthe challenges indesignandimplementationsuchas remote communication, locationinde-pendence, reusing existing infrastructure, providing real-time assurances, providing a robust DOCmiddleware, reducing middleware footprint, and supporting simulation environments. Te focalpoint of this chapter is the section describing the design and implementation of nORB (a small foot-print real-time object request broker tailored to a specifc embedded sensor/actuator applications),and the rationale behind the adopted approach.Part II. Wireless Sensor NetworksTe distributed WSN is a relativelv new and exciting proposition for collecting sensorv data in avarietv of environments. Te design of this kind of networks poses a particular challenge due tolimited computational power and memorv size, bandwidth restrictions, power consumption restric-tion if batterv powered (tvpicallv the case), communication requirements, and unattended modeof operation in case of inaccessible and/or hostile environments. Tis part provides a fairlv com-prehensive discussion of the design issues related to, in particular, self-organizing ad-hoc WSNs.It introduces fundamental concepts behind sensor networks; discusses architectures; time svnchro-nization; energv-emcient distributed localization, routing, and MAC; distributed signal processing;securitv; testing, and validation; and survevs selected sofware development approaches, solutions,and tools for large-scale WSNs.Acomprehensive overviewof the area of WSNs is provided in the chapter Introduction to wirelesssensor networks. Tis chapter introduces fundamental concepts, selected application areas, designchallenges, and other relevant issues. It also lists companies involved in the development of sensornetworks, as well as sensor networks-related research projects.Te chapter Architectures for wireless sensor networks provides an excellent introduction to thevarious aspects of the architecture of WSNs. It starts with a description of a sensor node architec-ture and its elements: sensor platform, processing unit, communication interface, and power source.It then presents two WSN architectures developed around the lavered protocol stack approach, andEYES European project approach. In this context, it introduces a new fexible architecture designapproach with environmental dvnamics in mind, and aimed at ofering maximum fexibilitv whilestill adhering to the basic design concept of sensor networks. Tis chapter concludes with a compre-hensive discussion of the distributed data extraction techniques, providing a summarv of distributeddata extraction techniques for WSNs for the actual projects. 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xviii 2009-3-20 #I9xviii PrefaceTe time svnchronization issues in sensor networks are discussed in the chapter Overviewof timesvnchronization issues in sensor networks. Tis chapter introduces basics of time svnchronizationfor sensor networks. It also describes design challenges and requirements in developing time svn-chronization protocols such as the need to be robust and energv aware, the abilitv to operate correctlvin the absence of time servers (server-less), and the need to be lightweight and ofer a tunable ser-vice. Tis chapter also overviews factors infuencing time svnchronization such as temperature, phasenoise, frequencv noise, asvmmetric delavs, and clock glitches. Subsequentlv, diferent time svnchro-nization protocols are discussed, namelv, the network time protocol (NTP), timing-svnc protocolfor sensor networks (TPSN), H-sensor broadcast svnchronization (HBS), time svnchronization forhigh latencv (TSHL), reference-broadcast svnchronization (RBS), adaptive clock svnchronization,time-difusion svnchronization protocol (TDP), rate-based difusion algorithm, and adaptive-ratesvnchronization protocol (ARSP).Te localizationissues inWSNs are discussedinthe chapter Resource-aware localizationinsensornetworks. Tis chapter explains the need to know localization of nodes in a network, introducesdistance estimation approaches, and covers positioning and navigation svstems as well as localizationalgorithms. Subsequentlv, localization algorithms are discussed and evaluated, and are grouped in thefollowing categories: classical methods, proximitv based, optimization methods, iterative methods,and pattern matching.Te chapter Power-emcient routing in wireless sensor networks provides a comprehensive sur-vev and critical evaluation of energv-emcient routing protocols used in WSNs. Tis chapter begins bvhighlighting diferences between routing in distributed sensor networks and WSNs. Te overview ofenergv-saving routing protocols for WSNs centers on optimization-based routing protocols, data-centric routing protocols, cluster-based routing protocols, location-based routing protocols, andOoS-enabled routing protocols. In addition, the topologv control protocols are discussed.Te chapter Energv-emcient MAC protocols for wireless sensor networks provides an overviewof energv-emcient MACprotocols for WSNs. Tis chapter begins with a discussion of selected designissues of the MAC protocols for energv-emcient WSNs. It then gives a comprehensive overview of anumber of MACprotocols, including solutions for mobilitv support and multichannel WSNs. Finallv,it outlines current trends and open issues.Due to their limited resources, sensor nodes frequentlv provide incomplete information on theobjects of their observation. Tus, the complete information has to be reconstructed from dataobtained from manv nodes frequentlv providing redundant data. Te distributed data fusion is oneof the major challenges in sensor networks. Te chapter Distributed signal processing in sensor net-works introduces a novel mathematical model for distributed information fusion which focuses onsolving a benchmark signal processing problem (spectrum estimation) using sensor networks.Te chapter Sensor network securitv ofers a comprehensive overview of the securitv issues andsolutions. Tis chapter presents an introduction to selected securitv challenges in WSNs, such asavoiding and coping with sensor node compromise, maintaining availabilitv of sensor network ser-vices, and ensuring confdentialitv and integritv of data. Implications of the denial-of-service (DoS)attack, as well as attacks onrouting, are thendiscussed, along with measures and approaches that havebeen proposed so far against these attacks. Subsequentlv, it discusses in detail the SNEP and TESLAprotocols for confdentialitv and integritv of data, the LEAP protocol, as well as probabilistic kevmanagement and its manv variants for kev management. Tis chapter concludes with a discussion ofsecure data aggregation.Te chapter Wireless sensor networks testing and validation covers validation and testingmethodologies, as well as tools needed to provide support that are essential to arrive at a function-allv correct, robust, and long-lasting svstem at the time of deplovment. It explains issues involved intesting of WSNs followed bv validation including test platforms and sofware testing methodologies.An integrated test and instrumentation architecture that augments WSN test beds bv incorporating 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xix 2009-3-20 #20Preface xixthe environment and giving exact and detailed insight into the reaction to changing parameters andresource usage is then introduced.Te chapter Developing and testing of sofware for wireless sensor networks presents basic con-cepts related to sofware development of WSNs, as well as selected sofware solutions. Te solutionsinclude TinvOS, a component-based operating svstem, and related sofware packages such as MATE,a bvte-code interpreter; TinvDB, a querv processing svstem for extracting information from a net-work of TinvOS sensor nodes; SensorWare, a sofware framework for WSNs that provides querving,dissemination, and fusion of sensor data, as well as coordination of actuators; Middleware Link-ing Applications and Networks (MiLAN), a middleware concept that aims to exploit informationredundancv provided bv sensor nodes; EnviroTrack, a TinvOS-based application that provides aconvenient wav to program sensor network applications that track activities in their phvsical envi-ronment; SeNeTs, a middleware architecture for WSNs designed to support the pre-deplovmentphase; Contiki, a lightweight and fexible operating svstemfor 8-bit computers and integrated micro-controllers. Tis chapter also discusses sofware solutions for simulation, emulation, and test oflarge-scale sensor networks: TinvOS SIMulator (TOSSIM), a simulator based on the TinvOS frame-work; EmStar, a sofware environment for developing and deploving applications for sensor networksconsisting of 32-bit embeddedMicroserver platforms; SeNeTs, a test andvalidationenvironment; andIava-based I-Sim.Part III. Automotive Networked Embedded SystemsTe automotive industrv is aggressivelv adopting mechatronic solutions to replace, or duplicate,existing mechanical/hvdraulic svstems. Te embedded electronic svstems together with dedicatedcommunication networks and protocols plav a pivotal role in this transition. Tis part contains sevenchapters that ofer a comprehensive overviewof the area presenting topics such as networks and pro-tocols, operating svstems and other middleware, scheduling, safetv and fault tolerance, and actualdevelopment tools used bv the automotive industrv.Tis part begins with the chapter Trends in automotive communication svstems that introducesthe area of in-vehicle embedded svstems and, in particular, the requirements imposed on the com-munication svstems. Ten, a comprehensive review of the most widelv used, as well as emerging,automotive networks is presented to include prioritv busses (CAN and II830), time-triggered net-works (TTP/C, TTP/A, TTCAN), low cost automotive networks (LIN and TTP/A), and multimedianetworks (MOST and IDB I394). Tis is followed bv an overview of the industrv initiatives relatedto middleware technologies, with a focus on OSEK/VDX and AUTOSAR.Te chapter Time-triggered communication presents an overview of time-triggered commu-nication, solutions, and technologies put in the context of automotive applications. It introducesdependabilitv concepts and fundamental services provided bv time-triggered communication pro-tocols, such as clock svnchronization, periodic exchange of messages carrving state information,fault isolation mechanisms, and diagnostic services. Subsequentlv, the chapter overviews four impor-tant representatives of time-triggered communication protocols: TTP/C, TTP/A, TTCAN, and TTEthernet.Acomprehensive introduction to CANs is presented in the chapter Controller area network. Tischapter overviews some of the main features of the CAN protocol, with a focus on advantages anddrawbacks afecting application domains, particularlv NESs. CANopen, especiallv suited to NESs, issubsequentlv covered to include CANopen device profle for generic I/O modules.Te newlv emerging standard and technologv for automotive safetv-critical communication is pre-sented in the chapter FlexRav communication technologv. Tis chapter overviews aspects suchas media access, clock svnchronization, startup, coding and phvsical laver, bus guardian, protocolservices, and svstem confguration. 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xx 2009-3-20 #2Ixx PrefaceTe Local Interconnect Network (LIN) communication standard, enabling fast and cost-emcientimplementation of low-cost multiplex svstems for local interconnect networks in vehicles, ispresented in the chapter LIN standard. Tis chapter introduces the LINs phvsical laver and theLINprotocol. It then focuses on the design process and workfow, and covers aspects such as require-ment capture (signal defnitions and timing requirements), network confguration and design, andnetwork verifcation, put in the context of Mentor Graphics LIN tool-chain.Te chapter Standardizedbasic svstemsofware for automotive applications presents anoverviewof the automotive sofware infrastructure standardization eforts and initiatives. Tis chapter beginswith an overview of the automotive hardware architecture. Subsequentlv, it focuses on the sof-ware modules specifed bv OSEK/VDX and HIS working groups, followed bv ISO and AUTOSARinitiatives. Some background and technical information are provided on the Iapanese IasPar, thecounterpart to AUTOSAR.Te Volcano concept and technologv for the design and implementation of in-vehicle networksusing the standardized CAN and LIN communication protocols are presented in the chapter Vol-cano technologvEnabling correctness bv design. Tis chapter provides an insight in the designand development process of an automotive communication networkPart IV. Networked Embedded Systems in Industrial AutomationField-Area Networks in Industrial AutomationTe advances in design of embedded svstems, tools availabilitv, and falling fabrication costs ofsemiconductor devices and svstems allowed for infusion of intelligence into feld devices such assensors and actuators. Te controllers used with these devices provide on-chip signal conversion,data and signal processing, and communication functions. Te increased functionalitv, processing,and communication capabilities of controllers have been largelv instrumental in the emergence of awidespread trend for networking of feld devices around specialized networks, frequentlv referred toas feld-area networks. One of the main reasons for the emergence of feld-area networks in the frstplace was an evolutionarv need to replace point-to-point wiring connections bv a single bus, thuspaving the road to the emergence of distributed svstems and, subsequentlv, NES with the infusion ofintelligence into the feld devices.Te part begins with a comprehensive introduction to specialized feld-area networks presentedin the chapter Fieldbus svstemsEmbedded networks for automation. Tis chapter presents evo-lution of the feldbus svstems; overviews communication fundamentals and introduces the ISO/OSIlavered model; covers feldbus characteristics in comparison with the OSI model; discusses intercon-nections in the heterogeneous network environment; and introduces industrial Ethernet. Selectedfeldbus svstems, categorized bv the application domain, are summarized at the end. Tis chapter isa compulsorv reading for novices to understand the concepts behind feldbuses.Te chapter Real-time Ethernet for automation applications provides a comprehensive introduc-tion to the standardization process and actual implementation of real-time Ethernet. Standardizationprocess and initiatives, real-time Ethernet requirements, and practical realizations are covered frst.Te practical realizations discussed include top of TCP/IP, top of Ethernet, and modifed Ethernetsolutions. Ten, this chapter gives an overview of specifc solutions in each of those categories.Te issues involved in the confguration (setting up a feldbus svstem in the frst place) and man-agement (diagnosis and monitoring, and adding new devices to the network) of feldbus svstemsare presented in the chapter Confguration and management of networked embedded devices.Tis chapter starts bv outlining requirements on confguration and management. It then discussesthe approach based on the profle concept, as well as several mechanisms following an electronicdatasheet approach, namelv, the Electronic Device Description Language (EDDL), the Field Device 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xxi 2009-3-20 #22Preface xxiTool/Device Tvpe Manager (FDT/DTM), the Transducer Electronic Datasheets (TEDS), and theSmart Transducer Descriptions (STD) of the Interface File Svstem (IFS). It also examines severalapplication development approaches and their infuence on the svstem confguration.Te chapter Networked control svstems for manufacturing: Parameterization, diferentiation,evaluation and application covers extensivelv the application of networked control svstems inmanufacturing with an emphasis on control, diagnostics, and safetv. It explores the parameteriza-tion of networks with respect to balancing OoS capabilities; introduces common network protocolapproaches and diferentiates them with respect to functional characteristics; presents a method fornetworked control svstem evaluation that includes theoretical, experimental, and analvtical compo-nents; and explores network applications in manufacturing with a focus on control, diagnostics, andsafetv in general, and at diferent levels of the factorv control hierarchv. Future trends emphasizemigration trend toward wireless networking technologv.Wireless Network Technologies in Industrial AutomationAlthough the use of wireline-based feld-area networks is dominant, wireless technologv ofersa range of incentives in a number of application areas. In industrial automation, for instance,wireless device (sensor/actuator) networks can provide support for mobile operation required formobile robots, monitoring and control of equipment in hazardous and dimcult to access environ-ments, etc. Te use of wireless technologies in industrial automation is covered in fve chaptersthat cover the use of wireless local and wireless personal area network technologies on the factorvfoor, hvbrid wired/wireless networks in industrial real-time applications, a wireless sensor/actuator(WISA) network developed bv ABB and deploved in a manufacturing environment, and WSNs forautomation.Te issues involving the use of wireless technologies and mobile communication in the industrialenvironment (factorv foor) are discussed in the chapter Wireless LAN technologv for the factorvfoor: Challenges and approaches. Tis is comprehensive material dealing with topics such as errorcharacteristics of wireless links and lower laver wireless protocols for industrial applications. It alsobriefv discusses hvbrid svstems extending selected feldbus technologies (such as PROFIBUS andCAN) with wireless technologies.Te chapter Wireless local and wireless personal area network communication in industrial envi-ronments presents a comprehensive overview of the commercial-of-the-shelf wireless technologiesto include IEEE 802.I3.I/Bluetooth, IEEE 802.I3.4/ZigBee, and IEEE 802.II variants. Te suitabilitvof these technologies for industrial deplovment is evaluated to include aspects such as applicationscenarios and environments, coexistence of wireless technologies, and implementation of wirelessfeldbus services.Hvbrid confgurations of communication networks resulting from wireless extensions of con-ventional, wired, industrial networks and their evaluation are presented in the chapter Hvbridwired/wireless real-time industrial networks. Te focus is on four popular solutions, namelv,Profbus DP and DeviceNet, and two real-time Ethernet networks: Profnet IO and EtherNet/IP; andthe IEEE 802.II familv of WLAN standards and IEEE 802.I3.4 WSNs as wireless extensions. Tev aresome of the most promising technologies for use in industrial automation and control applications,and a lot of devices are alreadv available of-the-shelf at relativelv low cost.Te chapter Wireless sensor networks for automation gives a comprehensive introduction toWSNs technologv in embedded applications on the factorv foor and other industrial automatedsvstems. Tis chapter gives an overview of WSNs in industrial applications; development chal-lenges; communicationstandards including ZeegBee, WirelessHART, and ISAI00; low-power design;packaging of sensors and ICs; sofware/hardware modularitv in design, and power supplies. Tisis essential reading for anvone interested in wireless sensor technologv in factorv and industrialautomated applications. 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xxii 2009-3-20 #23xxii PrefaceA comprehensive case studv of a factorv-foor deploved WSN is presented in the chapter Designand implementation of a trulv wireless real-time sensor/actuator interface for discrete manufacturingautomation. Te svstem, known as WISA has been implemented bv ABB in a manufacturing cell tonetwork proximitv switches. Te sensor/actuators communication hardware is based on a standardBluetooth 2.4 GHz radio transceiver and low-power electronics that handle the wireless communi-cation link. Te sensors communicate with a wireless base station via antennas mounted in the cell.For the base station, a specialized RF front end was developed to provide collision-free air access bvallocating a fxed TDMAtime slot to each sensor/actuator. Frequencv hopping (FH) was emploved tocounter both frequencv-selective fading and interference efects, and operates in combination withautomatic retransmission requests (ARO). Te parameters of this TDMA/FH scheme were chosento satisfv the requirements of up to I20 sensor/actuators per base station. Each wireless node has aresponse or cvcle time of 2 ms, to make full use of the available radio band of 80 MHz width. Te FHsequences are cell-specifc and were chosen to have low cross-correlations to permit parallel opera-tion of manv cells on the same factorv foor with lowself-interference. Te base station can handle upto I20 WISAs and is connected to the control svstem via a (wireline) feld bus. To increase capacitv,a number of base stations can operate in the same area. WISA provides wireless power supplv to thesensors, based on magnetic coupling.Part V. Networked Embedded Systems in BuildingAutomation and ControlAnother fast-growing application area for NES is BAC. BACsvstems aimat the control of the internalenvironment, as well as the immediate external environment of a building or building complex. Atpresent, the focus of research and technologv development is on buildings that are used for commer-cial purposes such as omces, exhibition centers, and shopping complexes. However, the interest in(familv tvpe) home automation is on the rise.A general overview of the building control and automation area and the supporting commu-nication infrastructure is presented in the chapter Data communications for distributed buildingautomation. Tis chapter provides an extensive description of building service domains and theconcepts of BAC, and introduces building automation hierarchv together with the communicationinfrastructure. Te discussion of control networks for building automation covers aspects such asselected OoS requirements and related mechanisms, horizontal and vertical communication, net-work architecture, and internetworking. As with industrial feldbus svstems, there are a numberof bodies involved in the standardization of technologies for building automation. Tis chapteroverviews some of the standardization activities, standards, as well as networking and integrationtechnologies. Open svstems BACnet, LonWorks, and EIB/KNX, wireless IEEE 802.I3.4 and ZigBee,and Web Services are introduced at the end of this chapter, together with a brief introduction to homeautomation.ReferencesI. N. Navet, Y. Song, F. Simonot-Lion, and C. Wilwert, Trends in automotive communication svstems,Special Issue: Industrial Communication Systems, R. Zurawski, Ed., Proceedings of the IEEE, 93(6), Iune2003, I204I223.2. I.-P. Tomesse, Fieldbus technologv in industrial automation, Special Issue: Industrial CommunicationSystems, R. Zurawski, Ed., Proceedings of the IEEE, 93(6), Iune 2003, I073II0I.3. M. Felser, Real-time EthernetIndustrv perspective, Special Issue: Industrial Communication Systems,R. Zurawski, Ed., Proceedings of the IEEE, 93(6), Iune 2003, III8II29. 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xxiii 2009-3-20 #24Preface xxiii4. A. Willig, K. Matheus, and A. Wolisz, Wireless technologv in industrial networks, Special Issue: Indus-trial Communication Systems, R. Zurawski, Ed., Proceedings of the IEEE, 93(6), Iune 2003, II30II3I.3. W. Kastner, G. Neugschwandtner, S. Soucek, and H. M. Newman, Communication svstems for buildingautomation and control, Special Issue: Industrial Communication Systems, R. Zurawski, Ed., Proceedingsof the IEEE, 93(6), Iune 2003, II78I203.Locating TopicsTo assist readers with locating material, a complete table of contents is presented at the front of thebook. Each chapter begins with its own table of contents. Two indexes are provided at the end of thebook. Te index of authors contributing to the book together with the titles of the contributions, anda detailed subject index.Richard Zurawski 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xxv 2009-3-20 #26AcknowledgmentsI would like to thank all authors for the efort to prepare the contributions and tremendous coop-eration. I would like to express gratitude to mv publisher Nora Konopka and other CRC Press stafinvolved in the book production. Mv love goes to mv wife who tolerated the countless hours I spenton preparing this book.Richard Zurawskixxv 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xxvii 2009-3-20 #28EditorRichard Zurawski is with ISA Group, San Francisco, California, involved in providing solutionsto I000 Fortune companies. He has over 30 vears of academic and industrial experience, includ-ing a regular professorial appointment at the Institute of Industrial Sciences, Universitv of Tokvo,and full-time R&D advisor with Kawasaki Electric, Tokvo. He has provided consulting services toKawasaki Electric, Ricoh, and Toshiba Corporations, Iapan. He has participated in a number ofIapanese Intelligent Manufacturing Svstems programs.Dr. Zurawskis involvement in R&D and consulting projects and activities in the past few vearsincluded network-based solutions for factorv foor control, network-based demand side manage-ment, Iava technologv, SEMI implementations, wireless applications, IC design and verifcation,EDA, and embedded svstems integration.Dr. Zurawski is the series editor for Te Industrial Information Technologv (book) Series, CRCPress/Tavlor & Francis; and the editor in chief of the IEEE Transactions on Industrial Informatics.He has served as editor at large for IEEE Transactions on Industrial Informatics (20032006); and asan associate editor for IEEE Transactions on Industrial Electronics (I9942003); Real-Time Systems;Te International Journal of Time-Critical Computing Systems, Kluwer Academic Publishers (I9972003); and Te International Journal of Intelligent Control and Systems, World Scientifc PublishingCompanv (I996I997).Dr. Zurawski was a guest editor of three special issues in IEEETransactions on Industrial Electronicson factorv automation and factorv communication svstems. He was also a guest editor of the specialissue on industrial communication svstems in the Proceedings of the IEEE. He was invited bv IEEESpectrumto contribute an article on Iava technologv to the Technologv I999: Analvsis and Forecastspecial issue.Dr. Zurawski served as a vice president of the Industrial Electronics Societv (IES) (I994I997), asa chairman of the IES Factorv Automation Council (I994I997), and is currentlv the chairman ofthe IES Technical Committee on Factorv Automation. He was also on a steering committee of theASME/IEEE Journal of Microelectromechanical Systems. In I996, he received the Anthonv I. HornfeckService Award from the IEEE IES.Dr. Zurawski has served as a general co-chair for I3 IEEEconferences and workshops, as a technicalprogram co-chair for 4 IEEE conferences, as a track (co-)chair for I2 IEEE conferences, and as amember of program committees for over 40 IEEE, IFAC, and other conferences and workshops. Hehas established two major technical events: IEEE Workshop on Factorv Communication Svstems andIEEE International Conference on Emerging Technologies and Factorv Automation.Dr. Zurawski was the editor of fve major handbooks: Te Industrial Information TechnologyHandbook, CRC Press, Boca Raton, Florida, 2004; Te Industrial Communication Technology Hand-book, CRC Press, Boca Raton, Florida, 2003; Te Embedded Systems Handbook, CRC Press/Tavlor &Francis, Boca Raton, Florida, 2003; Integration Technologies for Industrial Automated Systems, CRCPress/Tavlor & Francis, Boca Raton, Florida, 2006; and Networked Embedded Systems Handbook,CRC Press/Tavlor & Francis, Boca Raton, Florida, 2008.Dr. Zurawski received his MEng in electronics from the Universitv of Mining and Metallurgv,Krakow and PhD in computer science from LaTrobe Universitv, Melbourne, Australia.xxvii 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xxix 2009-3-20 #30ContributorsNupur AndrewsTensilica Inc.Santa Clara, CaliforniaJos L. AyalaDepartment of ComputerArchitectureComplutense Universitv of MadridMadrid, SpainLuca BeniniDepartment of ElectricalEngineering and ComputerScienceUniversitv of BolognaBologna, ItalvDavide BertozziEngineering DepartmentUniversitv of FerraraFerrara, ItalvVaughn BetzAltera CorporationToronto, Ontario, CanadaHendrik BohnInstitute of AppliedMicroelectronics andComputer ScienceUniversitv of RostockRostock, GermanvWander O. CesrioSvstem-Level Svnthesis GroupTechniques of Informatics andMicroelectronics for IntegratedSvstems Architecture (TIMA)LaboratorvGrenoble, FranceIvan Cibrario BertolottiInstitute of Electronics andInformation Engineeringand TelecommunicationsNational Research CouncilTurin, ItalvStephen A. EdwardsDepartment of Computer ScienceColumbia UniversitvNew York, New YorkAnastasios G.FragopoulosDepartment of Electrical andComputer EngineeringUniversitv of PatrasPatras, GreeceFrancisco GilabertDepartment of ComputerSvstems and ComputationPolvtechnic Universitv ofValenciaValencia, SpainFrank GolatowskiCenter for Life ScienceAutomationRostock, GermanvWolfgang HaidDepartment of InformationTechnologv and ElectricalEngineeringSwiss Federal Institute ofTechnologvZurich, SwitzerlandHans HanssonSchool of Innovation, Designand EngineeringMlardalen UniversitvVsteras, SwedenMike HuttonAltera CorporationSan Iose, CaliforniaMargarida F. JacomeDepartment of Electricaland Computer EngineeringUniversitv of Texas at AustinAustin, TexasAxel JantschDepartment for Microelectronicsand Information TechnologvRoval Institute of TechnologvStockholm, SwedenA. A. JerrayaElectronics and InformationTechnologv LaboratorvAtomic Energv Commission,MinatecGrenoble, FranceLuciano LavagnoDepartment of ElectronicsPolvtechnic Universitv of TurinTurin, ItalvSteve LeibsonTensilica Inc.Santa Clara, CaliforniaMarisa Lopez-VallejoDepartment of ElectronicEngineeringETSI TelecomunicacionCiudad UniversitariaMadrid, SpainGrant MartinTensilica Inc.Santa Clara, CaliforniaGiovanni De MicheliInstitute of ElectricalEngineeringEcole Polvtechnique Fdrale deLausanneLausanne, Switzerlandxxix 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xxx 2009-3-20 #3Ixxx ContributorsMarco Di NataleSantAnna School of AdvancedStudiesPisa, ItalvThomas NolteSchool of Innovation, Designand EngineeringMlardalen UniversitvVsteras, SwedenClaudio PasseroneDepartment of ElectronicsPolvtechnic Universitv of TurinTurin, ItalvKatalin PopoviciSvstem-Level Svnthesis GroupTechniques of Informatics andMicroelectronics for IntegratedSvstems Architecture (TIMA)LaboratorvGrenoble, FranceDumitru Potop-ButucaruNational Institute forResearch in Computer Scienceand Control (INRIA)Rocquencourt, FranceAnand RamachandranDepartment of Electricaland Computer EngineeringUniversitv of Texas at AustinAustin, TexasHimanshu SanghaviTensilica Inc.Santa Clara, CaliforniaDimitrios N. SerpanosDepartment of Electrical andComputer EngineeringUniversitv of PatrasPatras, GreeceRobert de SimoneNational Institute forResearch in Computer Scienceand Control (INRIA)Sophia Antipolis, FranceMikael SjdinSchool of Innovation, Designand EngineeringMlardalen UniversitvVsteras, SwedenDaniel SundmarkSchool of Innovation, Designand EngineeringMlardalen UniversitvVsteras, SwedenJean-Pierre TalpinNational Institute forResearch in Computer Scienceand Control (INRIA)Rennes, FranceLothar ThieleDepartment of InformationTechnologv and ElectricalEngineeringSwiss Federal Institute ofTechnologvZurich, SwitzerlandArtemios G. VoyiatzisDepartment of Electrical andComputer EngineeringUniversitv of PatrasPatras, GreeceFlvio R. WagnerInstitute of InformaticsFederal Universitv ofRio Grande do SulPorto Alegre, BrazilErnesto WandelerComputer Engineering andNetworks LaboratorvDepartment of InformationTechnologv and ElectricalEngineeringSwiss Federal Institute ofTechnologvZurich, SwitzerlandReinhard WilhelmDepartment of Computer ScienceUniversitv of SaarlandSaarbrcken, GermanvandAbsIntSaarbrcken, Germanv 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C000 Finals Page xxxi 2009-3-20 #32International Advisory BoardAlberto Sangiovanni-Vincentelli, Universitv of California, Berkelev, California (Chair)Giovanni De Michelli, Ecole Polvtechnique Fdrale de Lausanne, Lausanne, SwitzerlandRobert de Simone, National Institute for Research in Computer Science and Control (INRIA), SophiaAntipolis, FranceStephen A. Edwards, Columbia Universitv, New York, New YorkRajesh Gupta, Universitv of California, San Diego, CaliforniaAxel Iantsch, Roval Institute of Technologv, Stockholm, SwedenWido Kruijtzer, Philips Research, Eindhoven, Te NetherlandsLuciano Lavagno, Polvtechnic Universitv of Turin, Turin, Italv and Cadence Berkelev Labs, Berkelev,CaliforniaGrant Martin, Tensilica, Santa Clara, CaliforniaAntal Rajnak, Mentor Graphics, Geneva, SwitzerlandFranoise Simonot-Lion, Lorraine Laboratorv of Computer Science Research and Applications(LORIA) Nancv, Vandoeuvre-ls-Nancv, FranceLothar Tiele, Swiss Federal Institute of Technologv, Zrich, SwitzerlandTomas Weigert, Motorola, Schaumburg, IllinoisReinhard Wilhelm, Universitv of Saarland, Saarbrcken, Germanvxxxi 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Systems Design and Verication K10385_S001 Finals Page 1 2009-5-11 #1ISystem-Level Designand VerificationI Real-Time in Networked Embedded Svstems Hans Hansson,Tomas Nolte, Mikael Sjdin, and Daniel Sundmark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-Introduction Design of Real-Time Systems Real-Time Operating Systems Real-TimeScheduling Real-Time Communications Analysis of Real-Time Systems Component-BasedDesign of RTS Testing and Debugging of RTSs Summary2 Design of Embedded Svstems Luciano Lavagno and Claudio Passerone . . . . . . . . . 2-Te Embedded System Revolution Design of Embedded Systems Functional Design Function/Architecture and Hardware/Sofware Codesign Hardware/Sofware Coverifcationand Hardware Simulation Sofware Implementation Hardware Implementation Conclusions3 Models of Computation for Distributed Embedded Svstems Axel Jantsch . . . . 3-Introduction Models of Computation MoC Framework Integration of Models ofComputation Conclusion4 Embedded Soware Modeling and Design Marco Di Natale. . . . . . . . . . . . . . . . . . . . . . 4-Introduction Synchronous vs. Asynchronous Models Synchronous Models AsynchronousModels Research on Models for Embedded Sofware Conclusion5 Languages for Design and Verihcation Stephen A. Edwards . . . . . . . . . . . . . . . . . . . . . . 5-Introduction Hardware Design Languages Hardware Verifcation Languages SofwareLanguages Domain-Specifc Languages Summary6 Svnchronous Hvpothesis and Polvchronous LanguagesDumitru Potop-Butucaru, Robert de Simone, and Jean-Pierre Talpin. . . . . . . . . . . . . . . . . . 6-Introduction Synchronous Hypothesis Imperative Style: Esterel and SyncCharts DeclarativeStyle: Lustre and Signal Success StoriesA Viable Approach for System Design Into theFuture: Perspectives and Extensions Loosely Synchronized Systems7 Processor-Centric Architecture Description LanguagesSteve Leibson, Himanshu Sanghavi, and Nupur Andrews . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-Introduction ADL Genesis Classifying Processor-Centric ADLs Purpose of ADLs Processor-Centric ADL Example: Te Genesis of TIE TIE: An ADL for DesigningApplication-Specifc Instruction-Set Extensions Case Study: Designing an Audio DSP Using anADL ConclusionsI- 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Systems Design and Verication K10385_S001 Finals Page 2 2009-5-11 #2I- System-Level Design and Verifcation8 Network-Readv, Open-Source Operating Svstems for EmbeddedReal-Time Applications Ivan Cibrario Bertolotti . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-Introduction Embedded Operating System Architecture IEEE . Standard andNetworking Extending the Berkeley Sockets9 Determining Bounds on Execution Times Reinhard Wilhelm . . . . . . . . . . . . . . . . . . . . 9-Introduction Cache-Behavior Prediction Pipeline Analysis Path Analysis Using IntegerLinear Programming Other Ingredients Related Work State of the Art and FutureExtensions Timing Predictability AcknowledgmentsI0 Performance Analvsis of Distributed Embedded SvstemsLothar Tiele, Ernesto Wandeler, and Wolfgang Haid. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-Performance Analysis Approaches to Performance Analysis Modular Performance AnalysisII Power-Aware Embedded Computing Margarida F. Jacome andAnand Ramachandran . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-Introduction Energy and Power Modeling System/Application-Level Optimizations Energy-Efcient Processing Subsystems Energy-Efcient Memory Subsystems Summary 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C00I Finals Page I 2009-3-2I #41Real-Time in NetworkedEmbedded SystemsHans HanssonMlardalen UniversityThomas NolteMlardalen UniversityMikael SjdinMlardalen UniversityDaniel SundmarkMlardalen UniversityI.I Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I-II.2 Design of Real-Time Svstems . . . . . . . . . . . . . . . . . . . . . . . . . I-3Reference Architecture Models of Interaction ExecutionStrategies Tools for Design of Real-Time SvstemsI.3 Real-Time Operating Svstems . . . . . . . . . . . . . . . . . . . . . . . . I-8Tvpical Properties of RTOSs Mechanisms for Real-Time Commercial RTOSsI.4 Real-Time Scheduling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I-IIIntroduction to Scheduling Time-Driven Scheduling Prioritv-Driven Scheduling Share-Driven SchedulingI.3 Real-Time Communications . . . . . . . . . . . . . . . . . . . . . . . . . I-I3ISO/OSI Reference Model MAC Protocols Networks Network TopologiesI.6 Analvsis of Real-Time Svstems . . . . . . . . . . . . . . . . . . . . . . . I-2ITiming Properties Methods for Timing Analvsis Example of Analvsis Trends and ToolsI.7 Component-Based Design of RTS . . . . . . . . . . . . . . . . . . . . I-28Timing Properties and CBD Real-Time OperatingSvstems Real-Time SchedulingI.8 Testing and Debugging of RTSs . . . . . . . . . . . . . . . . . . . . . . I-34Issues in Testing and Debugging of RTSs RTS Testing RTS Debugging Industrial PracticeI.9 Summarv . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I-38References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I-38In this chapter, we provide an introduction to issues, techniques, and trends in networkedembedded real-time svstems (RTSs). We specifcallv discuss design of RTSs, real-time operatingsvstems (RTOSs), real-time scheduling, real-time communication, and real-time analvsis, as wellas testing and debugging of RTSs. For each of these areas, state-of-the-art tools and standards arepresented.1.1 IntroductionConsider the air bag in the steering wheel of vour car. It should, afer the detection of a crash (andonlv then), infate just in time to soflv catch vour head to prevent it from hitting the steering wheel;not too earlvsince this would make the air bag defate before it can catch vou; nor too latesince1-1 2009 by Taylor & Francis Group, LLCRichard Zurawski/Embedded Svstems Design and Verifcation KI0383_C00I Finals Page 2 2009-3-2I #31-2 Embedded Systems Design and Verificationthe exploding air bag then could injure vou bv blowing up in vour face and/or catch vou too late toprevent vour head from banging into the steering wheel.Te computer-controlled air bag svstemis an example of a real-time svstem(RTS). But RTSs comein manv diferent favors, including vehicles, telecommunication svstems, industrial automationsvstems, household appliances, etc.Tere is no commonlv agreed upon defnition of what a RTS is, but the following characterizationis (almost) universallv accepted: RTSs are computer svstems that phvsicallv interact with the real world. RTSs have requirements on the timing of these interactions.Tvpicallv, the real-world interactions are via sensors and actuators rather than the kevboard andscreen of vour standard PC.Real-time requirements tvpicallv express that an interaction should occur within a specifed timebound. It should be noted that this is quite diferent from requiring the interaction to be as fast aspossible.Essentiallv all RTSs are embedded in products, and the vast majoritv of embedded computer svs-tems are RTSs. RTSs are the dominating application of computer technologv, as more than 99 ofthe manufactured processors are used in embedded svstems.Returning to the air bag svstem, we note that in addition to being an RTS it is a safetv-critical svs-tem, i.e., a svstemwhichdue to severe risks of damage has strict qualitv of service (OoS) requirements,including requirements on the functional behavior, robustness, reliabilitv, and timeliness.A tvpical strict timing propertv could be that a certain response to an interaction must alwavsoccur within some prescribed time, e.g., the charge in the air bag must detonate between I0 and 20ms from the detection of a crash; violating this must be avoided at anv cost, since it would lead tosomething unacceptable, i.e., vou having to spend a couple of months in hospital. A svstem that isdesigned to meet strict timing requirements is ofen referred to as a hard RTS. In contrast, svstemsfor which occasional timing failures are acceptablepossiblv because this will not lead to somethingterribleare termed sof RTS.An illustrative comparison between hard and sof RTSs that highlights the diference between theextremes is shown in Table I.I. A tvpical hard RTS could in this context be an engine control svstem,which must operate with microsecond-precision, and which will severelv damage the engine if timingrequirements fail bv more than a few milliseconds. A tvpical sof RTS could be a banking svstem, forwhich timing is important, but where there are no strict deadlines and some variations in timing areacceptable.Unfortunatelv, it is impossible to build real svstems that satisfv hard real-time requirements, sincedue to the imperfection of hardware (and designers) anv svstem mav break. Te best that can beachieved is a svstem that with verv high probabilitv provides the intended behavior during a fniteinterval of time.TABLE I.I Tvpical Characteristics of Hard and Sof RTSsCharacteristic Ha