emulation error recovery

Automatic Error Automatic Error Recovery in Recovery in

Targetless Logic Targetless Logic EmulationEmulationSomnath BanerjeeSomnath Banerjee

Tushar GuptaTushar GuptaMentor Graphics Pvt. Ltd. (India)Mentor Graphics Pvt. Ltd. (India)

Presented at ASQED 09, KL, Presented at ASQED 09, KL, MalaysiaMalaysia

Automatic Error Recovery in Targetless Logic Emulation

AgendaAgenda

Logic emulation Overview.Logic emulation Overview. Targetless emulation use models.Targetless emulation use models. Emulation errors and recovery.Emulation errors and recovery. Proposed system.Proposed system. Checkpoint and checkpoint server.Checkpoint and checkpoint server. Experimental results. Experimental results. Conclusion.Conclusion.


Logic EmulationLogic Emulation

Mostly FPGA based.Mostly FPGA based. Hardware assisted functional Hardware assisted functional

verification.verification. Maps the design on HW (FPGA + Maps the design on HW (FPGA +

memory banks).memory banks). Much faster than software Much faster than software

simulators.simulators. Typical speed is 1 MHz. Typical speed is 1 MHz.


Logic Emulation Logic Emulation ComponentsComponents

HDL Files

SW Compiler

EmulationHW

EmulationKernel

Waveform and Debug

Testbench


Targetless EmulationTargetless Emulation

No external hardware to send stimuli.No external hardware to send stimuli. Software testbench.Software testbench. Standalone emulation – vector file Standalone emulation – vector file

stimuli.stimuli. Co-simulation – stimuli from SW Co-simulation – stimuli from SW

simulator.simulator. Advantage is ease of use – easy to edit Advantage is ease of use – easy to edit

testbench.testbench.


Standalone EmulationStandalone Emulation

DUT

Vector File

Batch Script

Loader

Pattern Memory


Co-simulationCo-simulation

DUT

Batch Script

Transactor

SW Similator

Loader


Typical Usage of Targetless Typical Usage of Targetless EmulationEmulation

Long running verification jobs.Long running verification jobs. Massive sets of stimuli.Massive sets of stimuli. Automated setup to run multiple Automated setup to run multiple

tests.tests. Nightly runs on farm setups.Nightly runs on farm setups. Uses automatic job scheduler like Uses automatic job scheduler like

LSF.LSF. No manual intervention.No manual intervention.


User Operations during User Operations during EmulationEmulation

Load stimuli.Load stimuli. Set/Get flop/latch.Set/Get flop/latch. Force/release flop/latch.Force/release flop/latch. Download/upload memory.Download/upload memory. Set trigger on events.Set trigger on events. Set source line breakpoint.Set source line breakpoint. Run design clock.Run design clock.


Emulation Batch ScriptEmulation Batch Script

Contains sequence of user operationsContains sequence of user operations Example:Example:

loadStimuliloadStimuli registerSet top.f1 1registerSet top.f1 1 memoryDnld top.mem1 data.datmemoryDnld top.mem1 data.dat runClock 1000000runClock 1000000 Value = registerGet top.f2Value = registerGet top.f2


Logical Command Block Logical Command Block (LCB)(LCB)

Defines a block of operations.Defines a block of operations. May be to verify a section of DUT.May be to verify a section of DUT. Batch script is a collection of LCBs.Batch script is a collection of LCBs. One error corrupts the One error corrupts the

corresponding LCB.corresponding LCB.


Error Recovery in Error Recovery in Targetless EmulationTargetless Emulation

Avoid halting of emulation run.Avoid halting of emulation run. Recover from error and generate Recover from error and generate

report.report. Roll back the system to a last stable Roll back the system to a last stable

state.state.


Typical Emulation ErrorsTypical Emulation Errors

Set 1 on a flop with clear pin at logic 1.Set 1 on a flop with clear pin at logic 1. Set 0 on a flop with preset pin at logic 1.Set 0 on a flop with preset pin at logic 1. Set 0 on a flop/latch forced to 1.Set 0 on a flop/latch forced to 1. Setting trigger on unsupported signal.Setting trigger on unsupported signal. An expected trigger never matured.An expected trigger never matured. Set source line breakpoint on a line not Set source line breakpoint on a line not

breakable. breakable.


Proposed Error Recovery Proposed Error Recovery SystemSystem

Save checkpoint at the beginning of Save checkpoint at the beginning of each LCB.each LCB.

In case of error, roll back the system In case of error, roll back the system to last saved checkpoint.to last saved checkpoint.

Skip failing LCB and resume Skip failing LCB and resume emulation.emulation.

Generate report.Generate report.


Batch Script Batch Script InstrumentationInstrumentation

User marks start/end of LCBs.User marks start/end of LCBs. For commands outside LCB –For commands outside LCB – Automatic LCBs inserted.Automatic LCBs inserted. New LCB after commands worth a New LCB after commands worth a

cost cost

limit.limit. Cost limit can be set by user.Cost limit can be set by user. Compiler dumps a command cost DB.Compiler dumps a command cost DB.


Command Cost DBCommand Cost DB

Unit cost is 1 cycle of clock run.Unit cost is 1 cycle of clock run. User operation’s cost in terms of User operation’s cost in terms of

unit cost.unit cost. Typical costs:Typical costs: registerSet – 100 units/bit.registerSet – 100 units/bit. registerForce – 300 units/bit.registerForce – 300 units/bit. memoryDnld – 1M units/MB.memoryDnld – 1M units/MB.


Error Handling FunctionError Handling Function Called in case an error occurs.Called in case an error occurs. User customizable.User customizable. Example:Example: void errorHandler() void errorHandler() {{ log_error();log_error(); restore_last_checkpoint();restore_last_checkpoint();

put_file_ptr_after_failing_lcb_in_batch_script(put_file_ptr_after_failing_lcb_in_batch_script(););

resume_execution();resume_execution(); }}


System CheckpointSystem Checkpoint

Data representing system state.Data representing system state. Online or offline.Online or offline. SW simulators provide save/restore SW simulators provide save/restore

feature.feature. Contains following:Contains following:

1.1. State element valuesState element values

2.2. Memory contentsMemory contents

3.3. Some software states + testbench Some software states + testbench statestate


Online CheckpointOnline Checkpoint

Online – data resides in RAM.Online – data resides in RAM. Data is stored in compressed Data is stored in compressed

buffers.buffers. Consumes ~100MB for a FPGA of Consumes ~100MB for a FPGA of

capacity 9-10M gate.capacity 9-10M gate. Faster checkpoint save/restore. Faster checkpoint save/restore. Can support up to ~256M gate Can support up to ~256M gate

designs in 32 bit systems.designs in 32 bit systems.


Offline CheckpointOffline Checkpoint

Data resides on-disk.Data resides on-disk. More reliability.More reliability. Slower checkpoint save/restore.Slower checkpoint save/restore. Can support design of any size.Can support design of any size.


Save/Restore TechniquesSave/Restore Techniques

Firmware provided functions.Firmware provided functions. Function to save/restore all states in Function to save/restore all states in

a FPGA.a FPGA. Detect modified memories since last Detect modified memories since last

checkpoint.checkpoint. Save only modified memories. Save only modified memories.


Checkpoint ServerCheckpoint Server

Manages checkpoint data.Manages checkpoint data. Keeps original emulation system Keeps original emulation system

unaffected.unaffected. Can be 32 bit or 64 bit.Can be 32 bit or 64 bit. Keeps most recent checkpoint.Keeps most recent checkpoint. Talks to emulation kernel and SW Talks to emulation kernel and SW

testbench.testbench.


Checkpoint ServerCheckpoint Server

Emulation Kernel

SW Testbench

Checkpoint Server

Checkpoint save/restore


Experimental ResultsExperimental Results

Design – 128M gate, 16 FPGAs.Design – 128M gate, 16 FPGAs. Checkpoint frequency – commands Checkpoint frequency – commands

equivalent to 100M cycles clock run.equivalent to 100M cycles clock run. Typical emulation speed 1MHz.Typical emulation speed 1MHz. Average time to save checkpoint is 5 Average time to save checkpoint is 5

secs. secs. 5% overhead in online checkpointing.5% overhead in online checkpointing. 20% overhead in offline checkpointing.20% overhead in offline checkpointing.


ConclusionConclusion

Automatic error recovery is Automatic error recovery is important in targetless emulation.important in targetless emulation.

The proposed method is flexible, The proposed method is flexible, scalable, reliable.scalable, reliable.

No special HW extension is required.No special HW extension is required. Minimal overhead on execution Minimal overhead on execution

speed.speed.


Q & AQ & A

Thank youThank you

emulation error recovery

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