ete 204 - digital electronics multiplexers, decoders and encoders [lecture:10] instructor: sajib roy...
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ETE 204 - Digital Electronics
Multiplexers, Decoders and Encoders
[Lecture:10]Instructor: Sajib RoyLecturer, ETE, ULAB
Multiplexers
● A multiplexer has
- 2n data inputs
- n control inputs
- 1 output
● A multiplexer routes (or connects) the selecteddata input to the output.
- The value of the control inputs determines thedata input that is selected.
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Multiplexers
Datainputs
Controlinput
Z = A′.I0 + A.I1
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Multiplexers
A B Z0 0 I0
0 1 I1
1 0 I2
2120 1 1 I 3
m0 = A'.B'MSB LSB m1 = A'.B
m2 = A.B'm3 = A.B
Z = A′.B'.I0 + A'.B.I1 + A.B'.I2 + A.B.I3
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MultiplexersA B C Z
0 0 0 I0 m0
0 0 1 I1 m1
0 1 0 I2 m2
0 1 1 I3 m3
1 0 0 I4 m4
1 0 1 I5 m5
20
22
1 1
1 1
0 I 6
1 I 7
m6
m7
MSB LSB
Z = A′.B'.C'.I0 + A'.B'.C.I1 + A'.B.C'.I2 + A'.B.C.I3 +A.B'.C'.I0 + A.B'.C.I1 + A'.B.C'.I2 + A.B.C.I3
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Multiplexers
20
2n-1
Z = mi.Ii
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Decoders● A decoder has
- n inputs
- 2n outputs
● A decoder selects one of 2n outputs bydecoding the binary value on the n inputs.
● The decoder generates all of the minterms ofthe n input variables.
- Exactly one output will be active for eachcombination of the inputs.
What does “active” mean?7Summer2012 ETE 204 - Digital Electronics
Decoders
Z0A
2-to-4Decoder
msb B
Z1
Z2
Z3
Zi = mi
active-high output
A B Z0 Z1 Z2 Z3
0 0 1 0 0 0 m0
0 1 0 1 0 0 m1
1 0 0 0 1 0 m2
1 1 0 0 0 1 m3
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Decoders
Z0A
2-to-4Decoder
msb B
Z1
Z2
Z3
Zi = (mi)' = Mi
active-low output
A B Z0 Z1 Z2 Z3
0 0 0 1 1 1 M0
0 1 1 0 1 1 M1
1 0 1 1 0 1 M2
1 1 1 1 1 0 M3
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Decodersmsb
3-to-8Decoder
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Decoder with Enable
A
B
En
active-high enable
2-to-4Decoder
withEnable
Z0
Z1
Z2
Z3
En A B Z0 Z1 Z2 Z3
1 0 0 1 0 0 0
1 0 1 0 1 0 0enabled1 1 0 0 0 1 0
1 1 1 0 0 0 1
disabled 0 x x 0 0 0 0
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Decoder with Enable
A
B
En
active-low enable
2-to-4Decoder
withEnable
Z0
Z1
Z2
Z3
En A B Z0 Z1 Z2 Z3
0 0 0 1 0 0 0
0 0 1 0 1 0 0enabled0 1 0 0 0 1 0
0 1 1 0 0 0 1
disabled 1 x x 0 0 0 0
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Encoders● An encoder has
- 2n inputs
- n outputs
● Outputs the binary value of the selected(or active) input.
● Performs the inverse operation of a decoder.
● Issues- What if more than one input is active?
- What if no inputs are active?13Summer2012 ETE 204 - Digital Electronics
Encoders
Y0
Y1
Y2
Y3
A4-to-2
EncoderB
Y0 Y1 Y2 Y3 A B
1 0 0 0 0 0
0 1 0 0 0 1
0 0 1 0 1 0
0 0 0 1 1 1
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Priority Encoders
● If more than one input is active, the higher-orderinput has priority over the lower-order input.
- The higher value is encoded on the output
● A valid indicator, d, is included to indicate whether ornot the output is valid.
- Output is invalid when no inputs are active
● d = 0
- Output is valid when at least one input is active
● d = 1Why is the valid indicator needed?
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Priority Encoders
msb8-to-3
PriorityEncoder
Valid bit
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Using a 2n-input Multiplexer● Use a 2n-input multiplexer to realize a logic circuit fora function with 2n minterms.
- n = # of control inputs = # of variables in the function
● Each minterm of the function can be mapped to adata input of the multiplexer.
● For each row in the truth table, for the function,where the output is 1, set the corresponding datainput of the multiplexer to 1.
- That is, for each minterm in the minterm expansion of thefunction, set the corresponding input of the multiplexer to 1.
● Set the remaining inputs of the multiplexer to 0.17Summer2012 ETE 204 - Digital Electronics
Using an 2n-input Mux
Example:
Using an 8-to-1 multiplexer, design a logic circuitto realize the following Boolean function
F(A,B,C) = m(2, 3, 5, 6, 7)
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Using an 2n-input Mux
Example:
Using an 8-to-1 multiplexer, design a logic circuitto realize the following Boolean function
F(A,B,C) = m(1, 2, 4)
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Using an 2(n-1)-input Multiplexer● Use a 2(n-1)-input multiplexer to realize a logic circuitfor a function with 2n minterms.
- n - 1 = # of control inputs; n = # of variables in function
● Group the rows of the truth table, for the function, into2(n-1) pairs of rows.
- Each pair of rows represents a product term of (n - 1)variables.
- Each pair of rows is mapped to one data input of the mux.
● Determine the logical function of each pair of rows interms of the remaining variable.
- If the remaining variable, for example, is x, then thepossible values are x, x', 0, and 1. 20
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Using an 2(n-1)-input Mux
Example: F(x,y,z) = m(1, 2, 6, 7)
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Using an 2(n-1)-input Mux
Example: F(A,B,C,D) = m(1,3,4,11,12-15)
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Using a 2(n-2)-input Mux
A similar design approach can be implementedusing a 2(n-2)-input multiplexer.
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Circuit Design using Decoders
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Using an n-output Decoder
● Use an n-output decoder to realize a logic circuit for afunction with n minterms.
● Each minterm of the function can be mapped to anoutput of the decoder.
● For each row in the truth table, for the function, wherethe output is 1, sum (or “OR”) the correspondingoutputs of the decoder.
- That is, for each minterm in the minterm expansion of thefunction, OR the corresponding outputs of the decoder.
● Leave remaining outputs of the decoder unconnected.
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Using an n-output Decoder
Example:
Using a 3-to-8 decoder, design a logic circuit torealize the following Boolean function
F(A,B,C) = m(2, 3, 5, 6, 7)
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Using an n-output Decoder
Example:
Using two 2-to-4 decoders, design a logic circuitto realize the following Boolean function
F(A,B,C) = m(0, 1, 4, 6, 7)
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Hierarchical Design
● Several issues arise when designing largemultiplexers and decoders (as 2-level circuits).
- Number of logic gates gets prohibitively large
- Number of inputs to each logic gate (i.e. fan-in)gets prohibitively large
● Instead, design both hierarchically
- Use smaller elements as building blocks
- Interconnect building blocks in a multi-tierstructure
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Hierarchical Design
Exercise:
Design an 8-to-1 multiplexer using4-to-1 and 2-to-1 multiplexers only.
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Hierarchical Design
Exercise:
Design a 16-to-1 multiplexer using4-to-1 multiplexers only.
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Hierarchical Design
Exercise:
Design a 4-to-16 decoder using2-to-4 decoders only.
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Questions?
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