EtherCAT® Master on Sitara™ Processors - TI Training · PDF fileTraining series agenda Part 1: •Overview of Training Series •Sitara processors family in factory automation •EtherCAT
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EtherCAT® Master on Sitara™ Processors EtherCAT® Master on Sitara™ Processors Training Series [Part 1] Sitara Factory Automation + EtherCAT Protocol Overview
Hello, everybody. I'm going to give a training series talking about EtherCAT Master on Sitara processors. In this video, I will first explain the goal and the scope of this training series and how the training is structured. Finally, we will cover a quick review of EtherCAT industrial protocol technology.
Training series agenda Part 1:
• Overview of Training Series
• Sitara processors family in factory automation
• EtherCAT protocol technology review
Part 2:
• Acontis EtherCAT master software architecture on top of TI-RTOS and RT Linux
• CoDeSys EtherCAT master software architecture on top of RT Linux
Part 3:
• EtherCAT master + time-triggered send (TTS)
• EtherCAT master on Sitara: A scalable and flexible solution
Presenter
Presentation Notes
This training will present a TI’s ready-to-use EtherCAT masters solutions for Sitara processors. EtherCAT master on Sitara runs on different operating systems, such as TI-RTOS and RT Linux, and runs in any of the devices EMACs interfaces (which are CPSW and PRU ICSS_EMAC). The training series is divided in three sections. Part 1 (this video) gives an overview of what will be covered in the training, how Sitara family fits in the different factory automation levels, and an introduction to the EtherCAT technology. Part 2 covers the essential understanding of two commercial EtherCAT master (acontis EC-Master and CoDeSys 3S), and how these masters works on top of TI’s Sitara HW and SW framework. In Part 3 we will briefly explain PRU-ICSS Time Triggered Send (or TTS) and how TTS can be used along with EtherCAT master for some application which require precision time. Also, in Part 3, of these series, we will re-cap why Sitara is a scalable and flexible solution for EhterCAT master.
Sitara Processors in Factory Automation
Sitara processors in factory automation
Industrial PC
Master communication
Operator Level
Slave communication
Field Level
Master/Slave communication
Control Level
HMI
PLC 1 PLC 2
Industrial Drives
Input Output
Motion Controller / CNC
Virtualization
Controller Control + Compute
FieldBus Connected Drives
Engineering
Presenter
Presentation Notes
TI is uniquely positioned to provide efficient & scalable system solutions in Factory automation. TI’s HW (Analog & Processor) + SW (communications & applications) gives to industrial systems a solution at every level. Let’s see how a factory automation systems look like, and which machines need to work together. In Field Level we have I/O Modules, actuators, drives, Slave PLCs, entry-level HMIs and RTUs, among others. Sitara’s AM335x and AM437x are a perfect match (cost-performance) for this type of field level automation devices. In Control Level we could have mid-range HMIs, PLCs and CNCs. PLCs and CNCs collect information from and issue commands to the field level. TI’s AM335x, AM437x and AM57x devices can fit the different needs at factory control level. In Operation Level there are Master PLCs, Motion Control, and high-end HMI among others. Here, information is communicated with operators and operators can issue commands. AM57x SoC architecture and communication feature gives the high performance required at factory automation operation level. To provide determinism and meet the critical timing needs of this environment, industry systems typically require Real Time Operating Systems (RTOSes) in order to carefully control latency. Also, In order to ensure low latency and communication robustness, nodes are typically connected by industrial communications. TI’s offers a Processor SDK for TI-RTOS and RT-Linux and also industrial communication protocols, ready to be used, such as EtherCAT, Profinet, Profibus, etc.
EtherCAT Protocol Technology Review
EtherCAT: How it works and key features Each node reads the data addressed to it and writes its data back to the frame on-the-fly.
Presenter
Presentation Notes
- How EtherCAT works: Each node reads the data addressed to it and writes its data back to the frame, all while the frame is moving downstream (on-the-fly). This guarantees the only delay the frame perceives is due to hardware propagation. - During EtherCAT startup, the master device configures and maps the process data on the different slave devices. Each slave device is assigned one or more addresses in a global address space. If multiple slave devices has assigned addresses in the same area, they can all be addressed with a single Datagram, as shown in the picture. This is a big advantage compare to other protocols that have to address each slave independently per cycle. - Different amounts of data can be exchanged with each slave, from one bit, few bytes, or even up to kilobytes of data. - Compared with plain Ethernet TCP/IP protocols, EtherCAT protocol is actually optimized for short cyclic process data. - Another key point is that EtherCAT work with other protocols via mailbox. For example, TCP/IP connections can be tunneled through a mailbox channel without impacting real-time data transfer. - A typical configuration is an open daisy chain, in this configuration the last node in a segment or branch detects an open port and sends the message back to the master using Ethernet technology’s full duplex feature.
EtherCAT: Benefits of use • High-performing mode of operation, in which a single frame is usually sufficient to
send and receive control data to and from all nodes!
• Improved bandwidth utilization makes EtherCAT a fast Industrial Ethernet protocol
• No need for switches or hubs
• Easy to setup and diagnose errors
• Low cost: No need for active infrastructure component
• Functional safety: Black channel approach
• Open technology
• EtherType field identifier Ox88A4.
Presenter
Presentation Notes
EtherCAT’s key functional principle lies in how its nodes process Ethernet frames: EtherCAT has a High-performing mode of operation, in which a single frame is sufficient to send and receive control data to and from all nodes This leads to improved bandwidth utilization (one frame per cycle is often sufficient for communication) Which also eliminates the need for switches or hubs. And because there are not switches to configure, and no complicated handling of MAC or IP addresses is required, EtherCAT setup is simple. EtherCAT is a Low Cost protocol: EtherCAT doesn’t require any active infrastructure components. The master device doesn’t require a special interface card, if TTS is not used, and the slave devices can be deployed in our Sitara family devices, starting from our compact low cost AMIC110 to our high-end AM57x SoC. Functional Safety is built directly into the bus with options for both centralized and decentralized safety logic. The communication layer works as a black channel EtherCAT is an internationally standardized open technology, meaning anyone is free to use the technology in a compatible way.
EtherCAT key features: Flexible topology Flexible topology: Line, bus, star, tree or any combination
Presenter
Presentation Notes
An EtherCAT network can support up to 65,535 devices without placing restrictions on their topology: line, bus, tree, star – or any combination of them
EtherCAT key features: Distributed clocks Distributed clocks (DC) use hardware-based synchronization with compensation for propagation delays.
Presenter
Presentation Notes
- Distributed Clocks (DC) is a hardware-based synchronization with compensation for propagation delays. The clock from the first slave device is distributed to all other devices in the system. - DC is useful in applications with spatially distributed processes ,which require simultaneous actions where exact synchronization is particularly important. For example, this is the case for applications in which multiple servo axes execute coordinated movements. - Also, In motion control applications, cycle accuracy is important in addition to synchronicity and simultaneousness. In such applications, velocity is typically obtained from the measured position, so it is critical to measure position in exact cycles. Even very small inaccuracies in the position measurement timing can translate to larger inaccuracies in the calculated velocity.
EtherCAT Master: How it works • Master can use regular CPSW/GMAC interface or PRU-ICSS, if TTS is used.
• Mapping occurs at the slave devices so that information that arrives at the master is already sorted.
• Performance at master depends mainly on application.
• Implementation on master could be done in different OS. For example, TI-RTOS, Linux, QNX, RTX, VxWorks, etc.
• EtherCAT Network Information (ENI) contains Process Data (PD) and boot commands for each slave.
• Class-A-Master is a standard EtherCAT master device.
• Class-B-Master is a master device with fewer functions for embedded systems with hardware restrictions.
Presenter
Presentation Notes
- EhterCAT master can use a regular ethernet port / controler or PRU-ICSS EMAC interface, if TTS is used - EtherCAT network mapping occurs at the slave devices. Each slave device writes its data to the right location in the process image and reads the data addressed to it all while the frame is moving through. Therefore, the process image that arrives at the master device is already sorted correctly. - Because master’s CPU is no longer responsible for the sorting information, its performance requirements depend mainly on the application on top of EtherCAT and not onto the EtherCAT interface. - Implementation on master could be done in different OS. For example TI-RTOS, Linux, QNX, RTX, VxWorks, etc - EtherCAT master requires the cyclic process data structure as well as boot-up commands for each slave device. This information can be configured in an ENI file - Class-A-Master is a standard EtherCAT master device, while a Class-B-Master is a master device with fewer functions for embedded systems with HW restrictions
EtherCAT Master key features: Redundancy Redundancy for high availability
Presenter
Presentation Notes
- Fast detection: recovery time is less than 15 μs. If a cable is broken, then the master will manage the network, seamless, as two branches Note to myself: add dynamic draw to show redundancy
EtherCAT Master: Bus timing diagram
Presenter
Presentation Notes
EtherCAT master first read the inputs, process them in the application and generate outputs to the slaves. Cyclic packets, containing output information to the slaves, are then sent in EtherCAT datagrams. Acyclic packets, if exist, will be send after cyclic packets. Finally EtherCAT master wait (idle) until the next cycle time occurs
