ethernet switch framework - bsdcantl-wr1043nd 5 1000-baset ports, 802.11n wifi, usb 2.0 realtek...
TRANSCRIPT
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Ethernet Switch FrameworkFully utilize your Wifi router
Stefan BethkeBSDCan 2012
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The Power to Serve…
… in a $30 box
with Ethernet and Wifi
with USB
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Why?
Built-in firmware is limited
Configuration management
Remote access
Special applications
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Why FreeBSD?
OpenWrt, DD-WRT, etc.
Great projects, but not BSD
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So what’s missing?
Adrian Chadd did the heavy lifting for QualcommAtheros HW
Drivers for Ethernet switch, some wireless HW
Shrinking FreeBSD to 8MB or even 4MB image
Configuration mechanisms
Flash file system
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Architecture & Design
Wifi Router Hardware
Framework Architecture
Configuration Interface
Further Work
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Hardware
What‘s in a box?
System Components
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What’s in a box?
•SoC
•SPI ROM
•RAM
•Radio
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DRAM
WirelessFlash
CPU EthernetUSB
Switch
GPIO
Typical BussesSPI: FlashPCI: WirelessMII: Switch, PHYI2C: SwitchVarious platform-specific ones
System Components
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32M RAM
AR91004M ROM
MIPS24K EthernetUSB
AR8216
GPIO
TL-MR3420
AR7241
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TL-MR3420
5 100-BaseT ports, 802.11n Wifi, USB 2.0
Integrated Switch Controller
Controlled via MDIO interface
.1q VLAN tagging, priority
1 WAN Ethernet, 2nd Ethernet connected to switch (4 ports)
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32M RAM
AR91008M ROM
MIPS24K EthernetUSB
RTL8366
GPIO
TL-WR1043ND
AR9132
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TL-WR1043ND
5 1000-BaseT ports, 802.11n Wifi, USB 2.0
Realtek RTL8366RB Gigabit Switch Chip
Controlled via I2C-like interface, connected to CPU GPIO
.1q VLAN tagging, priority
Only one Ethernet interface, needs VLAN configuration for LAN/WAN split
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Architecture & Design
Wifi Router Hardware
Framework Architecture
Configuration Interface
Further Work
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Framework Architecture
Hardware-specific drivers for each chip (family)
Generic kernel API for configuration, management
IOCTL interface for userland via generic driver
PHY management via miibus(4)
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RTL8366RB in TL-WR1043
MAC4
MAC
PHY4
PHY3
PHY2
PHY1
PHY0
MAC3
MAC2
MAC1
I2C
MAC0
MAC5MDIO
SwitchCtrl
GPIO
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Device Tree – TL-WR1043nexus0
gpio0
iicgpio0gpiobus0
iicbb0iicbus0
rtl8366rb0
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802.3 MII Model
MAC
100bLXPHY
100bFXPHY
100bTXPHY
8P8C „RJ45“
Fiber
Fiber
MDIO/MDC
TX*/RX*/COL/CRS
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Device Tree—2 Ethernetsnexus0
arge0
*phy0
miibus0
arge1
*phy1
miibus1
PHY driver according to auto-attach
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miibus(4) APImiibus_if.m methods
MDIO access: readreg, writereg
MAC configuration: linkchg, statchg, mediainit
if_media.h callbacks
MAC configuration: change, status
mii_attach uses both device_t and ifnet
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Port PHYs – TL-WR1043rtl8366rb0
miibus0phy0
ifnet
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Switch Controllers on MDIO
Connected to the CPU via MDC/MDIO lines
Some look like PHYs with additional registers
Some have completely different register model
miibus(4) not really prepared to deal with this
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AR7241 Switch
GE0MDIO MAC4
GE1MDIO
MAC
PHY4
PHY3
PHY2
PHY1
PHY0
MAC
MAC3
MAC2
MAC1
MAC0
MDIO
MAC5MDIO
SwitchCtrl
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?
Device Tree—Switch/PHYnexus0
arge0
*phy4
miibus4
arge1Switch
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Device Tree—floatphynexus0
arge0
floatphy4
miibus4
arge1Switch
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floatphy
Presents as a PHY driver attached via hint
Funnels MDIO access through hidden channel to switch driver
Replaces existing PHY drivers
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Device Tree—miiproxynexus0
argemdio0 mdio0 Switch
mdio1maddr=0x1a mdioproxy1
*phy4miibus4miiproxy0
mdio=mdioproxy1
arge0
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MDIO/MII Proxy
Separates MDIO access from MAC configuration
Provides attachements to both MDIO and Ethernet driver
Fully transparent to miibus(4) and PHY drivers
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Switch Driver Attachment
Generic “switch bus” abstraction
Standard newbus APIs
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Switch Driver Attachment
Generic “switch bus” abstraction
Bus-specific driver shim attaches to bus
Generic code provides external API & register abstraction
Switch driver attaches to generic driver
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Device Tree—Switch BusBus
Shim
HW-spec.
switch0 ioctl cdev
newbusmethods
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Switch Driver AttachmentStandard newbus, bus_space APIs
Hardware-specific switch driver attaches to bus
Provides generic API through newbus methods
IOCTL driver attaches to HW-specific driver
Additional drivers can attach to in-kernel API
Auto-attaching
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Device Tree—Std. NewbusBus
HW-spec.
others…
switch0 ioctl cdevnewbusmethods
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Architecture & Design
Wifi Router Hardware
Framework Architecture
Configuration Interface
Further Work
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Abstract Switch
Switches vary considerably, esp. in advanced features
Base feature set comparable
PHYs on ports
16 VLAN entries
MAC table management
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Must-have Features
Initialization
Register Peek and Poke
Capability API
Port-based and .1q VLANs
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VLAN Managment
Port-based and .1q VLANs are mutually exclusive
Ports are either trunked (.1q tagged) or untagged
Ports have a default VLAN ID
VLAN entries have a VLAN ID, member port list
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Architecture & Design
Wifi Router Hardware
Framework Architecture
Configuration Interface
Further Work
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To-Do
Finalize open questions (attachment, miibus, API) ✔
Commit base version ✔
Update existing drivers
Add additional drivers for common hardware
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The FutureAdvanced switch features
.1Q Priority Queues
Forwarding table management, Packet Filtering
NAT
Spanning Tree
.1X Port Security
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People & Links
Adrian Chadd [email protected]
Aleksandr Rybalko [email protected]
Stefan Bethke [email protected]
wiki.freebsd.org/StefanBethke/EtherSwitch
zrouter.org