exemplo_movilidade

Upload: jlopezsa

Post on 03-Apr-2018

214 views

Category:

Documents


0 download

TRANSCRIPT

  • 7/29/2019 exemplo_movilidade

    1/7

    Effects of Series resistance, EffectiveMobility and Output Conductance on Si-NWFET Based on Y-function TechniqueHabib Muhammad Nazir Ahmad1, A K M Arifuzzman2, Nadia Nowshin3, Chowdhury Akram

    Hossain4

    1,2,3,4Department of EEE, American International University-Bangladesh, Dhaka,[email protected],[email protected],[email protected],[email protected].

    Abstract:This paper deals with a technique that extracts the MOSFET parameter using the Y-function technique, inconjunction with the drain current, the transconductance data and the series resistance () in silicon nanowireFETs (Si-NWFET). This technique relies on combining drain current and output conductance, which enablesreliable values of the threshold voltage () , mobility () , mobility attenuation coefficient (), the seriesresistance () to be obtained. The extracted drain current, effective mobility total resistance and outputconductance values are shown through MATLAB simulation. The extracted results have been shown in goodagreement with simulation which expresses the validity of our proposed technique. The technique only requiresa single device for extraction of () and the iteration procedure for fitting the data.Keywords- Si Nanowire FET (Si-NWFET), Y-function, Mobility Attenuation coefficient (), OutputConductance ().1. Introduction

    Over the last decade, various methods for the extraction of MOSFET parameters have been proposed [1-4].These methods are primarily based on the threshold voltage ( that can be obtained by extrapolating thelinear region of the transfer characteristics (to zero drain current. Recently, the methods of preparing newfunctions are paying more attention on MOSFET parameters [5-8]. These new methods only perform the currentand transconductance ratio or current integral with respect to the terminal voltage so to extract the relativeparameters, showing fast and simplicity to some extent. Silicon nanowire FET (Si-NWFET) is generally viewedas a promising next generation device, exhibiting high ON/OFF current ratio, excellent gate controllabilitythrough gate-all-around (GAA) structure, and the immunity from the short-channel effects[9-10]. However,because of its nanoscale 3-D process configurations, the devices show large variations in performance,compared with planner MOSFETs [11-12]. To date there has been no extraction of the output conductancewith the Y-function technique. In this paper for the first time a new method has been presented to find out theoutput conductance of silicon nanowire FETs (Si-NWFET) by combining mobility effect ( and thethreshold voltage based on the Y-function technique.

    The outline of this paper is as follows: Section two, contains the extraction procedure, which is againsubdivided into four parts. The Y-funaction of Si-NWFET is described in part-A, part-B explains seriesresistance )in Si-NWFET, part-C describes the extraction procedure of output conductance (, andpart-D shows the flowchart for extracting , , and . In section three, the simulated plots fordifferent equations are shown and discussed as well. And finally some conclusions are drawn in section four.

    2. Extraction Procedure

    A. Y-Function of Si-NWFET

    In linear and strong inversion region, the drain current can be generally expressed for a small drain voltage

    by: 0. . (1), where .

    Habib Muhammad Nazir Ahmad et al. / International Journal of Engineering Science and Technology (IJEST)

    ISSN : 0975-5462 Vol. 3 No. 1 Jan 2011 285

  • 7/29/2019 exemplo_movilidade

    2/7

    And, and are the voltages applied at the drain terminal and the actual drain voltage dropped acrossthe channel, respectively, and is the effective gate voltage inverting the channel charge in continuousmanner for all . Andis given in terms of the carrier mobility, oxide capacitance and the aspect ratio [13], (2)

    For strong inversion, and at a small, one can put , (3)And the Y-function can be found from Eq. (1) as (see appendix from discussion)

    0 . . (4)

    And, from this function with 80/82 nm we can find out the value of0 and(where width of the

    channel and length of the channel). For a device with 80/82 nm the optimally determined value of0 111.5 10 and the value of 0.5002 . By using these values of 0 and we can determinethe value of the Y function.

    B. Extracting in Si-NWFET

    Fig. 1. Equivalent circuit of MOSFET with series resistance ( The series resistance is an important parameter for Si-NWFETs. As the channel length scales down, thechannel resistance becomes correspondingly small and it has, therefore become more important to keepmuch smaller than . Otherwise a significant portion of the applied voltage could be dropped across ,thereby creating significant current degradation and variation. To extract some researchers used thechannel-resistance method (CRM) [14-15]. As its well known that CRM is a simple technique and mostly usedfor long-channel MOSFETs. Thus, when the channel length becomes shorter, the total resistance versuscurves for different gate overdrive voltages often fail to intersect, a key step for extracting[16]. Besides that,although there is a difference between the external voltage and the channel voltage drop from source todrain , but in CRM these two voltages are taken to be the same, i.e., . This inconsistency in theassumption can be clearly seen from the definition of the total resistance, and series and channel resistances

    (5)

    So, to find out the value of we have used an alternative technique (see the appendix for discussion) and canwrite:

    . (6), where

    Habib Muhammad Nazir Ahmad et al. / International Journal of Engineering Science and Technology (IJEST)

    ISSN : 0975-5462 Vol. 3 No. 1 Jan 2011 286

  • 7/29/2019 exemplo_movilidade

    3/7

    C. Extracting output conductance FETsThe output conductance extraction of the Si-NWFET is conducted within the regime of the FETs linear regionand, therefore relies on the following well known drain current expression:

    0. . (7)

    The is the effective mobility (8)

    , where 5 0 5 1 0 is the low-field mobility and is the mobility attenuation coefficient. Unlike theplanner MOSFET, a Si-NWFET shows no severe mobility degradation due to the volume channel inversion [17-18]. But it should be noted that the value of used in Eq. (8) is determined from the following expression: (9)

    Here, is the intrinsic mobility reduction factor and the value of has been deduced as 0.14. By usingthis value o f, we can find the value of from Eq. (9) and after that by using the value of in Eq. (8) we canobtain the value. And last of all the value of will be used in the following equation to get the outputconductance.

    The output conductance can be written as, (10), where and are the effective channel width and length,3.98.85410/1610)} is thegate oxide capacitance, is the charge threshold voltage and and are the gate and drain voltagesrespectively.

    STEP 1 Extract0, from the Y-function with .

    Fig- 2. Extraction flow chart for , , and3. Result and Discussion

    Here all the figures extract different Si-NWFET parameters with the same channel width and length ( 80/82).Fig.3 shows the typical plots of the output characteristics of for different gate voltages. As

    , so a linear dependency with the drain voltage is clearly observed at low drain voltage the plot fordecreases.

    STEP 2 0, are fitted to (6) to determine.

    STEP 3 , 0.14 are fitted inequation (9) to get the value of

    mobility degradation.STEP 4 Value ofis used in equation (8) to get

    the effective mobility.STEP 5 Finally using the value of,

    , in equation (10) to get.

    END

    Habib Muhammad Nazir Ahmad et al. / International Journal of Engineering Science and Technology (IJEST)

    ISSN : 0975-5462 Vol. 3 No. 1 Jan 2011 287

  • 7/29/2019 exemplo_movilidade

    4/7

    Fig. 3. Drain Current versus total resistance with different drain voltage.

    .

    Fig. 4. Gate voltage versus series resistance.

    0.5 1 1.5 2 2.5 3

    x 10-4

    0

    500

    1000

    1500

    2000

    2500

    3000

    3500

    4000

    Ids [A]

    Rt[ohm-m]

    For Vds=0.005V

    For Vds=0.025V

    For Vds=0.05V

    For Vds=0.06V

    For Vds=0.08V

    0.8 1 1.2 1.4 1.6 1.8 2-1

    0

    1

    2

    3

    4

    5

    6x 10

    6

    Vgs [v]

    Rsd[ohm-m]

    For Vds=0.05V

    For W/L = 80/82 [micrometer]

    Habib Muhammad Nazir Ahmad et al. / International Journal of Engineering Science and Technology (IJEST)

    ISSN : 0975-5462 Vol. 3 No. 1 Jan 2011 288

  • 7/29/2019 exemplo_movilidade

    5/7

    Fig. 5. Gate voltage versus effective mobility.

    Fig. 6. Gate voltage versus output conductance.

    Fig.4 shows the plot of for different gate voltages () for a constant value of drain voltage ( 0.05V).From Eq. (6), it is observed that is inversely proportional to .Thus Fig.4 shows that with theincrease in gate voltage the extracted series reistancedeclines. The value of effective mobility () isobtained by applying Eq. (8) to our data. For example, under the conditions of 0.05 and 0.5002, Eq. (8) gives the effective mobility for different gate voltages as shown in Fig.5. From here, one caneasily find that shows a sharp fall with the increase in gate voltage, as effective mobility is inversely

    0 0.5 1 1.5 20

    0.005

    0.01

    0.015

    0.02

    0.025

    0.03

    0.035

    0.04

    Vgs[V]

    Effectivemobility

    For Vds= 0.05V

    0 0.5 1 1.5 2-2

    -1

    0

    1

    2

    3x 10

    -10

    Vgs [V]

    Outputconductance,Gout[A/V]

    For Vds= 0.05V

    For W/L = 80/82 [micrometer]

    Habib Muhammad Nazir Ahmad et al. / International Journal of Engineering Science and Technology (IJEST)

    ISSN : 0975-5462 Vol. 3 No. 1 Jan 2011 289

  • 7/29/2019 exemplo_movilidade

    6/7

    proportional to gate voltage. And last of all Fig. 6 shows the corresponding plot of the computed outputconductance ( characteristics for different gate voltages. As expected from Eq. (10), a linear dependencewith drain voltage and gate voltage is clearly observed in the figure. Thus a sharp rise in the output conductancewith increase inis depicted from the curve.4. CONCLUSION

    The extracted results of Si-NWFET parameters with Y-function have been shown here. This method deals forthe very first time with the combination of the series resistance, drain current, effective mobility and outputconductance characteristics. Its a simple method and should be very useful not only for extracting the FETparameters and characterizations of them in future research but also for the progress in the semi conductor field.

    APPENDIX

    A. Derivation of (6)If we consider Eq. (1) and Eq. (5) then and can be written as:

    (A1)

    And,

    . (A2)Now if we put , from Eq. (3) then Eq. (A2) becomes: . (A3)

    By using Eq. (A1) and Eq. (A3), can be written as:

    10 .

    B. Derivation of (4)If we consider the voltage drop for all regions, and are written as 0 . . (A4)And, .

    0.. . (A5)

    In the strong inversion ,

    shown as

    0. . 0. 0. .

    ../

    Habib Muhammad Nazir Ahmad et al. / International Journal of Engineering Science and Technology (IJEST)

    ISSN : 0975-5462 Vol. 3 No. 1 Jan 2011 290

  • 7/29/2019 exemplo_movilidade

    7/7

    0 . . 1 (A6)

    If the voltage drop is ignored , Y-function becomes, 0. (A7)

    References

    [1] D. L Moneda, F.H. Koetecha, and M. Shatzkes, Measurment of MOSFET constants, IEEE Electron Device Lett., vol. EDL-3,pp.10-12, Jan,1982.

    [2] N. Arora, MOSFET Models VLSI Cir. Simulation-Theory and Practice: Berlin, Germany: Springer-Verlag,1993.[3] T. Grotjohn and B. Hoefflinger, A parametric short channel MOS transistor model for subthreshold and strong inversion

    currents, IEEE Trans. Electron Devices, vol. ED-31, pp. 234-246, Feb. 1984.[4] K. Terada, K . Nishiyama, and K. I . Hatanaka, Comparison of MOSFET threshold voltage extraction methods, Solid State

    Electron., vol.45,pp.35-40, 2001.[5] S.Jain, Measurment of threshold voltageand channel length of submicron MOSFETs,Proc.Inst.Elect.Eng.,

    Circuit.Dev.Syst.,vol.135, pp. 162-164, 1988.[6] W. Fikry, G.Ghibaudo, H. Haddara, S. Cristoloveanu, and M. Dutoit, Method for extracting deep submicrometer MOSFET

    parameters, Electron. Lett., vol. 31, pp. 762-764,1995.[7] F. J . G. Sanchez, A. Ortiz-Conde, G. D. Mercato, J. A. Salcedo, J . J . Liou, and Y. Yue, New simple procedure to determine the

    threshold voltage of MOSFETs, Solid State Electron., vol. 44, pp. 673-675, 2000.

    [8] A. Ortiz-Conde, E. D. G. Fernanades, and J. J . Liou et al., A new approach to extraction of the threshold voltage of MOSFETs,IEEE Trans. Electron Devices., vol. 44, pp. 1523-1528, Sept. 1997.

    [9] S.D. Suk, S.-Y.Lee, S.-M. K im, M. Li, C.W. Oh, K. H. Yeo, S.H. Kim, D.-S.Shin, K.-H. Lee, H. S. Park, J. N. Han, C. J . Park, J.-B.Park, D.-W. K im, D. Park, and B.-I. Ryu, High performance 5 nm radius twin silicon nanowire MOSFET (TSNWFET): Fabricationon bulk Si wafer, characteristics, and reliabil ity, in IEDM Tech .Dig., 2005, pp. 717-720.

    [10] K. H. Yeo, S. D. Suk, M. Li, Y .-Y. Yeoh, K. H. Cho, K.-H. Hong, S. K. Yun, M. S. Lee, N.M. Cho, K. H. Lee, D. H. Hwang, B. K.Park,D.-W. Kim, D. Park, and B.-I, Ryu, Gate-all-around(GAA) twin silicon nanowire MOSFET(TSNWFET) with 15 nm length gateand 4 nm radius nanowires, in IEDM Tech. Dig., 2006, pp. 1-4.

    [11] H.-H. Hsu, T.-W. Liu, L .Chan, C.-D. L in, T.-Y . Huang, and H.-C. Lin, Fabrication and characterization of multiple-gated poly-Sinanowire thin-flim transistors and impacts of multiple-gate structures on device fluctions, IEEE Trans. Electron Devices, vol. 55, no.11, pp. 3063-3069, Nov. 2008.

    [12]J. Zhuge, R. Wang, R. Huang, Y Tian, L. Zhang, D.-W. Kim, D. Park, and Y. Wang, Investigation of low-frequency noise in siliconnanowire MOSFETs, IEEE Electron Device Lett., vol. 30, no.1, pp. 57-60, Jan. 2009.

    [13] X. Xi, M. Dunga, J . He, W. Liu, K. M. Cao, X. J in, J. J. Ou, M. Chan, A. M. Niknejad, and C. Hu, BSIM4.4.0 Users Manual.Available: http://www-device.eecs.berkeley.edu/ bsim3/bsim4.html.

    [14] S.D. Suk, M. Li, Y . Y. Yeoh, K. K. Yeo, K. H. Cho, I. K. Ku, H. Cho, W. J. Jang, D.-W. Kim, D. Park, and W. S. Lee,Investigation of nanowire size dependency on TSNWFET, in IEDM Tech. Dig.,2007, pp. 891-894.

    [15]J. K im, S. Yang, J. lee, S. D. Suk, K. Seo, D. Park, B.-G. Park, J. D. Lee, and H. Shin, Investigation of mobility in twin siliconnanowire MOSFETs (TSNWFETs), in Proc. Int. Conf. Solid-State Integr. Circuit Technol. (ICSICT). Oct. 2008, pp. 50-52.

    [16]Y. Taur, MOSFET channel length: Extraction and Interpretation, IEEE Trans. Electron Devices., vol. 47,no.1, pp. 160-170, Jan.2000.

    [17] G. Tsutsui, M. Saitoh, T. Saraya, T. Nagumo, and T. Hiramoto, Mobility enhancement due to volume inversion in (110)-orientedultra-thin body double-gate nMOSFETs with body thickness less than 5 nm, in IEDM. Tech.Dig.,2005, pp.729-732.

    [18]J. Chen, T. Saraya, K. Miyaji, K. Shimizu, and T. Hiramoto, Experimental study of mobility in [110]- and [100]-directed multiplesilicon nanowire GAA MOSFETs on (100) SOI, in VLSI Symp. Tech .Dig.. ,2008, pp. 32-33.

    Habib Muhammad Nazir Ahmad et al. / International Journal of Engineering Science and Technology (IJEST)

    ISSN : 0975-5462 Vol. 3 No. 1 Jan 2011 291