module LFSR_5bit (Serial_out2, clk_B, enable2,seed2,Coefficient2); //-------------------PARAMETERS----------------parameter Length2 = 5; //-------------------INPUTS----------------------input [Length2-1:0] Coefficient2; input clk_B, enable2; input [0:Length2-1] seed2;//-------------------OUTPUTS-------------------output Serial_out2;wire Serial_out2; //----------------------VARIABLES---------------- reg [0: Length2-1] Y_B;integer ptr;//------------------MAIN_LOGIC------------------ always @ (posedge clk_B) beginif (enable2 == 1) Y_B