fault tolerance - applied physics...
TRANSCRIPT
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United 737/800
Hacked
“PASS OXYGEN ON anyone?”
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 2
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Virology 101
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 3
“Although particular virus attacks may be guarded
against,
no general defense within one domain of
reference is possible;
viruses are a natural consequence of a stored-
program computation.”
Virology 101 Douglas McIlroy – Bell Laboratories 1989
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Multi-Domain
Architecture
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 4
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Multi-Domain Architecture
Fault Tolerant –
Hardware and Software
Component Failure Analysis
Virus Prevention at Multiple Levels
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 5
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What is Multi-Domain
Architecture
Divides a system into two parts (Domains):
1.Computation (DID)
2.Housekeeping (PAD)
Its an architecture
Can use any old COTS parts and it still
works.
All of the existing software still works.
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 6
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Graphical
Illustration
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 7
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Von Neumann Architecture
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 8
Control
UnitAccumulator
Arithmetic Logic
Unit
CPU
Input Output
Mem-1 Mem-2 Mem-3 Mem-4 Mem-5 Mem-6
System
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CPU
System
Scheduling (Job & Thread)
Data & Instruction
Address Space
Control Signals (interupts)
Single Domain
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 9
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Multi-Domain
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 10
CPU
System
Controller
PAD Controller
Control Signals
Scheduling
Address Space
DID
Data & Instruction
PAD Virtualizer
Address Space
(Scheduler Relay)
Virtualizer
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Comparison
Single Domain Multiple Domain
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 11
User Layer
Kernel Layer
CPU
Physical Layer
Kernel
Layer
MDA Switch
Scheduler, Virtual Memory,
Virtual File System
Memory
Meta
Controller
Inter Process
Communication
Device Driver,
Dispatcher
Applications
User Layer
Kernel Layer
Virtual File System
Inter Process
Communication
Scheduler, Virtual
Memory
Device Driver,
Dispatcher
(CPU, memory, I/O )
Physical Layer
Applications
I/O
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Block Diagram
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 12
Mentor
Controller
KAC
CPU
Proc PC CPU Memory/Notes
Input
Output
Memory
Mem-1 Mem-2 Mem-3 Mem-4 Mem-5 Mem-6
Control
Unit
Arithmetic
UnitAccumulator
Run Time RBAC
CPU
Control
Unit
Arithmetic
UnitAccumulator
MDA Switch
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Multi-Domain Architecture
Doesn’t do anything different
Does them differently
Does things single domain can’t do
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 13
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FEATURES
• Hardware Fault Tolerant
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 15
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FEATURES
• Hardware Fault Tolerant
• Software Fault Tolerant
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 15
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FEATURES
• Hardware Fault Tolerant
• Software Fault Tolerant
• Virus Prevention
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 15
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How
WHEN WHERE
Attack Triangle
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 17
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DID(HOW)
PAD(WHEN) PAD(WHERE)
Attack Triangle
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 18
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FEATURES
• Hardware Fault Tolerant
• Software Fault Tolerant
• Virus Prevention
• Fault isolation
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 19
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FEATURES
• Hardware Fault Tolerant
• Software Fault Tolerant
• Virus Prevention
• Fault isolation
• Reconfigurable HW and SW
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 19
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FEATURES
• Hardware Fault Tolerant
• Software Fault Tolerant
• Virus Prevention
• Fault isolation
• Reconfigurable HW and SW
• Combinatorial Mathematics
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 19
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Simultaneous Failures
Hardware Failure
Virus Problem
Graphical Example
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 20
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
Mem-2
Mem-1
Mem-0P-0
P-1
Display - 0
Display - 1
Mem-3
P-2
P-0
P-1
P-2
CPU-3CPU-2CPU-0
Process Time
P-0
P-1
P-2
CPU-3CPU-2CPU-0
Hardware
Display - 2
Graeco-Latin Square Graeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 21
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
P-0
P-1
P-2
CPU-3CPU-2CPU-0
Process Time
P-0
P-1
P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin Square Graeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 22
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
P-0
P-1
P-2
CPU-3CPU-2CPU-0
Process TIme
P-0
P-1
P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin Square Graeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 23
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
P-0
P-1
P-2
CPU-3CPU-2CPU-0
Process Time
P-0
P-1
P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 24
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
52P-0
P-1
P-2
CPU-3CPU-2CPU-0
Process Time
265P-0
P-1
P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 25
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
52P-0
155P-1
P-2
CPU-3CPU-2CPU-0
Process Time
265P-0
265P-1
P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 26
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
52P-0
155P-1
52P-2
CPU-3CPU-2CPU-0
Process Time
265P-0
265P-1
93P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 27
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
52P-0
155P-1
52P-2
CPU-3CPU-2CPU-0
Process Time
265P-0
265P-1
93P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 28
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
52P-0
155P-1
52P-2
CPU-3CPU-2CPU-0
Process Time
265P-0
265P-1
93P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 29
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
52P-0
155P-1
52155P-2
CPU-3CPU-2CPU-0
Process Time
265P-0
265P-1
9393P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
5252P-0
155P-1
52155P-2
CPU-3CPU-2CPU-0
Process Time
265265P-0
265P-1
9393P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
5252P-0
52155P-1
52155P-2
CPU-3CPU-2CPU-0
Process Time
265265P-0
265265P-1
9393P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
5252P-0
52155P-1
52155P-2
CPU-3CPU-2CPU-0
Process Time
265265P-0
265265P-1
9393P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 33
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
5252P-0
52155P-1
52155P-2
CPU-3CPU-2CPU-0
Process Time
265265P-0
265265P-1
9393P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
Flight Software Workshop 10/26/2015 ©Fault Tolerant Technology [email protected] 34
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
5252P-0
5215552P-1
52155P-2
CPU-3CPU-2CPU-0
Process Time
265265P-0
265265265P-1
9393P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
5252P-0
5215552P-1
5252155P-2
CPU-3CPU-2CPU-0
Process Time
265265P-0
265265265P-1
939393P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
1555252P-0
5215552P-1
5252155P-2
CPU-3CPU-2CPU-0
Process Time
265265265P-0
265265265P-1
939393P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
OutputMem-2
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Graeco Latin Square Analysis
Meta
ControllerKAC
CPU-0 CPU-2
Proc PCCPU Memory/Notes
Input
Output
CPU-1 CPU-3
265
265
93Mem-3
Mem-2
Mem-1
Mem-0P-0
P-1
P-2
1555252P-0
5215552P-1
5252155P-2
CPU-3CPU-2CPU-0
Process Time
265265265P-0
265265265P-1
939393P-2
CPU-3CPU-2CPU-0
Hardware
Display - 0
Display - 1
Display - 2
Graeco-Latin SquareGraeco-Latin Square
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Single Domain Multi Domain
• Fixed System • Limited fault analysis
• Reconfigurable System • Component level analysis
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Single Domain Multi Domain
• Fixed System • Limited fault analysis
• Virus Protection • 35 year legacy
• Reconfigurable System • Component level analysis
• Virus Protection • Disjoint domains • Reconfigurable system
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Single Domain Multi Domain
• Fixed System • Limited fault analysis
• Virus Protection • 35 year legacy
• Computational Speed • CPU does all the work
• Reconfigurable System • Component level analysis
• Virus Protection • Disjoint domains • Secure communications
• Computational Speed • Overhead on separate RISC
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Single Domain Multi Domain
• Fixed System • Limited fault analysis
• Virus Protection • 35 year legacy
• Computational Speed • CPU does all the work
• Software • The Standard
• Reconfigurable System • Component level analysis
• Virus Protection • Disjoint domains • Reconfigurable system
• Computational Speed • Overhead on separate RISC
• Software
• No change / instruction sets • Updates protection
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Multi-Domain
Architecture
Q&A
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