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Beam Test of TGC electronics in 2003

IntroductionElectronics SetupStand-alone Run

Setup Data Results

Consistency of L1ID (event count), BCID (Bunch count) Validity of Trigger Beam Profile Delay curve (PP ASIC adjustment) Detection efficiency Trigger efficiency

Combined Run Setup Results

Chikara Fukunaga (TMU)

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Introduction

TGC electronics has been brought into H8 and made performance tests with actual muon beam in May and September 2003 when SPS has run in 25ns bunched mode.

Two types of tests (Stand-alone test and combined one with RCP, MDT and MUCTPI) have been done.

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Electronics Setup

Chamber (Triplet 32(Strip) x 24(wire), Doublet both 32 chan.) ASD board (16ch.) x 2 PS pack PS board {8 PP (32 ch.) ASICs (Product.), 2 SLB ASICs (Proto. Version 2) , 1 DCS } x2

Hi-pT crate Forward Type Hi-pT board (4 Hi-pT ASIC (Proto. Version 3 ~ final) x1 Proto. Star Switch (SSW) module x2 HSC

ROD crates Sector Logic for r- coincidence RODs (ROD and Test-ROD alternatively (May) or simultaneously (September)) TTCvi - TTCvx CCI

Cables AWT-28 40 twisted pair cable with 10 from ASDs to PS boards Individually shielded TP Category-5 cable from PS board to Hi-pT crate 10m (ATLAS:15

m) for LVDS Optical fiber from Hi-pT crate to Sector Logic/ROD in the hut 30m (ATLAS:150m) for G-

link.

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Stand-alone Run Setup (1)TGC Setup itself is common for Combined run

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T8 type chambers were used for all M1(Triplet), M2(Middle) and M3(Pivot).

Trigger Electronics used were for forward type (PS-board, Hi-pT board) Channels M1 M2 M3

Wire 24 32 32 Strip 32 32 32

Stand-alone Run Setup (2)TGC Setup itself is common for Combined run

T8 for M3 were used also for M2.

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Readout data to be analysed in Stand-alone Run

SLB outputL1ID (Event count), BCID (Bunch count)Hit signal output (Hit map)Low-pT Trigger data for Wire and Strip

SL outputL1ID,BCIDTrigger r- coincidence information

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Results (1) – Consistency of IDs

Functionality of Bunch Counter Reset, Event Counter ResetUnique IDs synchronously detected in all the electronics comp

onents Check of readout data in Test-ROD

ROD records errors in status word of Event Header during DAQ if discontinuities of event counter (L1ID) in TTCrq, discrepancy of L1ID in SLB with one given by TTCrq. discrepancy of Bunch count (BCID) in SLB with one by TTCrq, and time overflow of SSW input

Check of ROD error detections in off-line analysisNo error detected in Test-ROD. It is also confirmed with Off-li

ne analysis with 3.3x105 events with two triggers (scintillater and TGC self)

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Results (2) – Validity of Trigger

Readout data are inputted to t1me simulation to get low-pT (SLB), high-pT (Hi-pT) and R-SL output expectation.

Comparison of them in real-time with actually readout trigger data.

No discrepancy found between data and simulation for 3.3x105 events

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Summary of Data consistency Analysis

Run No.Number of

EventsTrigger

Type Run TypeROD check

Off-line check

Trigger Validity

r38 6350 10x10 Stand-alone 0 0 0

r39 14707 10x10 Stand-alone 0 0 0

r40 11339 10x10 Stand-alone 0 0 0

r41 5074 10x10 Stand-alone 0 0 0

4002 4123 10x10 Combined 0 0 0

4003 12147 10x10 Combined 0 0 0

4004 6478 10x10 Combined 0 0 0

4006 85847 10x10 Combined 0 0 0

4007 101621 10x10 Combined 0 0 0

4009 618 TGC Combined 0 0 0

4010 64 TGC Combined 0 0 0

4013 1106 TGC Combined 0 0 0

4014 78406 TGC Combined 0 0 0

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Results (3) Beam Profile

M1 Triplet

M2 Middle

M3 Pivot

10cm10cm

wire~5cm strip~4.5cmwire~5cm strip~4.5cm

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Delay Adjustment with PP ASIC

A B

A-B=5ns

~ 1.5m

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Gate width Adjustment with PP ASIC

TGC Gate Width (ns)

Delay (ns)

M1 30 11.7

M2 30 15.6

M3 30 15.6

PP ASIC Setting Summary

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Detection Efficiency

Chamber efficiency (Wire) Chamber efficiency (Strip)

M1 M2 M3 M1 M2 M3

Lower Efficiency due to Wire support

Lower Efficiency due to Wire support

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Trigger Efficiency

Overlap of wire supports in 2 Identical chambers for

M2 and M3

Sector Logic Pt=6 pT

Efficiency of SL = 96.7%

If M1 3 channel shift

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Combined Run

MDT,RPC,TGC and MuCTPI have made combined runs in September.

Data Analysis from SFI fileRPC ROD

MDT ROD

TGC ROD

MuCTPI ROD

ROS

SFI

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Summary of Combined run Data Analysis

Run No. Events TriggerError 1

SLMuCTPI

Error 2

SL>MuCTPI

Error 3

Bad BCID

4002 4123 10x10 2 0 5

4003 12147 10x10 3 2 12

4004 6478 10x10 4 1 7

4006 85847 10x10 71 300 410

4007 101621 10x10 59 94 183

4009 618 TGC 0 0 4

4010 64 TGC 0 0 0

4013 1106 TGC 0 0 0

4014 78406 TGC 0 0 58

Error 1: Candidate found in SL is not equal to one in MuCTPI

Error 2: Number of candidates in SL is more than in MuCTPI

Error 3: BCID recorded in SL is not equal to one in MuCTPI

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Correlation of SL and MuCTPI

Correlation of SL and MuCTPI for pT and ROI have been clearly observed

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Summary of Beam Test

Stand-alone test Consistency of BCID,L1ID in all the electronics components have been

observed. Validity of trigger has been confirmed through comparison with simul

ation data Consistent Beam Profile has been observed. Delay and gate width adjustments have been worked.

Bunch Crossing has been identified. Trigger efficiency could be maximised.

Consistency of Low-pT and SL trigger data. Correct trigger data output with 40MHz bunched Muon beam

Combined Run TGC trigger system could generate and distribute triggers for combine

d sub-detector system (RPC,MDT,TGC and MuCTPI). Although some TTC timing adjustment has not been achieved between

MuCTPI and TGC, we found consistency of data between two systems.