files 3-handouts lecture 5

8/13/2019 Files 3-Handouts Lecture 5

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Lecture on: Data Transfer Instructions

The XCHG Instruction

XCHG instruction Swaps data between two registers or a register and memorylocation

Mnemonic Meaning Format Operation Flags affected

XCHG Exchange XCHG D,S (s) (D) None

Destination Source

Accumulator Reg 16

Memory Register

Register Register

Register Memory

NO XCHG: MEMsSEG REGs

Example: XCHG [1234h], BX

Swap the data between register BX and

A word at memory location at offset 1234H


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Ex: For the data shown in the figure what is the result of executing the following

Instruction XCHG [1234H], BX

Execution of this instruction performs the function

(DSx10 +1234H) (BX)

InstructionMemorycontent

SI

SS

BX

CS

IP

DS

ES

AX

CXDX

SP

BP

DI

8088 MPU

Address

87

1E

34

12

XX

XCHG [1234H], BX11101

11102

11103

11104

11105

0101

1100

1200

11 AA

Next instruction

12000

12001

xx

xx

13234

13235

FF

00


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(DS) =1200H, EA or Ofset address =1234H, The PA=12000H+1234H= 13234H

The data at this address is FFH and the address that follows contains 11H.

Memorycontent

SI

SS

BX

CS

IP

DS

ES

AX

CXDX

SP

BP

DI

8088 MPU

Address

Execution of this instruction performs the following 16-bit swap:

(13234H) (BL)

(13235H) (BH)

Thus we get (BX)= 00FFH

[DS:1234]=11AAH Instruction

87

1E

34

12

XX

XCHG [1234H], BX11101

11102

11103

11104

11105

0105

1100

1200

00 FF

Next instruction

12000

12001

xx

xx

13234

13235

AA

11


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The XLAT Instruction

Mnemonic Meaning Format Operation Flags

XLAT Translate XLAT ((AL)+(BX)+(DS)0)(AL) None

The XLAT instruction simplifies implementation of lookup table.

Example: Assume (DS) = 0300H, (BX)=0100H, and (AL)=0DH. Here 0Dh

represent the ASCII character CR.

Execution of XLAT replaces the contents of Al by the contents of memory

location with physical address

PA=(DS)0 +(BX) +(AL)= 03000H + 0100H + 0DH = 0310DH

Thus

(0310DH) (AL) Assuming this memory locations contains 52H (EBCDIC

code for CR) this value is placed in AL. That is (AL)=52h.


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The LEA, LDS, LES Instructions:

Mnemonic Meaning Format Operation Flagsaffected

LEA Load Effective

Address

LEA Reg16,EA EA (Reg16) None

LDS Load Register And

DS

LDS Reg16,MEM32 (MEM32) (Reg16)

(Mem32+2) (DS)

None

LES Load Register and

ES

LES Reg16,MEM32 (MEM32) (Reg16)

(Mem32+2) (ES)

None

The following two instructions are equivalent, however, the second is more

Efficient.

LEA SI, DATA

or

MOV SI, Offset DATA

Example: LEA SI,[DS:2345H] will load SI=2345H


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3000

1000 1000

LDS BX, [DI];

Ex: assume (DI) = 1000H, (DS) = 1000H, content of P.A. 11000H=[11000H] =>7AH,

[11001H]=>12H, [11002H]=>00H, [11003H]=>30H.

What happens if the following instruction is executed.

127ABX

DI

DS

7A

12

00

30

P.A.

11000

11001

11002

11003

(1000)0

xxxx

Register BX is loaded from location DSx10+1000H= 11000H

Register DS is loaded from 11002H.

After

execution

Before

execution

LES similar to LDS except that it loads ES in addition to the specified regisetr


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Ex: Assuming that the 8088 is initialized as shown in the following figure.

What is the result of executing the following instruction?

LES SI, [200H]

This instruction loads SI from memory location at physical location

PA= 12000H + 200H = 12200H and

ES is loaded with the contents of the following two bytes at address 12202H

InstructionMemorycontent

SI

SS

BX

CS

IP

DS

ES

AX

CXDX

SP

BP

DI

8088 MPU

Address

C4

36

00

02

XX

LES SI, [200H]11100

11101

11102

11103

11104

0100

1100

1200 Next instruction

12000

12001

xx

xx

12200

12201

12202

12203

20

00

00

13xxxx


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After execution of LES SI, [200H]

InstructionMemory

content

SI

SS

BX

CS

IP

DS

ES

AX

CX

DX

SP

BP

DI

8088 MPUAddress

C4

36

00

02

XX

LES SI, [200H]11100

11101

11102

11103

11104

0104

1100

1200 Next instruction

12000

12001

xx

xx

12200

12201

12202

122030020

13000

13001

1300

20

00

00

13

New data

segmentxx

xx

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