final chapter packet-switching and circuit switching
DESCRIPTION
Final Chapter Packet-Switching and Circuit Switching. 7.3. Statistical Multiplexing and Packet Switching: Datagrams and Virtual Circuits 4. 4 Time Division Multiplexing and Circuit Switching. Multiplexing concentrates bursty traffic onto a shared line - PowerPoint PPT PresentationTRANSCRIPT
Final Chapter Packet-Switching and
Circuit Switching
7.3. Statistical Multiplexing and Packet Switching:
Datagrams and Virtual Circuits
4. 4 Time Division Multiplexing and Circuit Switching
Buffer
A
B
C
Input lines
Output line
Header Data payload
5.7.1 Statistical Multiplexing
Multiplexing concentrates bursty traffic onto a shared line information flow should include source address and destination
address Greater efficiency and lower cost
3
Statistical Multiplexing involves the sharing of transmission channels (resource) by several connections A, B, ···, Z or information flows which will be transmitted (served) on demand (statistically). Thus Significant economies of scale can be achieved
Ports A, B, ···, Z in the multiplexer should provide sufficient number of buffers; information packets will be stored and forward, thus cause delay
The shared channel would be E-carrier (T-carrier) or SDH (SONET)
Statistical Multiplexing -Asynchronous Time Division Multiplexing
B2
Z2
A2
B1
Z1
A1
MUX DeMUX
Shared Channel
Statistical Multiplexing
1
2
N
1
2
N
Multiplexer/Demultiplexer inherent in Packet Switches
Packets/frames forwarded to buffer prior to transmission from switch Multiplexing occurs in these buffers
Multiplexer
DeMultiplexer
Buffer
Output line
Input lines
A
B
C
Multiplexer Modeling
Arrivals: What is the packet interarrival pattern? Service Time: How long are the packets? Service Discipline: What is order of transmission? Buffer Discipline: If buffer is full, which packet is dropped?
Performance Measures: Delay Distribution; Packet Loss Probability; Line Utilization
Chapter 7Packet-Switching
Networks
7.3 Datagrams and Virtual Circuits
The Packet Switching Function Store and then forward packet by switching it to an appropriate output port according to a routing
table. Notice that the routing table could be updated dynamically, depending on the traffic condition
Dynamic interconnection of input ports to output ports Enables dynamic sharing of transmission resource Two fundamental approaches:
Connectionless Connection-Oriented: Call setup control, Connection control, Connection release
Backbone Network
Access Network
Switch
Packetswitch
Network
Transmissionline
User
Packet Switching Network
Packet switching network Transfers packets between
users Transmission lines + packet
switches (routers) Origin in message switching
Two modes of operation: Connectionless Virtual Circuit
Packet Switching - Datagram
Messages are broken into smaller units (packets)
Source & destination addresses included in the packet header
Datagram: Connectionless, where packets are routed independently, no dedicated path for the data transfer phase
Packets may arrive out of order Pipelining of packets across
network can induce out of order, but increase system throughput
Packet 2
Packet 1
Packet 1
Packet 2
Packet 2
Destination
address
Output
port
1345 12
2458
70785
6
12
1566
Routing Tables in Datagram Networks
Route determined by table lookup
Routing decision involves finding the next hop in the route to the given destination
Routing table has an entry for each destination specifying output port that leads to the next hop
Size of table becomes impractical for very large number of destinations
Example: Internet Routing
Internet protocol uses datagram packet switching across networks Networks are treated as data links
Hosts have two-port IP address: Network address + Host address
Routers do table lookup on network address This reduces size of routing table
In addition, network addresses are assigned so that they can also be aggregated Discussed as §8.2.5 Classless Interdomain Routing (CIDR) in
Chapter 8
Packet Switching – Virtual Circuit
Call set-up phase establishes a fixed path along network before the data transfer phase
All packets for the connection follow the same path Abbreviated header identifies connection on each link Packets queue for transmission Variable bit rates possible, negotiated during call set-up Delays are still variable, but will not be less than circuit switching
Virtual circuit
Packet Packet
Packet
Packet
SW 1
SW 2
SW n
Connect request
Connect request
Connect request
Connect confirm
Connect confirm
Connect confirm
…
Connection Setup
Signaling messages propagate as route is selected Signaling messages identify connection and setup tables in
switches Typically a connection is identified by a local tag, Virtual Circuit
Identifier (VCI) Each switch only needs to know how to relate an incoming tag in
one input to an outgoing tag in the corresponding output Once tables are setup, packets can flow along the path
t
t
t
t
31 2
31 2
321
Release
Connect request
CR
CR Connect confirm
CC
CC
Connection Setup Delay
Connection setup delay is incurred before any packet can be transferred
Delay is acceptable for sustained transfer of large number of packets
This delay may be unacceptably high if only a few packets are being transferred
InputVCI
Outputport
OutputVCI
15 15
58
13
13
7
27
12 44
23
16
34
Virtual Circuit Forwarding Tables
Each input port of packet switch has a forwarding table
Lookup entry for VCI of incoming packet
Determine output port (next hop) and insert VCI for next link
Very high speeds are possible Table can also include priority
or other information about how packet should be treated
31 2
31 2
321
Minimum delay = 3 + T t
t
t
tSource
Destination
Switch 1
Switch 2
Cut-Through switching
Some networks perform error checking on header only, so packet can be forwarded as soon as the header is received & processed
Delays reduced further with cut-through switching
Chapter 7Packet-Switching
Networks
Datagrams and Virtual Circuits
Structure of a Packet Switch
Packet Switch: Intersection where Traffic Flows Meet
1
2
N
1
2
N
• •
••
• •
Input ports contain multiplexed flows from access muxs & other packet switches
Flows are demultiplexed at input ports, routed and/or forwarded to output ports
Packets buffered, prioritized, and multiplexed on output ports
• • •
Controller
1
2
3
N
Line card
Line card
Line card
Line card
Inte
rcon
nect
ion
fabr
icLine card
Line card
Line card
Line card
1
2
3
N
Input ports Output ports
Data path Control path (a)
…………Generic Packet Switch
“Unfolded” View of Switch Ingress Line Card (input port)
Header processing Demultiplexing Routing in large switches
Controller Routing in small switches Signalling & resource allocation
Interconnection Fabric Transfer packets between line
cards Egress Line Card (output port)
Scheduling & priority Multiplexing
Inte
rcon
nect
ion
fabr
ic
Transceiver
Transceiver
Framer
Framer
Networkprocessor
Backplanetransceivers
Tophysical
ports
Toswitchfabric
Tootherline
cards
Line Cards
Folded View 1 circuit board is ingress/egress line card Physical layer processing Data link layer processing Network header processing Physical layer across fabric + framing
1
2
3
N
1
2
3
N
…
SharedMemory
QueueControl
Ingress Processing
ConnectionControl
…
Shared Memory Packet Switch
Output Buffering
Small switches can be built by reading/writing into shared memory
1
2
3
N
1 2 3 N
Inputs
Outputs
(a) Input buffering
38
3…
…
1
2
3
N
1 2 3 N
Inputs
Outputs
(b) Output buffering
…
…
Crossbar Switches
Large switches built from crossbar & multistage space switches Requires centralized controller/scheduler (who sends to whom when) Can buffer at input, output, or both (performance vs complexity)
0
1
2
Inputs Outputs
3
4
5
6
7
0
1
2
3
4
5
6
7
Stage 1 Stage 2 Stage 3
Self-Routing Switches
Self-routing switches do not require controller Output port number determines route 101 → (1) lower port, (2) upper port, (3) lower port
24
(a) Each signal transmits 1 unit every 3T seconds
(b) Combined signal transmits 1 unit every T seconds
Time-Division Multiplexing
tA1 A2
3T0T
6T
…
tB1 B2
3T0T
6T
…
tC1 C2
3T0T
6T
…
B1 C1 A2 C2B2A1 t0T 1T 2T 3T 4T 5T 6T
…
High-speed digital channel like E-carrier and SDH, where the channel is divided into fixed number of time slots and dedicated to some ports
Framing required Telephone digital
transmission Digital
transmission in backbone network
25
User 1
SwitchLink
User n
User n – 1
Control
123
N
123
N
Connection
of inputs
to outputs… …
Circuit Switches
Circuits consist of dedicated resources in sequence of links & switches across network for data transfer phase
Circuit switch connects input links to output links
Network Switch
26
N
1 2
1
N
2
N –1
…
…
Crossbar Space Switch
N x N array of crosspoints
Connect an input to an output by closing a crosspoint
Nonblocking (internal blocking) : Any input can connect to idle output
Complexity: N2
crosspoints
27
nk
nk
nk
nk
N/n N/n
N/n N/n
N/n N/n
kn1
2
N/n
N
inputs
1
2
3 3
N/n
N
outputs
1
2
k
2(N/n)nk + k (N/n)2 crosspoints
kn
kn
kn
… … …
Multistage Space Switch Large switch is built with multiple stages The n inputs to a first-stage switch share k paths through intermediate
crossbar switches Larger k (more intermediate switches) means more paths to output
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謝 謝 合 作