final ivrs details

7/31/2019 Final Ivrs Details

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Chapter 1

INTRODUCTION

Background

Before giving any explanation of INTERACTIVE VOICE RESPONSE

SYSTEM this project mainly depends on the embedded system and microcontroller.

1.1 Basics of embedded system:

An embedded system is a special-purpose system in which the computer is

completely encapsulated by or dedicated to the device or system it controls. Unlike a general-

purpose computer, such as a personal computer, an embedded system performs one or a few

predefined tasks, usually with very specific requirements. Since the system is dedicated to

specific tasks, design engineers can optimize it, reducing the size and cost of the product.

Embedded systems are often mass-produced, benefiting from economies of scale.

Personal digital assistants (PDAs) or handheld computers are generally considered

embedded devices because of the nature of their hardware design, even though they are more

Examples of Embedded Systems:

Avionics, such as inertial guidance systems, flight control hardware/software and other

integrated systems in aircraft and missiles

Cellular telephones and telephone switches

Engine controllers and antilock brake controllers for automobiles

Home automation products, such as thermostats, air conditioners, sprinklers, and security

monitoring systems Handheld calculators

IVRS documentation1

Figure 1 embedded system


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Handheld computers

Household appliances, including microwave ovens, washing machines, television sets,

DVD players and recorders

Medical equipment

Personal digital assistant

Videogame consoles

Computer peripherals such as routers and printers.

Industrial controller for remote machine operation

1.2 Introduction about micro controller:

A Micro controller consists of a powerful CPU tightly coupled with memory,

various I/O interfaces such as serial port, parallel port timer or counter, interrupt controller,

data acquisition interfaces-Analog to Digital converter, Digital to Analog converter, integrated

on to a single silicon chip. If a system is developed with a microprocessor, the designer has to

go for external memory such as RAM, ROM, EPROM and peripherals. But controller is

provided all these facilities on a single chip. Development of a Micro controller reduces PCB

size and cost of design.

One of the major differences between a Microprocessor and a Micro controller is that acontroller often deals with bits not bytes as in the real world application. Intel has intro uced a

family of Micro controllers called the MCS-51.

1.3 Introduction to IVRS

INTERACTIVE VOICE RESPONSE SYSTEM (also known as Computer Telephony

Integration Systems) are gaining wide acceptance in a large number of application areas like

Department of Telecom, airlines / Railway reservation systems, Banks and Various other

organizations. IVR systems provide access to computer databases through normal telephones.

A user can access a remote computer data base by dialing a specified IVR system number and

obtain the required information by dialing the specified digits as informed by the computer.

The desired information can be recorded and stored in the PC using a microphone, which will

be informed to the user on dialing the specified Number.

IVRS documentation2


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1.5 Block diagram

1.6 Block diagram description:

1.6.1 Hardware components:

Power supply

Micro controller

DTMF decoder

Voice processing unit

devices

1.6.2 Power supply:

In this system we are using 5V power supply for microcontroller of Transmitter section

as well as receiver section. We use rectifiers for converting the A.C. into D.C and a step down

transformer to step down the voltage. The full description of the Power supply section is given

in this documentation in the following sections i.e. hardware components.

1.6.3 Microcontroller (89S51):

In this project work the micro-controller is playing a major role. Micro-controllers

were originally used as components in complicated process-control systems. However,

because of their small size and low price, Micro-controllers are now also being used in

regulators for individual control loops. In several areas Micro-controllers are now

outperforming their analog counterparts and are cheaper as well.

IVRS documentation

MICRO

CONTROLLER

Voice

processing

unit

DEVICES

DTMFMobile

phone

Power Supply

4


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The purpose of this project work is to present control theory that is relevant to the

analysis and design of Micro-controller system with an emphasis on basic concept and ideas. It

is assumed that a Microcontroller with reasonable software is available for computations and

simulations so that many tedious details can be left to the Microcontroller. The control system

design is also carried out up to the stage of implementation in the form of controller programs

in assembly language OR in C-Language.

1.6.4 DTMF (DUAL TONE MULTI FREQUENCY):

A DTMF is used to decode the frequency and to give the instructions to

microcontroller.

1.6.5 Devices:

Here devices or Appliances are interfaced with the micro controller .based on the input

instruction the particular appliance is operated.

1.6.6 Voice processing unit:

Voice processing unit is used to give voice instructions, which is done with the help of

voice IC.

IVRS documentation5


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Chapter 2

SCHEMATIC

2.1 Schematic Explanation:

The main aim of this power supply is to convert the 230V AC into 5V DC in order to

give supply for the TTL. This schematic explanation includes the detailed pin connections of

every device with the microcontroller.

This schematic explanation includes the detailed pin connections of every device with

the microcontroller. The pin no 23 and 25 are grounded in such a way that voice record and

play back will be possible. The mobile will be connected to the speaker pins.

Let us see the pin connections of each and every device with the microcontroller in

detail.

2.1.1 Power Supply:

In this process we are using a step down transformer, a bridge rectifier, a smoothing

circuit and the RPS.

At the primary of the transformer we are giving the 230V AC supply. The secondary is

connected to the opposite terminals of the Bridge rectifier as the input. From other set of

opposite terminals we are taking the output to the rectifier.

The bridge rectifier converts the AC coming from the secondary of the transformer into

pulsating DC. The output of this rectifier is further given to the smoother circuit which is

capacitor in our project. The smoothing circuit eliminates the ripples from the pulsating DC andgives the pure DC to the RPS to get a constant output DC voltage. The RPS regulates the

voltage as per our requirement.

2.1.2 Microcontroller:

The microcontroller AT89S51 with Pull up resistors at Port0 and crystal oscillator of

11.0592 MHz crystal in conjunction with couple of capacitors of is placed at 18th & 19th pins of

89S51 to make it work (execute) properly.


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2.1.3 Motor:

The motor is one of the output devices. This is connected to the port P3.6 of the

Microcontroller through the transistor circuitry as shown in the above schematic.

2.1.4 Device:Here the device to be controlled is connected to the port p3.7 of the micro controller by

using relays.

2.1.5 DTMF:

This is nothing but a Dual Tune Multiple Frequency. This receives the signals from the

mobile and sends it to the microcontroller.

2.1.6 Voice decoder:

This device will receive the signal of human voice through mike. It is having 28 pins on

its IC. It consists of 8 message lines (or channels) to which we can give a voice message and it

can operate in any one of two modes (recording and playback).

The supply pins are connected to power supply circuit. Analog (AGND) and digital

ground (DGND) pins of voice decoder IC are connected to VSS of power supply. Analog

power supply


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2.2 Schematic Diagram

Figure 2 schematic diagram


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2.3 PROJECT IMPLEMENTATION

Ivrs idea is taken from Computer Telephony Integration Systems. Ivrs mainly consists of

five blocks. First block is power supply, it is constant 5 volts dc power supply taking input

from 230 volts AC. It is converted 5 volts Dc by using a step down transformer, a bridge

rectifier, a smoothing circuit and the RPS. 5 volts DC is connected VCC ( pin 40 of

microcontroller ).

2.3.1 INTERFACINGS OF DTMF

User mobile phone generates different frequency when we dial the numbers. These

frequencies are transmitted to mobile phone which is connected kit which is already in auto

answer mode. It is interfaced with help of headset connected to the input pins (pin 1&2.

Figure 3 INTERFACING OF DTMF TO MOBILE

Figure 4 DIAL TONE FREQUENCY STANDARD

MOBILE PHONE DTMF

2

1


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For example to activate ivrs we have to dial 0. After dialling 0 a dual tone frequency

[1336+941] is sent. Functionality of dtmf is to decode dual tone frequency to digital data.

Figure 5 INTERFACING OF DTMF WITH MICROCONTROLLER

Digital output is taken from pins (pin 11 to 14) of dtmf which are connected to port

2 (p2.0 to p2.3) of microcontroller.

Functionality of DTMF block it is an IC DTMF8870 which converts dual tone frequency given

by mobile phone to digital information. It is connected in single ended input configuration. In a

single-ended configuration, the input pins are connected as shown in the Single - Ended Input

with the op-amp connected for unity gain and VREF biasing the input at 1/2VDD. The

Differential Input Configuration in FIGURE below permits gain adjustment with the feedback

resistor R5. We have steering circuit connected to st/et and est pin to select minimum time

period of a valid signal. We have grounded pin 5& 6 because we are not using extra keys and

power down mode. Why I have selected DTMF8870 because it most commonly used and

successful worldwide.

DTMF

2.

2 MICRO

CONTROLLER

2.0

2.

1

2.

3

12

13

14

111


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Table 1 M8870 PIN FUNCTION


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Figure 7 TIMING DIAGRAM OF 8870

Explanation of Events

(A) Tone bursts detected, tone duration invalid, outputs not updated.(B) Tone #n detected, tone duration valid, tone decoded and latched in outputs.

(C) End of tone #n detected, tone absent duration valid, outputs remain latched until next valid

tone.

(D) Outputs switched to high impedance state.

(E) Tone #n + 1 detected, tone duration valid, tone decoded and latched in outputs (currently

high impedance).

(F) Acceptable dropout of tone #n + 1, tone absent duration invalid, outputs remain latched.

(G) End of tone #n + 1 detected, tone absent duration valid, outputs remain latched until next

valid tone.

Explanation of Symbols

VIN DTMF composite input signal.EST Early steering output. Indicates detection of valid tone frequencies.

St/GT Steering input/guard time output. Drives external RC timing circuit.

Q1 - Q4 4-bit decoded tone output.

STD Delayed steering output. Indicates that valid frequencies have been present/absent

for the required guard time, thus constituting a valid signal.

OE Output enable (input). A low level shifts Q1 - Q4 to its high impedance state.

Third block is microcontroller block in this block we are using AT89S51. We have

programmed it embedded c software. A Micro controller consists of a powerful CPU tightly

coupled with memory, various I/O interfaces such as serial port, parallel port timer or counter,

interrupt controller, data acquisition interfaces-Analog to Digital converter, Digital to Analog

converter, integrated on to a single silicon chip.

If a system is developed with a microprocessor, the designer has to go for external

memory such as RAM, ROM, EPROM and peripherals. But controller is provided all these

facilities on a single chip

Functioning of microcontroller, it takes input from DTMF ic in form of parallel bits from

pins (pin 11 to 14) of dtmf which are connected to port 2 (p2.0 to p2.3) of microcontroller and

controls the output devices like voice processing unit and output devices.

For example, to start IVRS system we have to dial 0. That means we are giving DTMF

1010 parallel bits has input to microcontroller. It takes that parallel data and computes the

data with stored instruction. Our given instruction is if input is 1010 then set 1.1 of port1 to

active low which is connected to m1 message (pin 1) of APR9600. Since m1 is given active

low signal it plays recorded voice signal.


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After listening to message signal, we come to know that to on light we have to dial

1.then we have to dial 1 to light that means we are giving an 0001 has input to the

microcontroller .as per given instruction it makes 3.7 active high. Which activate transistor gate

and on light.

Reasons for selecting AT89S51 are it contains watchdog timer circuit internally and

logic high is up to 5.5volts so that it can have protection Microcontroller from deflection in

voltage.

Fourth bock is voice processing block in which we have a voice processing IC

APR9600. This device will receive the signal of human voice through mike. It is having 28

pins on its IC. It consists of 8 message lines (or channels) to which we can give a voice

message and it can operate in any one of two modes (recording and playback).

The supply pins are connected to power supply circuit. Ana log (AGND) and digital

ground (DGND) pins of voice decoder IC are connected to VSS of power supply. Ana log

power supply. Here it is used has simple recorded voice playing circuit. This is capable of

storing 60 seconds voice.

2.3.2INTERFACINGS OF APR9600 VOICE PROCESSING IC

Figure 8 INTERFACING OF APR9600 WITH MICROCONTROLLER

Pin 1 /m1 of APR9600 is connected to port 1.0 of microcontroller.

11

APR9600

MICRO

CONTROLLER

1.

0


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Figure 9 INTERFACING OF APR9600 WITH MOBILE PHONE

Pins (14 & 15) sp+ and sp- are connected to mobile phone voice cable.

Pin 1 /m1 of APR9600 is connected port 1(p1.0) and pins (14 & 15) sp+ and sp- are

connected to mobile phone voice cable. Whenever microcontroller applies input logic high

to /m1 pin them ic will play the recorded voice signal. APR9600 is selected our requirement is

only 60 seconds voice recording only so we are using this particular IC. refer to figure 18 for

pin diagram.

Table 2 PIN FUNCTION OF APR9600

It operates in different modes they are

APR9600

MOBILE PHONE

14

15


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Table 3 MODES OF APR9600

MSEL1 MSEL2 -M8 Function Keys Functions

0 0 0 or 1 -M1, -M2 to select 1st

and 2nd sound tracks.

CE to stop

Parallel mode, 2 sections,

30 seconds for each

1 0 0 or 1 -M1 to M4 to select a

sound track, CE to stop


15 seconds for each

1 1 1 -M1 to M8 to select a

sound

track, CE to stop


7.5 seconds for each

1 1 1 -M1 to M8 to select a

sound

track, CE to stop

Pressing and hold down a

key from M1 to M8 to

play the selected soundtrack repeatedly

0 0 1 -M1 and CE Serial mode, allow up to

256 sound tracks to be

recorded and played.

Sound tracks are played

from

1st to N in order after

M1 is toggled. Press CE

to

play from the 1 st sound

track.

0 0 0 -M1,-M2 and CE Serial mode, Press M1

to replay one sound track.

Toggle M2 once to

move to the next sound

track.

Press CE to play sound

from the 1 st sound track

Here we are using serial mode of operation because here we will play single

voice. So we have selected last mode of operation. Selecting of 7th pin resistance depends on

time period of the signal.


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Table 4 OSCR RESISTACES AND ITS SAMPLING FREQ.

Here we are using 40 seconds of voice message so we have selected 38k resistance

Replay sound tracks with forward control

Now make RE=1 (switched to Left-hand side of the mode selection switch) while keep other

Switches at the same location. Toggle M1 (press key and release) causes the 1st sound track to

be played once. Toggle M1 again and again will still play the 1st sound track. Once M2 is

toggled, the sound track counter is incremented and the next sound can be played. Press CE to

reset the sound track counter to zero.

Fifth block is output devices. In my project I am using two devices, one is dc fan which is

connected port 3.6 (pin 16) and another 230 volts Ac bulb which is connected to port 3.7.

2.3.3 INTERFACING OF OUTPUT DEVICES

Figure 10 INTERFACING OF OUTPUT DEVICES

INTERFACING OF DC MOTOR

It is connected to port 3.6 which is bit wise opera table. When microcontroller makes 3.6 pin

high logic level voltage. This is connected to base of transistor. Transistor acts as short circuit

which forms a closed loop. So voltage is applied to dc motor.

3.6

3.7

DC MOTER

MICRO

CONTROLLER

LIGHT


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Figure 11 INTERFACING OF DC MOTOR

INTERFACING OF LIGHT

It is connected to port 3.7 which is bit opera table .here port 3.7 is connected to relay by which

it is on and off operation is performed.

Figure 12 INTERFACING OF LIGHT


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FLOW CHART OF PROGRAM TO ON AND OFF LIGHT

Figure 13 FLOW CHART OF PROGRAM

SOURCE CODE

Start

If 0

dialled

0

Dial 0 to

activate IVRS

Play the voice

message Dial 1 to

on light, dial 2 light

to off light.

While

(0)

On

light

1 is

dialed

2 is dialled

Off the light

if

Play the voice

message Dial 1 to

on light, dial 2 light

to off light.


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//adding the header files

#include

//declaring the DTMF connections

sbit d0 = P2^0;sbit d1 = P2^1;

sbit d2 = P2^2;

sbit d3 = P2^3;

sbit clk = P2^4;

//declaring the outputs

sbit relay = P3^7;

sbit motor = P3^6;

//declaring the voice connections

sbit msg = P1^0;

//starting the main program

void main()

{

while(1)

{

{

if(d3 == 1 && d2 == 0 && d1 == 1 && d0 == 0)

{

msg = 0;

while(1)

{

while(clk)

{

if(d3 == 0 && d2 == 0 && d1 == 0 && d0 == 1)

{

relay = 1;

}

if(d3 == 0 && d2 == 0 && d1 == 1 && d0 == 0)

{

relay = 0;

}

if(d3 == 0 && d2 == 0 && d1 == 1 && d0 == 1)

{


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motor = 1;

}

if(d3 == 0 && d2 == 1 && d1 == 0 && d0 == 0)

{motor = 0;

}

if(d3 == 1 && d2 == 0 && d1 == 1 && d0 == 0)

msg = 0;

}

}

}

}

END OF CHAPTER 2


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Chapter 3

HARDWARE COMPONENTS

3.1 HARDWARE DESIGN

3.1.1 Introduction

In this chapter we are going to cover all parts of Interactive Voice Response System

(IVRS) in detailed manner and their functions in brief. Here we are more interested about the

Microcontroller since it is the heart of the project. So the complete architecture is explained and

also significance of the Microcontroller.

Hardware components:

1. power supply

2. Micro controller

3. DTMF decode

4. Voice IC

5. Devices

3.1.2 MICRO CONTROLLER (AT89S51)

3.1.2.1 Introduction

A Micro controller consists of a powerful CPU tightly coupled with memory, various

I/O interfaces such as serial port, parallel port timer or counter, interrupt controller, data

acquisition interfaces-Analog to Digital converter, Digital to Analog converter, integrated on to

a single silicon chip.

If a system is developed with a microprocessor, the designer has to go for external

memory such as RAM, ROM, EPROM and peripherals. But controller is provided all these

facilities on a single chip. Development of a Micro controller reduces PCB size and cost of

design.

One of the major differences between a Microprocessor and a Micro controller is that a

controller often deals with bits not bytes as in the real world application.

Intel has introduced a family of Micro controllers called the MCS-51.


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Figure 14 micro controller

3.1.2.2 Features:

Compatible with MCS-51 Products

4K Bytes of In-System Programmable (ISP) Flash Memory

Endurance: 1000 Write/Erase Cycles

4.0V to 5.5V Operating Range

Fully Static Operation: 0 Hz to 33 MHz

Three-level Program Memory Lock

128 x 8-bit Internal RAM

32 Programmable I/O Lines

Two 16-bit Timer/Counters

Six Interrupt Sources

Full Duplex UART Serial Channel

Low-power Idle and Power-down Modes

3.1.2.3 Description

The AT89S51 is a low-power, high-performance CMOS 8-bit microcontroller with 4K bytes of in-

system programmable Flash memory. The device is manufactured using Atmels high-density

nonvolatile memory technology and is compatible with the industry- standard 80C51 instruction set

and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a

conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-system


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programmable Flash on a monolithic chip, the Atmel AT89S51 is a powerful microcontroller which

provides a highly-flexible and cost-effective solution to many embedded control applications.

Block diagram:

Figure 15 block diagram of micro controller


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Pin diagram:

Figure 16pin diagram of micro controller

3.1.2.4 Pin Description

VCC - Supply voltage.

GND - Ground.

Port 0:

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight

TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0

can also be configured to be the multiplexed low-order address/data bus during accesses to external

program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes

during Flash programming and outputs the code bytes during program verification. External pull-

ups are required during program verification.

Port 1:

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can

sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal

pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will


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source current (IIL) because of the internal pull-ups. Port 1 also receives the low-order address bytes

during Flash programming and verification.

Table 5 PORT 1

Port 2:



pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will

source current (IIL) because of the internal pull-ups. Port 2 also receives the high-order address bits

and some control signals during Flash programming and verification.

Port 3:



pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low willsource current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash

programming and verification. Port 3 also serves the functions of various special features of the

AT89S51, as shown in the following table.


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Table 6 PORT3

RST:

Reset input. A high on this pin for two machine cycles while the oscillator is running resets

the device. This pin drives High for 98 oscillator periods after the Watchdog times out. The DISRTO

bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bitDISRTO, the RESET HIGH out feature is enabled.

ALE/PROG:

Address Latch Enable (ALE) is an output pulse for latching the low byte of the address

during accesses to external memory. This pin is also the program pulse input (PROG) during Flash

programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency

and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is

skipped during each access to external data memory. If desired, ALE operation can be disabled by

setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC

instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the

microcontroller is in external execution mode.


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PSEN:

Program Store Enable (PSEN) is the read strobe to external program memory. When the

AT89S51 is executing code from external program memory, PSEN is activated twice each machine

cycle, except that two PSEN activations are skipped during each access to external data memory.

EA/VPP:

External Access Enable. EA must be strapped to GND in order to enable the device to fetch

code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if

lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for

internal program executions. This pin also receives the 12-volt programming enable voltage (VPP)

during Flash programming.

XTAL1:

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2:

Output from the inverting oscillator amplifier.

Oscillator Characteristics:

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier

which can be configured for use as an on-chip oscillator, as shown in Figs 6.2.3. Either a quartz

crystal or ceramic resonator may be used. To drive the device from an external clock source,

XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 6.2.4.There are

no requirements on the duty cycle of the external clock signal, since the input to the internal

clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage

high and low time specifications must be observed.

3.1.3 DTMF (DUAL TONE MULTI FREQUENCY)

The M-8870 is a full DTMF Receiver that integrates both band split filter and decoder

functions into a single 18-pin DIP or SOIC package. Manufactured using CMOS process

technology, the M-8870 offers low power consumption (35 mW max) and precise data

handling. Its filter section uses switched capacitor technology for both the high and low group

filters and for dial tone rejection. Its decoder uses digital counting techniques to detect and

decode all 16 DTMF tone pairs into a 4-bit code. External component count is minimized by


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provision of an on-chip differential input amplifier, clock generator, and latched tri-state

interface bus. Minimal external components required include a low-cost 3.579545 MHz color

burst crystal, a timing resistor, and a timing capacitor.

The -8870 provides a power-down option which, when enabled, drops consumption

to less than 0.5 mW. The M-8870-02 can also inhibit the decoding of fourth column digits

3.1.3.1 Features

Low Power Consumption

Adjustable Acquisition and Release Times

Central Office Quality and Performance

Power-down and Inhibit Modes (-02 only)

Inexpensive 3.58 MHz Time Base

Single 5 Volt Power Supply

Dial Tone Suppression

Pin diagram:

Figure 17 pin diagram of m8870


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BLOCK DIAGRAM:

Figure 18 functional block diagram of m8870

3.1.3.2 Functional Description

M-8870 operating functions include a band split filter that separates the high and lowtones of the received pair, and a digital decoder that verifies both the frequency and duration of

the received tones before passing the resulting 4-bit code to the output bus.

Filter

The low and high group tones are separated by applying the dual-tone signal to the

inputs of two 6th order switched capacitor band pass filters with bandwidths that correspond to

the bands enclosing the low and high group tones. The filter also incorporates notches at 350

and 440 Hz, providing excellent dial tone rejection. Each filter output is followed by a single-

order switched capacitor section that smoothes the signals prior to limiting. Signal limiting is

performed by high gain comparators provided with hysteresis to prevent detection of unwanted

low-level signals and noise. The comparator outputs provide full-rail logic swings at the

frequencies of the incoming tones.

Decoder


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The M-8870 decoder uses a digital counting technique to determine the frequencies of

the limited tones and to verify that they correspond to standard DTMF frequencies. A complex

averaging algorithm is used to protect against tone simulation by extraneous signals (such as

voice) while tolerating small frequency variations. The algorithm ensures an optimum

combination of immunity to talkoff and tolerance to interfering signals (third tones) and noise.

When the detector recognizes the simultaneous presence of two valid tones (known as signal

condition), it raises the Early Steering flag (ESt). Any subsequent loss of signal condition will

cause ESt to fall.

Steering Circuit

Before a decoded tone pair is registered, the receiver checks for a valid signal duration

(referred to as character- recognition-condition). This check is performed by an external RC

time constant driven by ESt. A logic high on ESt causes VC to rise as the capacitor discharges.

Provided that signal condition is maintained (ESt remains high) for the validation period

(tGTF), VC reaches the threshold (VTSt) of the steering logic to register the tone pair, thus

latching its corresponding 4-bit code into the output latch. At this point, the GT output is

activated and drives VC to VDD.

GT continues to drive high as long as ESt remains high. Finally, after a short delay to allow theoutput latch to settle, the delayed steering output flag (StD) goes high, signaling that a received

tone pair has been registered. The contents of the output latch are made available on the 4-bit

output bus by raising the threestate control input (OE) to a logic high. The steering circuit

works in reverse to validate the interdigit pause between signals. Thus, as well as rejecting

signals too short to be considered valid, the receiver will tolerate signal interruptions (dropouts)

too short to be considered a valid pause. This capability, together with the ability to select the

steering time constants externally, allows the designer to tailor performance to meet a wide

variety of system requirements.


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Figure 19 basic steering circuit

Figure 20 single ended input configuration

Input Configuration

The input arrangement of the M-8870 provides a differential input operational amplifier as well

as a bias source (VREF) to bias the inputs at mid-rail. Provision is made for connection of a

feedback resistor to the op-amp output (GS) for gain adjustment. In a single-ended

configuration, the input pins are connected as shown in the Single - Ended Input with the op-

amp connected for unity gain and VREF biasing the input at 1/2VDD. The Differential Input

Configuration bellow permits gain adjustment with the feedback resistor R5.


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3.1.3.3 DTMF Clock Circuit

The internal clock circuit is completed with the addition of a standard 3.579545 MHz television

color burst crystal. The crystal can be connected to a single M-8870 as or to a series of M-

8870s. As illustrated in the Common Crystal Connection below, a single crystal can be used to

connect a series of M-8870s by coupling the oscillator output of each M-8870 through a 30pF

capacitor to the oscillator input of the next M-8870.

Explanation of Symbols

VIN DTMF composite input signal.

ESt Early steering output. Indicates detection of valid tone frequencies.

St/GT Steering input/guard time output. Drives external RC timing

circuit.

Q1 - Q4 4-bit decoded tone output.

StD Delayed steering output. Indicates that valid frequencies have been

present/ absent for the required guardtime, thus constituting a valid

signal.

OE Output enable (input). A low level shifts Q1 - Q4 to its high

Impedance state.

tREC Maximum DTMF signal duration not detected as valid.

tREC Minimum DTMF signal duration required for valid recognition.

tID Minimum time between valid DTMF signals.

tDO Maximum allowable dropout during valid DTMF signal.

tDP Time to detect the presence of valid DTMF signals.


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tDA Time to detect the absence of valid DTMF signals.

TGTP Guard time, tone present.

TGTA Guard time, tone absent.

3.1.4 REGULATED POWER SUPPLYThe power supplies are designed to convert high voltage AC mains electricity to a

suitable low voltage supply for electronics circuits and other devices. A RPS (Regulated

Power Supply) is the Power Supply with Rectification, Filtering and Regulation being done on

the AC mains to get a Regulated power supply for Microcontroller and for the other devices

being interfaced to it.

3.1.5 APR 9600 RE-Recording Voice IC

1 Single-chip Voice Recording & Playback Device60- Second Duration

3.1.5.1 Features:

Single-chip, high-quality voice recording & playback solution

- No external ICs required

- Minimum external components

Non-volatile Flash memory technology

- No battery backup required

User-Selectable messaging options

- Random access of multiple fixed-duration messages

- Sequential access of multiple variable-duration messages

User-friendly, easy-to-use operation

- Programming & development systems not required

- Level-activated recording & edge-activated play back switches

Low power consumption

- Operating current: 25 mA typical

- Standby current: 1 uA typical


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- Automatic power-down

Chip Enable pin for simple message expansion

3.1.5.2 General Descriptions:

The APR9600 device offers true single-chip voice recording, non-volatile storage, and

playback capability for 40 to 60 seconds. The device supports both random and sequential

access of multiple messages. Sample rates are user- selectable, allowing designers to customize

their design for unique quality and storage time needs. Integrated output amplifier, microphone

amplifier, and AGC circuits greatly simplify system design. the device is ideal for use in

portable voice recorders, toys, and many other consumer and industrial applications.

APLUS integrated achieves these high levels of storage capability by using its

proprietary analog/multilevel storage technology implemented in an advanced Flash non-

volatile memory process, where each memory cell can store 256 voltage levels. This

technology enables the APR9600 device to reproduce voice signals in their natural form. It

eliminates the need for encoding and compression, which often introduce distortion.

Figure 18 ps: the APR9600 DIP&SOP


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3.1.5.3 Functional Description:

APR9600 block diagram is included in order to describe the device's internal architecture. At

the left hand side of the diagram are the analog inputs. A differential microphone amplifier,

including integrated AGC, is included on-chip for applications requiring use. The amplified

microphone signals fed into the device by connecting the ANA_OUT pin to the ANA_IN pin

through an external DC blocking capacitor. Recording can be fed directly into the ANA_IN pin

through a DC blocking capacitor, however, the connection between ANA_IN andANA OUT is

still required for playback. The next block encountered by the input signal is the internal anti-

aliasing filter. The filter automatically adjusts its response According to the sampling frequency

selected so Shannons Sampling Theorem is satisfied. After anti-aliasing filtering is

accomplished the signal is ready to be clocked into the memory array. This storage is

accomplished through a combination of the Sample and Hold circuit and the Analog

Write/Read circuit. Either the Internal Oscillator or an external clock source clocks these

circuits. When playback is desired the previously stored recording is retrieved from memory,

low pass filtered, and amplified as shown on the right hand side of the diagram. The signal can

be heard by connecting a speaker to the SP+ and SP- pins. Chip-wide management is

accomplished through the device control block shown in the upper right hand corner. Message

management is provided through the message control block represented in the lower center of

the block diagram. More detail on actual device application can be found in the Sample

Application section. More detail on sampling control can be found in the Sample Rate and

Voice Quality section. More detail on Message management and device control can be found in

the Message Management section.


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Figure 21 APR9600 BLOCK DIAGRAM

3.1.6 DC Motor

DC motors are configured in many types and sizes, including brush less, servo, and gear

motor types. A motor consists of a rotor and a permanent magnetic field stator. The magnetic

field is maintained using either permanent magnets or electromagnetic windings. DC motors

are most commonly used in variable speed and torque.

Motion and controls cover a wide range of components that in some way are used to

generate and/or control motion. Areas within this category include bearings and bushings,

clutches and brakes, controls and drives, drive components, encoders and resolves, Integrated

motion control, limit switches, linear actuators, linear and rotary motion components, linear

position sensing, motors (both AC and DC motors), orientation position sensing, pneumatics

and pneumatic components, positioning stages, slides and guides, power transmission

(mechanical), seals, slip rings, solenoids, springs.

Motors are the devices that provide the actual speed and torque in a drive system. This

family includes AC motor types (single and multiphase motors, universal, servo motors,


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induction, synchronous, and gear motor) and DC motors (brush less, servo motor, and gear

motor) as well as linear, stepper and air motors, and motor contactors and starters.

In any electric motor, operation is based on simple electromagnetism. A current-

carrying conductor generates a magnetic field; when this is then placed in an external magnetic

field, it will experience a force proportional to the current in the conductor, and to the strength

of the external magnetic field. As you are well aware of from playing with magnets as a kid,

opposite (North and South) polarities attract, while like polarities (North and North, South and

South) repel. The internal configuration of a DC motor is designed to harness the magnetic

interaction between a current-carrying conductor and an external magnetic field to generate

rotational motion.

Let's start by looking at a simple 2-pole DC electric motor (here red represents a magnet

or winding with a "North" polarization, while green represents a magnet or winding with a

"South" polarization).

Figure 22 Block Diagram of the DC motor


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3.1.7 RELAY

Figure 23 RELAY

Equivalent to Good Sky Part# RW-SH-112D

Details:

These SPDT relays covers switching capacity of 10A in spite of miniature size for PCB

Mount.

Contact Rating

12A at 120VAC

10A at 120VAC

10A at 24VDC

Coil Resistance

400ohm 12VDC

Life expectancy

Mechanical 10,000,000 operations at no load

Electrical 100,000 at rated resistive load

Applications:

Domestic Appliances

Office Machines Audio Equipment


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3.2 SOFTWARE COMPONENTS

3.2.1 ABOUT SOFTWARE

Software used is:

*Keil software for C programming

*Express PCB for lay out design

*Express SCH for schematic design

3.2.2 KEIL Vision3

What's New in Vision3?

Vision3 adds many new features to the Editor like Text Templates, Quick Function

Navigation, and Syntax Coloring with brace high lighting Configuration Wizard for dialog

based startup and debugger setup. Vision3 is fully compatible to Vision2 and can be used in

parallel with Vision2.

3.3.3 What is Vision3?

Vision3 is an IDE (Integrated Development Environment) that helps you write,compile, and debug embedded programs. It encapsulates the following components:

A project manager.

A make facility.

Tool configuration.

Editor.

A powerful debugger.

3.3.4 Express PCB

Express PCB is a Circuit Design Software and PCB manufacturing service. One can

learn almost everything you need to know about Express PCB from the help topics included

with the programs given.

Details:

Express PCB, Version 5.6.0


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3.3.4 Express SCH

The Express SCH schematic design program is very easy to use. This software enables

the user to draw the Schematics with drag and drop options .

A Quick Start Guide is provided by which the user can learn how to use it.

Details:

Express SCH, Version 5.6.0

3.3.5 EMBEDDED C:

The programming Language used here in this project is an Embedded C Language.

This Embedded C Language is different from the generic C language in few things like

a) Data types

b) Access over the architecture addresses.

The Embedded C Programming Language forms the user friendly language with access

over Port addresses, SFR Register addresses etc.

Embedded C Data types:

Table 7 EMBEDDED C DATA TYPE

Data Types Size in Bits Data Range/Usage

unsigned char 8-bit 0-255

signed char 8-bit -128 to +127

unsigned int 16-bit 0 to 65535

signed int 16-bit -32,768 to +32,767

sbit 1-bit SFR bit addressable only

bit 1-bit RAM bit addressable only

sfr 8-bit RAM addresses 80-FFH only


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Signed char:

o Used to represent the or + values.

o As a result, we have only 7 bits for the magnitude of the signed number, giving us

values from -128 to +127.

3.3 CIRCUIT DESCRIPTION:

This project is basically aimed to build a system in which the controlling of industrial

appliances is done based on IVRS. This system consists of DTMF decoder, voice IC, micro

controller, and appliances.

Whenever user wants to control the industrial appliances, he needs to call the mobilewhich is already interfaced with DTMF decoder and voice IC. Here user keeps the mobile in

auto-answer mode, which automatically lifts the call and user is able to listen voice instructions

also. Based on key selection the particular appliance is going to made ON/OFF.

DTMF decoder is used to decode the frequencies from the mobile and voice IC is used

to store the voice instructions. Micro controller plays major role in directing the data to

respective appliances.

Chapter 4

FINAL DESCRIPTION


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4.1 CONCLUSION

The project Interactive Voice Response System (IVRS) has been successfully

designed and tested. Integrating features of all the hardware components used have developed

it. Presence of every module has been reasoned out and placed carefully thus contributing to the

best working of the unit.

Secondly, using highly advanced ICs and with the help of growing technology the

project has been successfully implemented.

4.2 FUTURE ASPECTS

In this project, there is a voice processing unit in which we can record and playback the

voice for a minimum duration of 60 seconds only. So we can replace this unit with more voice

storage device so that we can utilize for a wide range of applications in industries, colleges etc.

Just like controlling the devices in a industry and as well as marks announcement in colleges

etc.

4.3 BIBLIOGRAPHY

4.3.1 NAME OF THE SITES

1. WWW.MITEL.DATABOOK.COM

2. WWW.ATMEL.DATABOOK.COM

3. WWW.FRANKLIN.COM

4. WWW.KEIL.COM

5. www.teltone.com

4.3.2 REFERENCES

1. 8051-MICROCONTROLLER AND EMBEDDED SYSTEM.

Mohd. Mazidi.
http://www.mitel.databook.com/http://www.atmel.databook.com/http://www.franklin.com/http://www.keil.com/http://www.mitel.databook.com/http://www.atmel.databook.com/http://www.franklin.com/http://www.keil.com/


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final ivrs details

Documents