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Seminar Report 2010 - 2011 Graphene Transistor

INTRODUCTION

Transistors are vital components in electronic circuitry. High speed

processors emerging today rely on the high speed switching action of

transistors. Conventional transistors are Silicon based. A graphene transistor is

a nanoscale device based on graphene, a component of graphite with electronic

properties far superior to those of silicon. The device is a single-electron

transistor, which means that a single electron passes through it at any one time.

Scientists have predicted that graphene transistors could scale to transistor

channels as small as two nanometers (nm) with terahertz speeds.

The base of the graphene transistor is graphene .Graphene-based

processors could be a fast, low-power successor to silicon-based processors and

enable advances in microchip technology beyond the capabilities of those

using silicon as their semiconductor material. Electrons can move through

graphene at speeds ten to one thousand times greater than silicon. Furthermore,

unlike silicon, graphene's properties actually improve as the devices become

smaller. That capacity, coupled with the ability to operate at room temperature,

could allow more miniaturization which would, in turn, allow more

components to be placed on an integrated circuit (IC).

Before getting into detail about Graphene Transistors lets see about

Graphene.

Dept. of Electronics Engineering 1 G.P.T.C. Kaduthuruthy

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GRAPHENE

Graphene is a one-atom-thick planar sheet of sp 2 -bonded carbon atoms

that are densely packed in a honeycomb crystal lattice. It can be viewed as an

atomic-scale chicken wire made of carbon atoms and their bonds. The name

comes from GRAPHITE + ENE; graphite itself consists of many graphene

sheets stacked together.

Carbon is one of the most versatile chemical elements. Because it can

form single, double and triple bonds, it forms thousands of chemical

compounds, and has numerous elemental structures, or allotropes. The most

common allotropes of carbon are diamond and graphite. Diamond consists of

carbon atoms single-bonded to four other carbon atoms producing a tetrahedral

crystal lattice. Its structure leads to its extreme hardness and thermal

conductivity, but diamond is a very poor electrical conductor. In contrast,

graphite consists of stacked layers of carbon sheets. Within an individual

carbon sheet, known as graphene, the carbon atoms are sp2 hybridized and

form a planar hexagonal lattice. The sp2 hybridization means that the carbons

are s-bonded in the plane, but are also p-bonded above and below the plane.

Graphene thus possesses one of the strongest bonds in nature and has a very

high tensile strength. Graphene’s perpendicular p-orbitals lead to electron

delocalization because there is no distinction between neighboring p bonds, as

indicated in Figure below.



Fig. Aromatic hydrocarbons like benzene shown here, share electrons in the p-orbitals with many neighboring atoms.

This conjugated p orbital system permits the electrons to travel freely

above and below the plane of carbon atoms with minimal scattering. Because

of the minimal scattering and strong delocalization of the electrons, graphite is

a good conductor along the plane. However, in graphite, electrostatic forces

bind the layers together only very weakly, and graphite is a very soft mineral.

In addition, the other layers interfere with the behavior of the single sheets,

even if not strongly. An ideal system would be to study free single-layer

graphene, but until a few years ago, two-dimensional systems like free

graphene were believed to be impossible.

In recent years, the two most familiar allotropes of carbon have been

joined by a number of newly discovered graphene-like materials. The first

major graphene-related substance discovered was C60, also known as

buckminsterfullerene, buckyball, and fullerene, a soccer-ball-like configuration

of carbon atoms found in common lamp soot and known to be very stable.

Soon, the scientific community encountered similar fullerene-type carbon

structures called a carbon nanotubes. Carbon nanotubes are needle-like tubes of

rolled up graphene sheets that exhibit many unusual and useful properties such

as extreme tensile strength and high conductivity.



DISCOVERY OF GRAPHENE

Graphene, though only recently confirmed experimentally, has been

discussed in conjunction with graphite for many years. Many of its properties

had long been studied in conjunction with the properties of graphite, including

its band structure. For example, graphene was predicted to be a semiconductor

with no band gap at the corners of the reciprocal lattice using the tight-binding

approximation. But theoretical studies of graphene were historically limited

entirely to approximations for the properties of graphite.

Graphene as a free substance was largely ignored as a purely academic

substance because it was accepted that thermodynamic stresses prevented the

existence of any free one- or two dimensional crystals. Additionally, there had

been previous attempts to achieve two dimensional crystals, but in all cases, it

was confirmed that reducing the thickness made the crystals melt at

increasingly low temperatures and it was agreed that two dimensional crystals

were too unstable to exist in a free state. A possible explanation for the

disparity between theory predicting the non-existence of two-dimensional

crystals and their experimental confirmation may be that the graphene

monolayers are only approximately two-dimensional and owe some of their

stability to rippling perpendicular to the plane.

Fig. A representation of the rippling of 2D graphene into 3D. The red arrows are ~800nm long.



But in 2004, graphene was produced experimentally, defying decades of

predictions that it could not exist apart from a crystalline substrate. The

procedure for acquiring the monolayer graphene is comically simple:

essentially, graphene is removed from a graphite sample by using clear

adhesive tape to remove layers from graphite. The tape is then stuck to new

clean tape several times to remove additional layers. After a few times, the tape

is dissolved and the graphite remains are examined to sort the graphene

monolayers from the ultrathin graphite films. The difficulty is in sorting the

graphene from the graphite.

Fortunately, different thicknesses of graphite are distinguishable under

optical microscopy on a special silicon substrate. The adhesive tape technique

produces extremely high quality crystals of up to 100 micrometers in length,

more than sufficient for most laboratory experiments. And even better, the raw

materials are very cheap. But why is there such interest in graphene? Aside

from the obvious interest in the novelty of a two-dimensional crystal, graphene

crystals exhibit unusual electrical properties that may prove useful both

theoretically and practically. In particular, graphene’s charge carriers are very

unusual in that they behave like massless Driac fermions and are most

effectively described by the Dirac equation rather than the non-relativistic

Schrodinger equation:

EN = [2ehc2 B(N+1/2±1/2)]1/2.



GRAPHENE QUANTUM DOTS AS SINGLE ELECTRON

TRANSISTORS

Recent works demonstrates electron transport in quantum dot devices

carved entirely from graphene. At large sizes (>100 nanometers), they behave as

conventional single-electron transistors, exhibiting periodic Coulomb blockade

peaks. For quantum dots smaller than 100 nanometers, the peaks become strongly

nonperiodic, indicating a major contribution of quantum confinement."

Quantum dot carved from a graphene sheet. (Image: Mesoscopic Physics Group, University of Manchester)

Novoselov, The Royal Society Research Fellow, and a member of

the Mesoscopic Physics Group at the University of Manchester, is one of the

original team, led by Professor Andre Geim, that discovered graphene in 2004.

In a recent progress article in Science ("Chaotic Dirac Billiard in Graphene

Quantum Dots") Novoselov and Geim show that graphene can be carved into

tiny electronic circuits with individual transistors having a size not much

larger than that of a molecule.

The University of Manchester group has developed an approach that lets

them reliably fabricate graphene quantum dots with features as small as 10


http://dx.doi.org/doi:10.1126/science.1154663

http://dx.doi.org/doi:10.1126/science.1154663

http://onnes.ph.man.ac.uk/nano/


nanometers. They found three basic operational regimes for these quantum dots,

depending on their size.

Devices larger than 100 nm exhibit nearly periodic Coulomb

blockade resonances. "In general, the behavior we observed is in agreement with

the one exhibited by conventional single-electron transistors (SET)" says

Novoselov. “The all-graphene SETs we fabricated are technologically simple,

reliable, and robust and can operate well above liquid-helium temperatures,

making them attractive candidates for use in various charge-detector schemes."

For devices smaller than 100 nm, the scientists observed a qualitative

change in behavior: Coulomb blockade peaks were no longer a periodic function

of the back-gate voltage but varied strongly in their spacing. "This is a clear

indication that the size quantization becomes an important factor even for such a

modest confinement" says Novoselov.

He notes that for even smaller devices (<30nm), the experimental behavior

is completely dominated by quantum confinement. "However, because even the

state-of-the-art lithography does not allow one to control features <10 nm in size,

the experimental behavior varies widely. Some of the devices become overetched

and stop conducting, but in other cases we have narrowed them down to a few

nanometers so that they exhibit the transistor action even at room temperature."

Unlike any other material, graphene remains mechanically and chemically

stable and highly conductive at the scale of a few benzene rings, which makes it

uniquely suitable for the top-down approach to molecular-scale electronics.

OPERATON AT GHz FREQUENCIES

Top-gated graphene transistors operating at high frequencies (GHz)

have been fabricated. The work represents a significant step towards the

realization of graphene-based electronics for high-frequency applications.

Graphene is a two-dimensional (2D) material with great potential for

electronics with essentially the same lattice structure as an unwrapped carbon

nanotube, graphene shares many of the advantages of nanotubes, such as the


http://en.wikipedia.org/wiki/Coulomb_blockade

http://en.wikipedia.org/wiki/Coulomb_blockade


highest intrinsic carrier mobility at room temperature of any known materials.

This makes these carbon-based electronic materials particularly promising for

high-frequency circuits. However, due to the high impedance of a single carbon

nanotube transistor, high-frequency properties of nanotubes were investigated

indirectly using various mixing techniques and direct ac measurements of these

devices at GHz frequencies were realized only recently enabled by the larger

device current in nanotube arrays. In contrast, one distinct advantage of

graphene lies in its 2D nature, so that the drive current of a graphene device, in

principle, can be easily scaled up by increasing the device channel width. This

width scaling capability of graphene is of great significance for realizing high-

frequency graphene devices with sufficient drive current for large circuits and

associated measurements. Furthermore, the planar graphene allows for the

fabrication of graphene devices and even integrated circuits utilizing well-

established planar processes in the semiconductor industry. Recently, it was

shown that graphene devices can exhibit current gain in the microwave

frequency range .

Despite intense activities on graphene research, the intrinsic high-

frequency transport properties of graphene transistors have not been

systematically studied. This topic presents the first comprehensive

experimental studies on the highfrequency response of top-gated graphene

transistors for different gate voltages and gate lengths. The intrinsic current

gain of the graphene transistors was found to decrease with increasing

frequency and follows the ideal 1/f dependence expected for conventional

FETs. This not only verifies the ac measurement and de-embedding procedures

used here for extracting the intrinsic high frequency properties, but also

suggests a conventional FET-like behavior for grapheme transistors. The cutoff

frequency fT deduced from S parameter measurements exhibits strong gate

voltage dependence and is proportional to the dc transconductance. The peak

cut-off frequency is found to be inversely proportional to the square of the gate



length, and for a gate length of 150 nm, a peak fT as high as 26 GHz is

obtained.

Fig. A Optical image of the device layout

Fig. B



Fig. C Schematic cross-section of the graphene transistorFig. 1. Device layout of graphene field-effect transistors

Figure 1 shows the device layout of graphene field-effect transistors

with probe pads designed for high-frequency measurements. Graphene was

prepared by mechanical exfoliation on a high resistivity Si substrate (>10 kΩ

cm) covered by a layer of 300nm thermal SiO2, and Raman spectroscopy was

employed to count the number of grapheme layers. Fig. 1(B) shows the optical

image of a graphene flake, where the region on the left was identified to be

single-layer graphene. Source and drain electrodes made of 1 nm Ti as the

adhesion layer and 50 nm-thick Pd were defined by e-beam lithography and

lift-off. A 12-nm-thick Al2O3 layer was then deposited by atomic layer

deposition (ALD) at 250oC as the gate insulator.

In order to form a uniform coating of oxide on graphene, a

functionalization layer consisting of 50 cycles of NO2- TMA

(trimethylaluminum) was first deposited prior to the growth of gate oxide. This

NO2-TMA functionalization layer was essential for the ALD process to

achieve thin (<10 nm) gate dielectrics on grapheme without producing pinholes

that cause gate leakage. The dielectric constant of ALD-grown Al2O3 is

determined by C-V measurements and found to be about 7.5. Lastly,

10nm/50nm Pd/Au was deposited and patterned to form the top gate.

As shown in Fig. 1(B), the source electrodes were designed to overlap

the entire graphene flake (see figure inset) in order to minimize the uncertainty

in the de-embedding process for high-frequency Sparameter measurements, as

explained below.

In the device shown in Fig. 1(B), the distance between the source and

drain electrodes is 500 nm, and the top gate underlaps the source-drain gap

with a gate length LG of 360 nm. The total gate width (or channel width),



including both channels, is ~ 40μm. Fig. 1(A) shows the optical image of the

complete device layout where the standard ground-signal-ground probing pads

are realized for the gate and the drain to allow for transition from coax to on-

chip coplanar waveguide (CPW) electrodes. Measurements of dc electrical

properties of graphene devices were performed in order to gain insight into

their high-frequency response. In addition, the dc electrical characteristics were

monitored at each fabrication step so that issues affecting the final device

performance could be identified.

A Fig. Measured output characteristics of the graphene transistor for various top-gate voltages

The dc electrical characteristics of the completed graphene device after

the deposition of the top-gate electrode are shown in Fig. The inset shows the

measured current as a function of (top-gate) voltage VG at a drain bias of VD =

100 mV. Despite the small on/off ratio, the graphene devices are essentially

ambipolar field-effect transistors, as indicated by the "V"-shape gate

dependence in the measured ID-VG curve. In these graphene field-effect

transistors (GFET), the transport is dominated by electrons and holes for

positive and negative gate voltages, respectively, and the conductance



minimum is denoted as the Dirac point where electrons and holes make equal

contributions to the transport.

Fig. shows the n-type output characteristics, ID-VD, of the grapheme

transistor at various gate voltages. It is found that the top-gated GFETs studied

here exhibit a nearly linear ID-VD dependence up to 1.6 V for the gate voltage

ranges measured. This lack of current saturation is due to the fact that graphene

is a zero-gap semiconductor. It has been suggested that velocity saturation at

higher biases may lead to the current saturation phenomenon in

graphene transistors. However, a higher carrier mobility may be required to

achieve this saturation velocity within the drain bias of practical interest.

The de-embedded S parameters constitute a complete set of coefficients

to describe intrinsic input and output behaviors of the graphene device, and can

be used to derive other important electrical properties such as gain.



Fig. The current gain h21

In Fig. the de-embedded current gain h21 decreases with increasing

frequency following the 1/f slope expected for a conventional FET. In a regular

FET, this 1/f frequency dependence of h21, equivalent to a decay slope of -

20dB/decade, results from the gate impedance given by Z = 1/jωCG, where ω =

2πf and CG is the gate capacitance, that decreases with increasing frequency.

Therefore, the 1/f dependence of current gain obtained in Fig. is significant

because it not only validates the high-frequency measurements and the de-

embedding procedures used to extract the intrinsic GFET characteristics, but it

also suggests regular FET-like behaviors for graphene transistors as a function

of frequency. One of the important figures of merit for characterizing high-

frequency transistors is the cut-off frequency fT, defined as the frequency

where the current gain becomes unity (h21 = 1). In practice, for a transistor

possessing the ideal -20dB/decade slope for h21, the cut-off frequency fT is

determined by the product of h21 and frequency, i.e. f × h21(f), over the



measured frequency range. Thus, for the device shown in Fig. 4, the cut-off

frequency fT can be determined by either approach to be ~ 4 GHz. The high-

frequency operation of the graphene transistor is found to be highly dependent

on the dc bias condition.

Fig. shows the measured cut-off frequency fT of the GFET as a function

of gate voltage. At all gate voltages, the de-embedded current gain h21 exhibits

the 1/f frequency dependence similar to that shown in Fig. so that the cut-off

frequency can be reliably determined. The n-branch of the graphene transistor

is shown here because of the higher transconductance for electrons than for

holes in this device. These results show that the high-frequency behavior of

these graphene transistors can be described as an FET with a static, constant

gate capacitance within a significant portion of the bias range. In principle, the

maximum cut-off frequency of an FET can be improved by reducing the gate

length. To investigate the length dependence of fT in graphene devices,

graphene transistors with various gate lengths down to 150 nm were fabricated

and investigated for their high-frequency operations.

All of the graphene devices studied here were prepared in one batch and

on the same chip in order to minimize the device-to-device variations

introduced in the fabrication processes. As before, mobility degradation was

observed in all devices after ALD oxide deposition. The maximum fT was

found to increase with reduced gate lengths, as expected, and for the 150-

nmgate GFET, a peak cut-off frequency as high as 26 GHz was obtained, as

shown in Fig. 6. To the authors’ knowledge, this is the highest value measured

for grapheme transistors to date.

In summary, top-gated graphene transistors of various gate lengths were

fabricated and their high-frequency response was directly characterized by

standard S-parameter measurements. The short-circuit current gain showed the



ideal 1/f frequency dependence, confirming the measurement quality and the

FET-like behavior for graphene devices. As the gate voltage is varied, the

measured fT was found to be proportional to the dc transconductance gm,

following the relation fT = gm/(2π CG). Furthermore, fT was found to

increase with decreasing channel length, with the scaling dependence fT ~

1/LG 2 for the GFETs studied here. A peak cut-off frequency fT as high as 26

GHz was measured for a 150- nm-gate graphene transistor, establishing the

state of the art for graphene transistors. These results also indicate that if the

high mobility of graphene can be preserved during the device fabrication

process, a cut-off frequency approaching THz may be achieved for graphene

FET with a gate length of just 50nm and carrier mobility of 2000 cm2/Vs.

GRAPHENE NANORIBBON FET(GNRFET)

Fig. GNRFET device

Sub-10nm wide graphene nanoribbon field-effect transistors

(GNRFETs) are studied systematically. All sub-10nm GNRs afforded

semiconducting FETs without exception, with Ion/Ioff ratio up to 106 and on-

state current density as high as ~2000μA/μm. We estimated carrier mobility

~200cm2/Vs and scattering mean free path ~10nm in sub-10nm GNRs.



Scattering mechanisms by edges, acoustic phonon and defects are discussed.

The sub-10nm GNRFETs are comparable to small diameter (d≤~1.2nm) carbon

nanotube FETs with Pd contacts in on-state current density and Ion/Ioff ratio,

but have the advantage of producing allsemiconducting devices.

Since our GNRFETs were Schottky barrier (SB) type FETs where the

current was modulated by carrier tunnelling probability through SB at contacts,

high work function metal Pd was used to minimize the SB height for holes in

p-type transistors. In fact we used Ti/Au as contact and found that Pd did give

higher Ion in device with similar dimensions. 10nm SiO2 gate dielectrics was

also important to achieve higher Ion because it significantly reduced SB

width at contacts compared to 300nm in previous work

For wide GNR devices, they all showed metallic behavior because of

vanishingly small bandgaps. Compared to sub-10nm GNRFETs with similar

channel length, the current density in wide GNR devices was usually higher

(~3000μA/μm at Vds=1V for the device in. We note that our wide GNRs

showed relatively weak gate dependence in transfer characteristics, likely due

to interaction between layers. The Dirac point was usually not observed around

zero gate bias, indicating p-doping effects at the edges or by physisorbed

species during the chemical treatment steps.



Fig. Transfer and output characteristics of the device

We next analyze how close the GNRFET operates to the ballistic

performance limits by comparing experiments with theoretical modelling. The

theoretical model computes the ballistic performance limits by assuming a

single ballistic channel and ideal contacts (sufficiently negative SBs).

Any subsequent edge scattering after OP/ZBP emission has a small

direct effect on the DC current because edge scattering is elastic and does not

change the carrier energy. Such a carrier rattles around in the channel and

finally diffuses out of the drain. At high drain biases, therefore, only elastic

scattering near the beginning of the channel matters and the rest of the channel

essentially operates as a carrier absorber.

Our sub-10nm GNRFETs afford all-semiconducting nano-scale

transistors that are comparable in performance to small diameter carbon

nanotube devices. GNRs are possible candidates for future nano-electronics.

Future work should focus on elucidating the atomic structures of the edges of

our GNRs and correlate with the performances of GNRFETs. The integration

of ultra thin high dielectrics and more aggressive channel length scaling is also

needed to achieve better electrostatics, higher Ion and ideal subthreshold slope.



TUNABLE GRAPHENE SINGLE ELECTRON

TRANSISTOR

The device consists of a graphene island connected to source and drain

electrodes via two narrow grapheme constrictions. It is electrostatically tunable

by three lateral graphene gates and an additional back gate. The tunneling

coupling is a strongly nonmonotonic function of gate voltage indicating the

presence of localized states in the barriers. We investigate energy scales for the

tunneling gap, the resonances in the constrictions and for the Coulomb

blockade resonances. From Coulomb diamond measurements in different

device configurations (i.e. barrier configurations) we extract a charging energy

of _ 3.4 meV and estimate a characteristic energy scale for the constriction

resonances of _ 10 meV

.

Fig. Graphene single electron transistor(SET)



Fig. Schematic illustration of the tunable SET device with electrode assignment

Here we investigate a fully tunable single electron transistor (SET) that

consists of a width modulated grapheme structure exhibiting spatially separated

transport gaps. SETs consist of a conducting island connected by tunneling

barriers to two conducting leads. Electronic transport through the device can be

blocked by Coulomb interaction for temperatures and bias voltages lower than

the characteristic energy required to add an electron to the island. The sample is

fabricated based on single-layer grapheme flakes obtained from mechanical

exfoliation of bulk graphite. These flakes are deposited on a highly doped

silicon substrate with a 295 nm silicon oxide layer. Electron beam (e-beam)

lithography is used for patterning the isolated graphene flake by subsequent

Ar/O2 reactive ion etching. Finally, an additional e-beam and lift-off step is

performed to pattern Ti/Au (2nm/50 nm) electrodes.



TABLE I: Capacitances and lever arms of the different gate electrodes, including source and drain contacts, with respect to the graphene island. Most values are independent from the measurement regime, NN or NP. If there is a difference the NP value is given and the NN value is put in brackets.

In conclusion, we have fabricated and characterized a fully tunable

graphene single electron transistor based on an etched width-modulated

graphene nanostructure with lateral graphene gates. Its functionality was

demonstrated by observing electrostatic control over the tunneling barriers.

From Coulomb diamond measurements it was estimated that the charging

energy of the grapheme island is 3.4 meV, compatible with its lithographic

dimensions.

These results give detailed insights into tunable graphene quantum dot

devices and open the way to study graphene quantum dots with smaller

dimensions and at lower temperatures.



FABRICATION PROCESS

1. First, an iron catalyst is formed into the desired channel shape, using a

conventional photolithographic process.

2. Graphene is then formed on the iron layer via CVD.

3. Source and drain electrodes of titanium-gold film are formed at both ends of

the graphene, thereby "fixing" the graphene.

4. Next, just the iron catalyst is removed using acid, leaving the graphene

suspended between the source and drain electrodes, with the graphene

"bridged" between the electrodes.

5. Using atomic-layer deposition (ALD), a method for forming thin films, a

layer of hafnium dioxide (HfO2) is grown on top of the graphene to stabilize the

graphene.

6. Finally, a gate electrode is formed on top of the graphene and through the

HfO2, resulting in the formation of a graphene transistor.



CONCLUSION

Although promising, graphene based electronics faces many obstacles

before it can become a competitive technology. Minimum conduction has to be

decreased, device to device variability has to be controlled, and a stable gate

dielectric must be found. However the chip level integration of hundreds of

graphene devices on insulating SiC substrates is a step towards making

graphene technology possible. The main driver for a graphene technology is

clearly mobility.

A necessary and important aspect of engineering course is technical

seminar. It gives an engineer to face and gain the knowledge of various

technical fields. Knowledge of that field helps the student to connect from the

technical world.

This seminar report represents the whole knowledge of Graphene

Transistor. In everywhere in industries programmable logic controller is used.

We can say that now a days the grapheme transistor become the back bone of

the modern electronic field. So, I thought to take my technical seminar

onGraphene Transistor. I learn a lot of knowledge.



REFERENCE

• IBM Press release

• Fujitsu laboratories

• MIT’s Technology review

• IEEE XPLORE digital library

• Wikipedia



ABSTRACT

A graphene transistor is a nanoscale device based on graphene, a component of

graphite with electronic properties far superior to those of silicon. The device is

a single-electron transistor, which means that a single electron passes through it

at any one time.

A research team led by Professor Andre Geim of the Manchester Centre for

Mesoscience and Nanotechnology built a graphene transistor and described it

in the March 2007 issue of Nature magazine.

In FeB 2010,IBM demonstrated a 100GHz Graphene Transistor.

Features of the graphene transistor include:

the ability to operate at room temperature.

a size one atom by 10 atoms wide.

extreme sensitivity.

the ability to operate with the application of very low voltages.

These qualities mean that graphene-based processors could be a fast, low-

power successor to silicon-based processors and enable advances in microchip

technology beyond the capabilities of those using silicon as

their semiconductor material. Electrons can move through graphene at speeds

ten to one thousand times greater than silicon. Furthermore, unlike silicon,

graphene's properties actually improve as the devices become smaller. That

capacity, coupled with the ability to operate at room temperature, could allow

more miniaturization which would, in turn, allow more components to be

placed on an integrated circuit (IC).

Scientists have predicted that graphene transistors could scale to transistor

channels as small as two nanometers (nm) withterahertz speeds.


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TABLE OF CONTENTS.

SL NO. TITLE. PAGE No.

1. INTRODUCTION 1

2. GRAPHENE 2

3. DISCOVERY OF GRAPHENE 4

4. GRAPHENE QUANTUM DOTS AS SET 6

5. OPERATION AT GHz FREQUENCIES 8

6. GNRFET 15

7. TUNABLE GRAPHENE SET 18

8. FABRICATION PROCESS 21

9. CONCLUSION 22

10. REFERENCE 23


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