final seminar 2011

8/2/2019 Final Seminar 2011

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3-D TRANSISTORS

Submitted by:Chaitanay yadavUE84009EEE-7th semester


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INTEL INTRODUCED WORLDS FIRST 3-D TRANSISTOR

RECENTLY IN MAY 2011


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WHAT IS 3-D TRANSISTOR??

Tri-gate or 3-D are termsused by intel coorporationto describe their nonplanar transistor

architecture planned foruse in futuremicroprocessors. Thesetransistors employ a

single gate stacked ontop of two vertical gatesallowing for essentiallythree times the surfacearea for electrons to

travel


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NEED OF 3-D TRANSISTOR

Future of computing lies in small, low-powersolutions coupled with big-iron cloud services.

Smart phones are becoming personal computers,powerful enough to run simple desktop computingenvironments.

Tablets are cannibalizing laptops.

Entire home entertainment experiences are beingjammed into tiny set-top boxes and embedded intotelevisions.

Even Microsoft's next version of Windows will runon low- ower ARM-based chi s.


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COMPARISON BETWEEN PLANAR AND 3-D

TRANSISTOR

3-D transistors employ a single gate stacked on top of

one or more fins.

fins


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FUNCTION OF FINS

The gate wrapsaround the fin. Thecurrent is controlledby using a gate oneach of the threesides of the fin--twoon each side and oneacross the top--rather

than just one on top,as is the case with the2D planar transistor


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The additional control enables as much transistorcurrent flowing as possible when the transistor is in

the 'on' state (for performance), and as close tozero as possible when it is in the 'off' state (tominimize power), thereby maximising transistorswitching performance

Allows essentially three times the surface areafor electrons to travel as compare to planarstructure, hence reducing leakage and consume farless power than current transistors


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Tri gate transistors can have multiple fins

connected together to increase total drive

strenght for higher performance


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COMPARISON IN STRUCTURES


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EXPLANATION FOR THE SIZE

In a typical transistor - referredto these days as a planartransistor - only the small layerbetween the channel and thegate becomes active when thetransistor is switched on. and is

referred to as the dielectric

However, in a Tri-Gatetransistor, the channel is in threedimensions, meaning that thedielectric around this is also in

three dimensions. As electricitycan flow around all three sidesof the channel, this is a neatway of reducing transistor sizeon the silicon die (to the width ofthe fin), while maintaining asufficiently long gate length for astrong signal.


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FEATURES OF 3D STRUCTURE


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As we can see that active power or workingpower required for overcoming the thresholdvoltage in transistors is less in 3D 22nmstructure. This is due to the reduction in voltageleakage.

Active power falls even faster since P ~ F * V2

Approximately 50% less power is required in 3Dtransistor than in planar transistors


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As more transistors are put on a chip, the cost to make each transistordecreases


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Transistor gate delay (switching speed) slows down as operatingvoltage is reduced


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BENEFITS OF 3-D TRANSISTOR

Drastic performance gain at low voltage, better thanbulk( >50% power reduction and 37% increase inperformance at low voltage)

Improved switching speeds. This will allow to finallyhit or exceed that magical 4GHz barrier in a stockCPU

Higher drive current for a given transistor

Cost effective( only2-3% cost adder).


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THANK YOU!!

final seminar 2011

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