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www.final-yearprojects.co.cc | www.troubleshoot4free.com/fyp/

A VLSI PROGRESSIVE

CODING FOR WAVELET-

BASED IMAGE

COMPRESSION

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ABSTRACT

This paper describes the hardware design flow of lifting based 2-D Forward Discrete

Wavelet Transform (FDWT) processor for JPEG 2000. In order to build high quality image of

JPEG 2000 codec, an effective 2-D FDWT algorithm has been performed on input image file toget the decomposed image coefficients. The Lifting Scheme reduces the number of operations

execution steps to almost one-half of those needed with a conventional convolution approach.

Initially, the lifting based 2-D FDWT algorithm has been developed using Mat lab. The FDWT

modules were simulated using XPS(8.1i) design tools. The final design was verified with Matlab

image processing tools. Comparison of simulation results Matlab was done to verify the proper

functionality of the developed module. The motivation in designing the hardware modules of the

FDWT was to reduce its complexity, enhance its performance and to make it suitable

development on a reconfigurable FPGA based platform for VLSI implementation. Results of the

decomposition for test image validate the design. The entire system runs at 215 MHz clock

frequency and reaches a speed performance suitable for several realtime applications. The result

of simulation displays that lifting scheme needs less memory requirement.

KEY WORDS:

EDK Tool (XPS 8.1i), Matlab 7, Visual Basic 6.0, Xilinx Spartan-3E FPGA Kit

Languages Used: System C., JPEG2000 (SPHIT), FDWT

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3.2.1 Reconstructing approximations and details --------------------31

3.2.2 Relationship of filters to wavelet shapes -----------------------33

Chapter 4: Introduction to tools ---------------------------------------------------------36

4.1 Introduction to MATLAB ------------------------------------------------36

4.2 Introduction to visual basic 6.0 -----------------------------------------42

4.4 Introduction to EDK tool -------------------------------------------------47

4.4.1 Defining the hardware design (XPS) ----------------------------47

Chapter 5: Implementation ---------------------------------------------------------------52

5.1 fundamentals of digital image --------------------------------------------52

5.1.1image compression ---------------------------------------------------52

5.1.2 Image compression types -------------------------------------------53

5.1.2.1 Lossy image compression ---------------------------------53

5.1.2.2 Lossless image compression ------------------------------54

5.1.3 Image compression standards -------------------------------------54

5.2 lifting scheme ----------------------------------------------------------------55

5.2.1 Lifting using Harr ----------------------------------------------------56

5.2.2 General adaptive update lifting ------------------------------------57

5.2.3 Threshold technique -------------------------------------------------59

5.3 Sphit algorithm ---------------------------------------------------------------61

5.3.1 Progressive image transmission ------------------------------------615.3.2 Set partitioning sorting algorithm -----------------------------------62

5.3.3 Spatial orientation trees ---------------------------------------------64

Future Scope -----------------------------------------------------------67

Conclusion--------------------------------------------------------------68 Bibliography ---------------------------------------------------------------69

Appendix------------------------------------------------------------------- 71



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LIST OF FIGURES

NAME OF FIGURE PAGE NO

Fig 1.1: Image Compression Model ------------------------------------------------------03

Fig 1.2: Image Decompression Model ---------------------------------------------------03

Fig 2.1: Block Diagram of Lifting based DWT -----------------------------------------04

Fig 2.2Fourier analysis -------------------------------------------------------------------05

Fig 2.3 Short-timeFourier analysis ------------------------------------------------------05

Fig 3.1(a) Filter Tree structure for the fast wavelet transforms -----------------------26

Fig 3.1 (b) the position of the samples on the time scale planes ----------------------26

Fig 3.2 Perfect reconstruction filter bank for used for 1-D DWT ---------------------27

Fig 3.3 Level one 2-D DWT applied on an image ---------------------------------------28

Fig 3.4 DWT for Lena image ---------------------------------------------------------------28

(a) Original Image

(b) Output image after the 1-D applied on column input

(c) Output image after the second 1-D applied on row input

Fig 3.5 Computation of 2D DWT an example ------------------------------------------29

Fig 3.6(a) Level-3 dyadic DWT scheme -------------------------------------------------30

Fig 3.6(b) Level-3 dyadic DWT scheme -------------------------------------------------30

Fig 4.1 Introduction to FPGA kit ----------------------------------------------------------45

Fig 5.1 Block Diagram ----------------------------------------------------------------------53

Fig 5.2 The Lifting Scheme ----------------------------------------------------------------55

(a) Forward Transform

(b) Inverse Transform

Fig 5.3 Adaptive update lifting scheme ---------------------------------------------------57

Fig 5.4 Examples of parent-offspring dependencies in

The Spatial-orientation tree ---------------------------------------------------------64



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ABREVATIONS

DWT: Discrete Wavelet Transform.WT: Wavelet Transform.

DCT: Discrete Cosine Transform

JPEG: Joint photographic experienced Group.

FPGA: Field programmable Gate array.

STFT: Short-Time Fourier Transform.

MRA: Multi resolution analysis.

SPIHT: Set partionating in hierarical trees.

XPS: Xilinx Platform Studio.



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