Gérard: The Hard Man behind the Soft Core

Satnam SinghMicrosoft Research, Cambridge UK

The University of Birmingham

!

multipleindependentmulti-ported

memories

fine-grainparallelism

andpipelining

hard and softembeddedprocessors

0101110001110001110100111001100100111000111001010110001110001110

New .bit File0101110001110001110100111001100100111000111001010110001110001110

.mem File

DATA2BRAM

0101110001110001110100111001100100111000111001010110001110001110

ELF File

# CPU address space 0xFFFFE000 - 0xFFFFFFFF. ADDRESS_BLOCK dramctlr BUS_BLOCK [0xFFFFF000:0xFFFFFFFF] xrefdes/dramctlr/bram0 [7:0] LOC=RAMB16_X0Y0; xrefdes/dramctlr/bram1 [15:8] LOC=RAMB16_X1Y0; xrefdes/dramctlr/bram2 [23:16] LOC=RAMB16_X2Y0; . . . END_BUS_BLOCK; END_ADDRESS_BLOCK;

BlockRam Memory Map (.bmm)

0101110001110001110100111001100100111000111001010110001110001110

.bit File

ZBT SSRAM SDRAM

ZBT SSRAMController

SDRAMController

405PPC

On-ChipPeripheral

ROM

High-SpeedPeripheral

On-ChipPeripheral

CoreConnect OPB(On-Chip Peripheral Bus)

OPB

DDRSDRAM

CoreConnect Processor Local Bus (PLB) Arbiter

DDR SDRAMController

External BusController OPB Bridge

OPB BridgeI-Cache PLB

D-Cache PLB

locksmonitorscondition variablesspin lockspriority inversion

PLDI 1998

PLDI 1999

12345

PLDI 2000

1 2 3 4 50

10

20

30

40

50

60

70

80

Series1Series2

POPL 1998

POPL 1999

POPL 2000

ray of light

Signal

Lustre

PRET-C

SHIM

Jazz

Esterel

San Jose, 6 June 2003

Sylvan Dissoubray

Gérard wearing Satnam’s ring

Satnam wearing Gérard’s ring

San Jose, 6 June 2003

Gérard Berry

Synchronous Programming Language Combat Team

Albert Benveniste

NicolasHalbwachs

Zero delay example: Newtonian Mechanics

Concurrency + DeterminismCalculations are feasible

Predictable delay examples: sound, light, waves

• Wait long enough, same result as 0-delay !• Zero delay and predictable delay are fully compatible• Constructive semantics is the unification• A theory of causality for reactive systems

• Clocked digital circuits paradigm

Safe State Machines Esterel code

loop [ await A || await B ] ; emit Oeach R

Esterel design

void uart_device_driver (){.....} uart.c

VHDL, Verilog -> hardware implementation

C -> software implementation

Hardware UART

Software UART

18/01/2011 31G. Berry, Microsoft Research

Project Structure

Automatic Documentation

ProjectManagement

Executable Specification

Exporter

Debugging & Simulation

Formal Verification

DesignVerification

Sequential Equivalence

check

DUT

Optimized for synthesisDFT-ready

SystemC & RTL flow integration

C / C++ / SystemC Verilog / VHDL

.sc .vhd

Architecture

Design Specification CaptureDesign

FunctionalSpec Verification

Requirements

ArchitectureDiagram (2007)

Editor

Simulator

DesignVerifier

ModelReporter

Code & TestbenchGenerators

Editor

SequentialEquivalence

Checker

IDE

PlayerIDE

G. Berry, Microsoft Research 18/01/2011 32

SCADE in the Airbus A380

– Flight Control system – Flight Warning system– Electrical Load Management system– Anti Icing system– Braking and Steering system– Cockpit Display system– Part of ATSU (Board / Ground comms)– FADEC (Engine Control)– EIS2 : Specification GUI Cockpit:

– PFD : Primary Flight Display– ND : Navigation Display– EWD : Engine Warning Display– SD : System Display

Flight ControlPrimary & Secondary

Commands

Anti Ice Control Unit

FlightWarningSystem

Braking & Steering Control Unit

French Synchronous Language Thread Level Remains High

SEVERE:hysteresis

HIGH:deadlock

ELEVATED:priority inversion

GUARDED:non-atomic action

LOW:race condition

begin…end

procedurestatic final void

forwhile

loop

accept

if then else

case

present gift then await scream end present

Thank you Stephen Edwards

present gift then pause; every day do await thanks end every end present

Thank you Stephen Edwards

abort nothing when bored

Thank you Stephen Edwards

every day do nothing end every

Thank you Stephen Edwards

run slowly

Thank you Stephen Edwards

await falls ; every body do sustain disbelief end every

Thank you Stephen Edwards

present case legally do run away end present

Thank you Stephen Edwards

abort task when immediate objection

Thank you Jens Brandt

abort run slowly || run fastly when sleepy

Thank you Mike Kishinevsky

trap mouse in every loop do run cheese end every handle hair do run water end trap

Thank you Mike Kishinevsky

Engine control software programmed in Esterel by non-French speaker

Kavi Arya, Mumbai, 10 January 2004

Esterel

present A then emit A end

QEsterel

present A then emit A end

Thank you Georges Gonthier

Mike Kishinevsky

Mike Kishinevsky