Green Computing Methodology for Next Generation Computing Scientists

Chia-Tien Dan Lo and Kai Qian Department of Computer Science and Software Engineering

Southern Polytechnic State University Marietta, GA

{clo, kqian}@spsu.edu

Abstract— Green computing has been an active research area which studies an efficient use of computing resources. It is a growing import subject that creates an urgent need to train next generation computer scientists or practitioners to think “green.” However, green computing has not yet been well taught in computer science (CS) or computer engineering programs (CE) programs, partly due to the lack of rooms to add a new course to those programs. Presented in this paper is an effort to reform core concepts of CS/CE to inculcate green computing in subjects such as algorithms, and operating systems.

Keywords-greeen computing, wireless sensor network, education, embedded systems

I. INTRODUCTION Green computing refers to environmentally sustainable

computing which studies and practices virtually all computing efficiently and effectively with little or no impact on the environment. There are several facets to achieve green computing such as designing, manufacturing, using, and disposing computing components including hardware and software. However, most green computing projects focus on energy efficiency for data centers such as IBM’s “Project Big Green” with a 42% power savings [1], and a green computing project conducted at Indiana university reduces 48.3% energy by applying “sleep mode” on a cluster [2]. Moreover, the green computing guide reported by University of Colorado [3] shows how to achieve 80% energy savings in high performance computing. There are research projects in low power design which leads to low power devices such as Intel SpeedStep [4], AMD PowerNow [5], and MSP430 [6]. These low power devices lay the foundation for building large scale computing centers normally via the basic input output system (BIOS) firmware on each computer. This mechanism will be referred to coarse grained green computing as there is no individual control mechanism for each application running on the same system.

Though the green computing concepts on large scale computing clusters such as data centers attracts instantaneous attention from enterprises and the computer industry, little effort has been made on fine-grained green computing for computer architectures, operating systems, embedded systems, computer networks, programming, and algorithms [7]. For instance, an algorithm curriculum typically emphasizes the performance of time and space via the big-O notation but few addresses on how much energy consumed in terms of the big-O notation. As low power is becoming an important design dimension, it requires our next generation

computer scientists to think how to compromise a design that will maximize the overall system performance subject to multiple design dimensions. Another example such as delay loop used in operating systems or computer network may have to be resigned using interrupt driven for the power consumption concern.

With the availability of the low power devices, and a missing component in CS/CE education, there is an urgent need to revisit CS/CE curricula from the perspective of the fine-grained green computing. While the need is obvious, it spontaneously raises a series of questions, most important of which is how to seamlessly transform the existing curriculum to a “greener” one that covers traditional CS/CE fundamentals and green computing. The paper presents obstacles we face with their feasible solutions when developing such a pedagogical model.

II. FINE-GRAINED GREEN COMPUTING Fine-grained green computing refers to running a

program efficiently and effectively via a subtle power control on each computing resources as CPU, memory, registers, peripherals, clock management, and power supply. A simple “power cut” as a whole like coarse green computing yields less leverage on manipulating energy consumption in light of the characteristics and the context of a specific application. TABLE I shows a green computing version of the Hello World program with respect to coarse grained and fine grained green computing methodologies.

TABLE I. A GREEN COMPUTING VERSION OF THE HELLO WORLD PROGRAM FOR COARSE GRAINED (LEFT) AND FINE GRAINED (RIGHT)

GREEN COMPUTING.

Program HelloWorld_cprint “Hello World\n” low_power_mode()

Program HelloWorld _f activate(memory_bank) activate(io)

print “Hello World\n” deactivate(memory_bank) deactivate(io) low_power_mode()

The code to the left shows a coarse grained green computing in which the program’s execution is in a full power mode disregarding to whether the program is using a memory banks or I/O peripherals. Note that the system is set to a full power mode when an external event occurs such as a key press or a peripheral interrupt. Therefore, on the entry of the program, the system is assumed to be in full power mode. With the fine grained green computing (the code on the right hand side in TABLE I), only the required memory banks and I/O peripherals are activated for the program. How many

2010 IEEE 34th Annual Computer Software and Applications Conference

0730-3157/10 $26.00 © 2010 IEEE

DOI 10.1109/COMPSAC.2010.31

250

2010 34th Annual IEEE Computer Software and Applications Conference

0730-3157/10 $26.00 © 2010 IEEE

DOI 10.1109/COMPSAC.2010.31

250

memory banks should be activated and what I/O peripherals should be turned on, really depends on the underlying application. This approach allows energy consumption for system components to be fine tuned, and will further reduce power consumption as low power modes are to the CPU only. Components other than CPU will require another control unit in the system. However, this increases the complexity of the design and some algorithms may have to be redesigned to achieve this objective. Note that it seems plausible that the green code at the right hand side in Table II involves more instructions, and thus consumes more power. Actually, it is the idle power consumption that makes the non-green code draining more current than the green code.

A big portion of power consumption is attributed to memory, in which programs and their data are stored. Thus, a compact design of code and data structures is a key to power reduction. For example, a regular merge sort algorithm will waste about 50% of memory space in storing sub-type elements, say a 32-bit CPU were to sort a 16-bit short integers. Two problems raise. First, it doubles the memory space requirement to store the data, and therefore, it may not take advantage of turning off unused memory banks to save power. Second, it requires two times more memory loads than if data were to be sorted in a compact form, i.e., two short integers are stored in a 32-bit memory space. TABLE II illustrates a power-aware merge algorithm that reduces memory power consumption and size by 50%, and increase program efficiency by eliminating a half of lengthy memory accesses (assume all auto variables i, j, k, and n can be allocated in registers).

TABLE II. A POWER-AWARE MERGE ALGORITHM FOR MEMORY POWER AND SIZE REDUCTION

Merge(A, L, R) n=k=0; i=j=2; while (not (empty(L) or empty(R))) {

if (i=2) W1 = head(L); i = 0; if (j=2) W2 = head(R); j=0;

if (w1[i] > w2[j]) w[k++] = w2[j++]; else w[k++] = w1[i++];

if k=2 A[n++] = w; k = 0;

end of while //append the rest of lists to A if (not empty(L)) append L to A else if (not empty (R)) append R to A

The idea of the power-aware merge algorithm is to pack

two short integers into one word, which is a basic unit for CPU to load data into registers. Each load instruction will actually load two short integers. The operations of the merge algorithm are similar to those of a traditional one. The only difference is the three “if” statements to check if the indices reach 2. The asymptotic time complexity will remain the same, i.e., O(n), but the actual run time will be shorter if

, where m is the number of times slower for memory access compared to CPU instructions. The following depicts the time complexity for the merge algorithm of the original version and the power aware version shown in

4m

TABLE II.

nnmnT

nnmnT

awarepower

org

32

)(

)(

_

However, the energy complexity for the original version is two times as much as that of the power aware version if the data memory is much larger than the program. Therefore, it is necessary to fine grained tuning power consumption of an algorithm. To benefit that, an algorithm will typically be redesigned.

Similarly, when green computing is applied to operating systems, especially, its scheduler would have to handle per-process requirements in order to optimally control all peripherals in terms of power consumption. If dynamic voltage scaling (DVS) were to be added, the scheduler would have to consider CPU power supply in light of deadlines and priorities of a task. Often, there are situations where lower voltage may end up consuming more power for completing a task. Perhaps, the most difficult is to find where to sneak in green computing and how it improves system performance.

III. CONCLUSION An effective and efficient use of computing resources is a

focal notion of green computing and it is normally achieved via low power control in a coarse grained manner. However, different applications obviously have quite diversified running patterns that simply turn off power may not achieve optimal power consumption. In this regard, the curriculum used to train next generation computer scientists to think “green” may require lots of efforts to redesign. Examples shown in this paper depicts the difficulty of infusing green computing to a simple merge algorithm. It can be seen that transformation on other core CS/CE curricula to inculcate green computing is not trivial. Hence, a substantial amount of efforts deserve on this development.

REFERENCES [1] Mike Ebbers, Alvin Galea, Michael Schaefer, and Marc Tu Duy

Khiem, “The Green Data Center: Steps for the Journey,” IBM Redbooks, http://www.redbooks.ibm.com/abstracts/redp4413.html.

[2] “Desktop Computer Energy Reduction Pilot Study,” http://education.indiana.edu/PowerManagement/tabid/12714/Default.aspx.

[3] “Green Computing Guide,” The University of Colorado – Boulder, http://ecenter.colorado.edu/energy/projects/green_computing.html

[4] “Enhanced Intel SpeedStep® Technology How To Document,” http://www.intel.com/cd/channel/reseller/asmo-na/eng/203838.htm

[5] “AMD PowerNow”, http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_10220_10221%5E964,00.html

[6] “MSP430™16-bit Ultra-Low Power MCUs,” http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=140&familyId=342&CMP=KNC-GoogleTI&247SEM

[7] John Fronck, “Green Computing – Convervation through Better Programming,” http://dev.aol.com/blog/johnfronck/GreenProgramming

251251