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2190 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 12, DECEMBER 2004
A Polar Modulator Transmitter for GSM/EDGEMichael R. Elliott, Tony Montalvo, Brad P. Jeffries, Frank Murden, Jon Strange , Member, IEEE , Allen Hill,
Sanjay Nandipaku , Member, IEEE , and Johannes Harrebek
Abstract—This 0.5- m SiGe BiCMOS polar modulator IC addsEDGE transmit capability to a GSM transceiver IC without anyRF filters. Envelope information is extracted from the transmit IFand applied to the phase-modulated carrier in an RF variable gainamplifier which follows the integrated transmit VCO. The dual-band IC supports all four GSM bands. In EDGE mode, the IC pro-duces more than 1 dBm of output power with more than 6 dB of marginto the transmit spectrum mask and less than 3% rms phaseerror. In GSM mode, more than 7 dBmof outputpower is producedwith noise in the receive band less than 164 dBc/Hz.
I. INTRODUCTION
THE EDGE standard [1] is an enhancement to GSM
designed to accommodate higher data rate communica-
tions. In order to achieve this, the modulation ( -shifted
[eight–phase–shift keying (8-PSK)]) uses both amplitude
modulation (AM) and phase modulation (PM) versus GSM
(GMSK) which requires only PM. Most GSM transmitters use
an on-channel voltage-controlled oscillator (VCO) that is phase
modulated with a translational loop phase-locked loop (PLL)
[2], [3]. This architecture is very efficient for constant AM,
since all RF filtering can be eliminated, but it is incompatible
with nonconstant-AM such as EDGE.
The AM of EDGE requires a linear transmitter architecture.
One conventional approach for linear transmitters is direct up-
conversion with an I/Q modulator. Unfortunately, since linearamplifiers tend to be noisier than saturated amplifiers, the up-
converter output is likely to have a wideband noise floor that
would fail the noise requirements of the standard. As a result,
RF filtering would be required at the transmitter output to meet
the receive-band noise requirements. Further, a linear modulator
is likely to consume more power than a nonlinear modulator.
II. SYSTEM ARCHITECTURE AND REQUIREMENTS
A polar modulator architecture [4]–[8] was chosen to avoid
the external RF filters that would likely be necessary with other
transmitter topologies and for compatibility with existing GSM
transmitters for an efficient dual-mode solution. A simplifiedblock diagram of the GSM/EDGE transmitter is shown in Fig. 1.
An I/Q modulator generates an EDGE (or GSM) modulated IF
output from the baseband inputs. The IF output contains both
AM and PM in EDGE mode, which can be generically repre-
sented as
IF (1)
Manuscript received April 15, 2004; revised July 8, 2004.The authors are with Analog Devices, Inc., Greensboro, NC 27409 USA
(e-mail: [email protected]).Digital Object Identifier 10.1109/JSSC.2004.836340
where is the AM and is the PM. This is the input signal
to both the PM and AM signal paths.
The PM path limits the IF signal IF to remove the AM.
The limited signal is then used as the reference input to a trans-
lational loop PLL. The PLL locks the VCO to the transmit fre-
quency, transfers the PM of the reference input onto the VCO,
and acts as a tunable high-Q filter for input noise contributors in
the transmitter. The resulting VCO output from the PLL is then
VCO (2)
TheIF signal IF isalsoinput tothe AM path wherethe AM
is extracted by mixing the IF signal with an amplitude-limited
version of itself, yielding
IF (3)
which can also be represented as
IF
(4)
The undesired component is removed by the amplitude
path filter leaving only the desired AM signal . The PMand AM signals are then recombined in the RF variable-gain
amplifier (VGA) at the output of the transmitter.
In GSM mode, the AM path is disabled and the transmitter
reverts to a conventional nonlinear offset PLL transmitter.
This implementation includes two RF paths, each covering
two bands to form a quad-band solution. The low band covers
the GSM-850 (824–849 MHz) and GSM-900 (880–915 MHz)
bands. The high band covers the DCS (1710–1785 MHz)
and PCS (1850–1910 MHz). A detailed block diagram of the
complete transmitter is shown in Fig. 2 with both signal paths
and the required calibration circuits. Although the solution is
a complete GSM/EDGE transceiver, the focus of this paper isthe polar modulator IC.
One of the key challenges in the polar modulator architecture
is the tradeoff between the RF spectrum and noise. A summary
of the requirements [1] is shown in Table I. A system-level anal-
ysis of a polar modulator reveals that inadequate bandwidths in
the PM and AM paths result in spectral regrowth that can vio-
late the transmit mask requirement as imposed by the standard.
This spectrum degradation can be understood by comparing the
amplitude and phase components of the signal to the composite
signal and the transmit mask, as seen in Fig. 3. Note that the
phase component of the signal exceeds the mask requirement
by over 25 dB at 400-kHz offset from the carrier.
0018-9200/04$20.00 © 2004 IEEE
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ELLIOTT et al.: A POLAR MODULATOR TRANSMITTER FOR GSM/EDGE 2191
Fig. 1. Simplified transmitter block diagram.
Fig. 2. Detailed block diagram.
Fig. 4 shows the relationship between AM and PM band-
widths and margin to the transmit mask at the critical offset
of 400 kHz from the carrier. At 400-kHz offset, the spectrum
is the most sensitive to transmitter impairments that result in
spectral regrowth. Clearly, wider modulation bandwidths result
in more margin to the mask requirement. However, as the signal
path bandwidths are increased, the out-of-band noise also in-
creases. The most stringent noise requirement in EDGE mode
is the noise in the receive band at 20-MHz offset from the car-rier. The transmit mask requirements are the same for both the
TABLE ISYSTEM REQUIREMENTS
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2192 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 12, DECEMBER 2004
Fig. 3. Signal bandwidths.
low and high bands, but the noise requirement is more dif ficult
in the low band, so the focus will be on the low band.
Fig. 5 shows the relationship between the PM bandwidth and
margin to the transmit mask on one axis and receive-band noise
margin on the other axis for EDGE mode. The transmitter is
designed to have 6-dB margin to the transmit mask requirement
to minimize the back-off required in the power amplifier—thus
maximizing its ef ficiency. The receive-band noise target in-
cludes 3 dB of margin to ensure manufacturability. Thus, the
phase modulator bandwidth must be between 3.5–4.0 MHz
or about 6%. The phase modulator is a PLL which has
significant bandwidth variation due to the variation of
the integrated VCO. The VCO gain variation can result in
nearly 30% bandwidth variation. A calibration is utilized to
minimize bandwidth variation, as described in Section III-A.
The polar transmitter has other impairments that can degrade
spectral mask performance beyond just the bandwidth require-
ments. These impairments include delay mismatch between the
AM and PM paths, dc offsets in the amplitude path, and finite
RF isolation between the PM signal and the transmit output. The
AM and PM signals must be correctly time aligned before re-
combination at the RF VGA. The delay mismatch system simu-
lations demonstrate the requirements, as shown in Fig. 6. Notice
that the EVM performance is relatively insensitive, but the spec-tral mask margin degrades significantly with delay mismatch.
As a result, the group delay of the AM path must match the
group delay of the PLL PM path to meet the transmit mask re-
quirements.
The amplitude path is also sensitive to dc offsets which pro-
vide a leakage path for the PM signal to the transmit output. This
can be observed mathematically as follows:
TX DC (5)
which can also be expressed as
TX DC (6)
The transmit output in the presence of AM-path dc offsets
contains both the desired signal and an undesired PM compo-
nent with an amplitude equal to the dc offset. The PM signal
exceeds the 400-kHz offset spectral mask requirement by more
than 25 dB, as shown in Fig. 3. This translates to a dc offset
limit in the amplitude path of 0.2% relative to the peak of the
envelope, as verified with system simulations. In addition to dcoffsets, finite isolation from input to output in the RF VGA can
provide a path for the PM signal to leak to the transmit output
and degrade the spectral mask. This is discussed in greater de-
tail in Section III-C.
III. IMPLEMENTATION DETAILS
A. PM Calibration
The conflict between the narrow bandwidth required for noise
filtering and the wide bandwidth required to meet the RF spec-
trum mask dictates very tight control of the phase and enve-
lope bandwidths as described in Section II. The bandwidth of
the transmit PLL (i.e., the phase modulator) is proportional towhere is the charge-pump current and is
the VCO gain. The VCO gain could have 50% variation and,
as a result, the bandwidth can also vary significantly. In order
to maintain the bandwidth with the required 6% accuracy, we
must calibrate the charge pump current such that the ,
product is roughly constant.
The standard allows 200 s for the frequency synthesizer to
lock prior to a transmit burst. Since the transmit PLL lock time
is much less than 200 s, we can use that time to calibrate the
bandwidth. A block diagram of the calibration scheme is shown
in Fig. 7. The first step to calibrating the bandwidth is measuring
. Before we measure , we must set the VCO fre-quency to close to the desired carrier frequency since
depends on frequency.
The calibration begins with the calibration of the VCO’s
2 bits of tank tuning. The control voltage is disconnected from
the PLL and set to a reference voltage, and the frequency is
determined by counting VCO periods for “ ” times the period
of the 13-MHz GSM reference clock. “ ” is set such that the
resolution is on the order of 1 MHz which is a good tradeoff
between calibration time and the desired accuracy. The counter
output is
COUNT (7)
where is the GSM reference time base and is the
VCO period. The VCO frequency is then
COUNT(8)
A successive approximation (SAR) algorithm is used to min-
imize the error between the VCO frequency and the desired car-
rier frequency, which is represented by “TX channel” in Fig. 7.
After the coarse frequency adjustment is completed, another
SAR algorithm is used to set the VCO frequency close to the
desired transmit carrier frequency by driving the control voltage
with a digital-to-analog converter (DAC). This is required to ac-count for the variation with control voltage within each
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ELLIOTT et al.: A POLAR MODULATOR TRANSMITTER FOR GSM/EDGE 2193
Fig. 4. Modulation bandwidth requirements.
Fig. 5. Receive-band noise and transmit mask versus PM bandwidth (EDGEmode).
Fig. 6. Transmit mask and EVM versus delay mismatch (EDGE).
capacitor setting of the VCO. Once the VCO is operating atthe transmit frequency, the is measured by forcing the
Fig. 7. Phase-bandwidth calibration block diagram.
control voltage to two different settings and measuring the fre-
quency deviation . A digital algorithm uses
the measured data to set the charge-pump current in-
versely proportional to .
In GSM mode the output SNR requirement is 6 dB more strin-
gent than in EDGE mode. However, the PM bandwidth is much
narrower than in EDGE mode. Thus, in GSM mode, the trans-
lational-loop PLL bandwidth is automatically reduced to meet
the more stringent receive-band noise specifications. The band-
width is reduced by decreasing the charge pump current by a
factor of two and doubling the loop filter pole capacitance. Theslight increase in closed-loop peaking of the PLL response is
tolerable due to the relaxed bandwidth requirements in GSM
mode and the added stability of the bandwidth calibration that
is not typically present in most PLLs.
B. RF Path: GMSK Modes
A simplified schematic of the GSM-band PM path in GMSK
mode is shown in Fig. 8. The description of the PM path is fo-
cused on the GSM band which has a much more stringent noise
requirement. The DCS/PCS band implementation is simply fre-
quency scaled from the GSM-band implementation. The most
dif ficult requirement is the noise in the receive band, as men-tioned in Section II. Ideally, the noise should be dominated by
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2194 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 12, DECEMBER 2004
Fig. 8. GMSK signal path.
the VCO. For this to be true, the RF driver’s noise contribution
should be very small.
The VCO—shown on the left of Fig. 8—uses a PMOS core
despite the availability of SiGe bipolar transistors. The SNR is
optimized by maximizing the voltage swing on the tank which is
proportional to and by minimizing the noise current added
by the cross-coupled pair, which is proportional to . Thus,
transistors with a low are preferable for a low-noise VCO.
The inductors are made with 4- m-thick aluminum. The in-
ductor Q is about 11 at 870 MHz. We use two single-ended in-
ductors rather than a center-tapped structure—which could have
higher Q in less area—because electromagnetic simulations pre-
dict that this structure reduces magnetic coupling from the VCO
to the transmitter’s output. As mentioned in Section II, any cou-
pling from the phase-modulated carrier to the output results in
degradation of margin to the transmit mask. The varactors are
made from collector-base pn diodes. The VCO’s frequency is
digitally tunable in four roughly 45-MHz steps in order to cover
the wide tuning range requirement with reasonably low .
The primary challenge here is low phase noise at 20-MHz
offset from the carrier. Aside from the obvious requirements
of a high-Q tank and minimal in the core transistors, a
low-noise bias current is critical to achieving low phase noise.
The bias current is derived from a low-noise (i.e., high current)
reference and low-pass filtered using an off-chip ca-
pacitor. Further filtering of high-frequency noise that could be
downconverted to the carrier frequency is applied by the tail
inductor/capacitor combination [9]. The tail current is propor-
tional to absolute temperature(PTAT). A PTAT tail current keeps
the voltage swing on the tank roughly temperature-independent
since the temperature coef ficient of the metal used to make the
inductors results in a roughly inverse PTAT tank impedance.
The VCO signal must be amplified in order to drive the
50- external load at 5 dBm. The ultimate noise requirementis 165 dBc/Hz at 20-MHz offset from the carrier. Practically,
that noise will be dominated by the VCO which means that any
elements following the VCO must contribute very little noise.
Consider a simple calculation of the RF driver’s base-current
noise contribution. The RF driver amplifier in GMSK mode is a
simple differential pair with a roughly 16-mA tail current. The
SNR at the input to the RF driver considering only the driver’s
base current noise with a noiseless tail current is
(9)
where is the rms signal amplitude at the input to the
driver and is the effective parallel impedance of the
VCO’s tank. With a 500-mVp input amplitude, ,
and , the SNR is about 162 dB/Hz, which would
clearly not be acceptable. Thus, the VCO’s relatively high
output impedance must be isolated from the RF driver with a
buffer. The buffer also isolates the VCO’s tank from the input
capacitance of the driver, which enhances the tuning range.
The VCO buffer is a simple emitter follower which is lightly
capacitively coupled to the tank. As seen in (9), special care
must be taken to minimize the noise current being injected into
the tank. In fact, the design of the VCO’s buffer should be an
integral part of the VCO design itself.
The GMSK driver is a simple open-collector fully switched
differential amplifier. If the tail current has a low-pass noise
characteristic, that noise is upconverted to the carrier frequency
and results in a bandpass output noise characteristic. Simula-
tions predict that, as long as the input amplitude is several hun-
dred millivolts or larger, the output noise will be dominated
by upconverted bias current noise. The ratio of dc current to
noise current of a resistively degenerated current source (ne-
glecting noise contributions from base resistance and from the
base-voltage source) is
(10)
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ELLIOTT et al.: A POLAR MODULATOR TRANSMITTER FOR GSM/EDGE 2195
Fig. 9. EDGE mode RF driver.
where is the voltage drop across the degeneration
resistor. Due to voltage headroom constraints, the maximum
practical is 600 mV. If our target for this contributor
to noise is 175 dB/Hz, the minimum bias current is 14 mA.
We use 16 mA to ensure adequate SNR under all process
conditions. Special care must be taken to lowpass filter the
base voltage source and to ensure that the base voltage source
has suf ficiently low impedance to make the current source’sbase current noise negligible. We reuse the capacitors from
the envelope path filter to provide a suf ficiently low-frequency
filter of the GMSK driver’s bias voltage.
C. RF Path: EDGE Modes
A simplified schematic of the RF path used for EDGE
modes—with the EDGE-specific components emphasized—is
shown in Fig. 9. The VCO and VCO buffer are the same as
those in Fig. 8. The RF driver consists of Q1–6. Q7–8 is the
GMSK-mode driver described in the previous section with
the tail current source omitted since it is a high impedance
in EDGE mode. Q9–10 is a dummy driver that is includedto ensure balance. Q7–10 are shown here to emphasize the
importance of balance. The output signal is
(11)
where is the carrier frequency, is the PM, and is the
amplitude of the input signal. The envelope information is repre-
sented as . Note that, although the circuit appears to be
balanced, the envelope is always positiveso is always greater
than . is 16 mA. The maximum instantaneous output
power is achieved when mA and . On average,
is about 0.707 16 mA since the peak-to-average ratioof the EDGE signal is 3 dB. Coarse power control—in three
6-dB steps—is provided by digitally deselecting fingers of Q5
and Q6. Additional power control is provided in the envelope
detector circuits with 1-dB step resolution for a total range of
38 dB. The amplitude path also provides an additional 30 dB of
analog-controlled attenuation for power ramping.
At first glance, it may appear that the EDGE-mode RF path is
similar to a linear modulator since Q5/6 are essentially a linear
transconductor. The difference is that a linear modulator re-quires a complex mixer and a quadrature local oscillator and so
is inherently noisier than this implementation of a polar modu-
lator. Further, since Q5/Q6 are not, on average, in their balanced
state, they are less noisy than a balanced transconductor con-
suming the same current.
Recall that the phase-modulated carrier hasmuch wider band-
width than the desired output signal. Leakage from the EDGE
driver’s input to the output can result in a failure of the transmit
mask requirement. The input signal amplitude is 500 mV and
the amplitude at the collectors is about 800 mVp (2 dBm in 200
). Recall from Section II that the phase-modulated carrier fails
the transmit mask by 25 dB and our transmit spectrum goal by
31 dB. Thus, the isolation required at maximum gain is 35 dB.
The isolation requirement is increased as the output power is
reduced. We use very careful layout to ensure that the coupling
from the driver’s input to the output is perfectly balanced.
Imperfect matching of the capacitance at the collectors of Q5
and Q6 provides another path for the phase-modulated carrier
to leak to the output. The rectification at those nodes creates a
frequency component at twice the input frequency, which mixes
with the input frequency to produce an input frequency compo-
nent at the output. Minimizing those capacitances and ensuring
adequate matching solves the problem.
Imperfect matching of and is yet another mechanism
by which the phase-modulated carrier can leak to the output asshown in Section II. System simulations predict that the dc offset
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2196 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 12, DECEMBER 2004
Fig. 10. Envelope-filter simplified schematic.
Fig. 11. Die photograph.
in the envelope path must be less than 0.2% relative to the peak
of the envelope signal. This corresponds to a dc offset referred to
the bases of Q5 and Q6 of less than 1 mV. The desired matching
in and is achieved by using large interdigitated devicesand as much degeneration as voltage headroom will allow.
The envelope path circuits—described in the next sec-
tion—cannot achieve the desired offset so a calibration is
required. A low-input-offset ( 0.25 mV) comparator measures
the dc offset between the bases of Q5 and Q6. The offset is
minimized by an 8-b DAC using a successive approximation
algorithm.
D. Envelope Path Filter Implementation
A simplified single-ended representation of the amplitude
path filter is shown in Fig. 10. The filter has two primaryrequirements, wideband noise suppression and delay matching
Fig. 12. Transmitter output spectrum (EDGE mode).
of the amplitude path to the PM path. The PM path is a type-II
PLL which has the following generic transfer function:
(12)
which yields the following group delay
(13)
It can be seen from this equation that the group-delay charac-
teristic of the PLL is near zero at low frequency offsets which is
the region of interest. Thus, the amplitude path filter must main-
tain the same low group-delay characteristics.
The filter implementation mimics the PLL with two
integrators and a zero for compensation. The first integrator is
formedby the cellQ1/R2andload capacitor C2. The secondintegrator is formed by the cell Q2/R4 and load capacitor
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ELLIOTT et al.: A POLAR MODULATOR TRANSMITTER FOR GSM/EDGE 2197
(a)
(b)
Fig. 13. (a) Transmit mask versus frequency (low band; 400-kHz offset). (b) Transmit mask versus frequency (high band; 400-kHz offset).
C1. The zero is implemented at the filter input with R1/C1.In order to minimize the output noise of the filter, the voltage
output is not buffered prior to the VGA input so as not to intro-
duce any unfiltered wideband noise or additional current dissi-
pation. As a result, the VGA input impedance must be accounted
for in the design of the filter.
As shown in Fig. 10, the output of the amplitude filter is a
voltage input to the RF VGA. The signal of interest, however,
is the collector current, , of the RF VGA, as described in
Section III-C. That is, the transmit output AM is controlled by
the VGA output current . This current output must
be a linear representation of the AM signal to prevent spectral
mask degradation. System simulations predict an HD3 of 40
dBc to prevent significant impacts on the 400-kHz mask. Thefinal Gm cell of the amplitude filter (Q2/R4) is a scaled version
of the RF VGA (Q3/R5). This results in voltage distortionat the output of the filter to predistort the input voltage to the
VGA such that a linear relationship is maintained.
IV. MEASUREMENT RESULTS
The polar modulator IC is implemented in 0.5- m SiGe
BiCMOS with a die area of 7.8 mm . A die photograph is
shown in Fig. 11. A spectrum of the transmitter output in
EDGE mode along with the transmit mask is shown in Fig. 12.
Clearly, the transmitter has significant margin to the require-
ments. The spectral integrity is maintained across all transmit
bands in both GSM and EDGE modes, as shown in Fig. 13.
Fig. 14 shows a plot of the receive band noise measurementsfor both GSM and EDGE modes against the requirements of the
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2198 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 12, DECEMBER 2004
(a)
(b)
Fig. 14. (a) Receive band noise (low band). (b) Receive band noise (high band; 1910 MHz).
TABLE IISUMMARY OF TRANSMITTER PERFORMANCE
standard. The stability of the noise and spectral performance is
due to the calibrationtechniques employed, in particular, the PLL
bandwidth control as described in Section III-A. A summary of the transmitter measured performance is shown in Table II.
V. CONCLUSION
In this paper, a polar modulator IC for EDGE was described.
The polar modulator architecture eliminates the requirement
for external surface acoustic wave filters that would likely
be required with a linear transmitter because the RF path is
composed of fully saturated—and thus low-noise—circuits.
Implementation challenges were analyzed and the primary
challenge—phase-modulator bandwidth control—was ad-
dressed by a calibration of the transmit PLL’s loop bandwidth.
Measurement results prove that the solution meets the EDGE
and GSM requirements with comfortable margin.
REFERENCES
[1] ETSI EN 300 910. GSM 05.05, 1999.[2] J. Strange and S. Atkinson, “A direct conversion transceiver for multi-
band application,” in RFIC Symp. Dig., 2000, pp. 25–28.[3] T. Yamawaki, M. Kokubo, K. Irie, H. Matsui, K. Hori, T. Endou, H.
Hagisawa, T. Furuya, Y. Shimizu, M. Katagishi, and J. R. Hildersley, “A2.7-V GSM RF transceiver IC,” IEEE J. Solid-State Circuits, vol. 32,pp.2089–2096, Dec. 1997.
[4] L. R. Kahn, “Single-sideband transmission by envelope elimination andrestoration,” in Proc. IRE , July 1952, pp. 803–806.
[5] D. Su and W. J. McFarland, “An IC for linearizing RF power ampli-fiers using envelope elimination and restoration,” IEEE J. Solid-StateCircuits, vol. 33, pp. 2252–2258, Dec. 1998.
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ELLIOTT et al.: A POLAR MODULATOR TRANSMITTER FOR GSM/EDGE 2199
[6] E. McCune and W. Sander, “EDGE transmitter alternative using non-linear polar modulation,” in Proc. Int. Symp. Circuits and Systems, vol.3, May 25–28, 2003, pp. III-594–III-597.
[7] W. B. Sander, S.V. Schell, and B. L. Sander, “Polar modulator for multi-mode cell phones,” in Proc. Custom Integrated Circuits Conf., Sept.2003, pp. 439–445.
[8] T. Sowlati, D. Rozenblit, E. MacCarthy, M. Darngaard, R. Pullela, D.Koh, and D. Ripley, “Quad-band GSM/GPRS/EDGE polar loop trans-mitter,” in Proc.Int. Solid State Circuits Conf., SanFrancisco, CA, 2004,
paper 10.3.[9] E. Hegazi, H. Sjoland, and A. A. Abidi, “A filtering technique to lower
LC oscillator phase noise,” IEEE J. Solid-State Circuits, vol. 36, pp.1921–1930, Dec. 2001.
Michael R. Elliott received the B.S. degree from theUniversity of Missouri-Rolla in 1994 and the M.S.degree from Purdue University, West Lafayette, IN,in 1995, both in electrical engineering.
He joined Analog Devices, Inc., Greensboro, NC,in 1996 as an AnalogIntegrated Circuit Designer. Hisareas of interest include high-speed data converters,frequency synthesizers, and communications circuits
and systems.
Tony Montalvo received the B.S. degree in physicsfrom Loyola University, New Orleans, LA, in 1985,the M.S. degree in electrical engineering fromColumbia University, New York NY, in 1987 and thePh.D. degree in electrical engineering from NorthCarolina State University, Raleigh, in 1995.
From 1987 to 1991, he was a Flash Memory De-signer with AMD. From 1995 to 2000, he with waswith Ericsson, Research Triangle Park, NC, where he
was the Manager of the RF and Analog IC group.Since 2000, he has been the Director of the Analog
Devices Raleigh Design Center, Greensboro, NC. He is also an Adjunct Pro-fessor at North Carolina State University. He holds 15 patents and has authored
or coauthored 10 papers.Dr. Montalvo hasbeen on theISSCC ProgramCommittee since 2002. He was
named Outstanding Teacher in 1995 at North Carolina State University.
Brad P. Jeffries received the B.S. degrees in elec-
trical engineering and computer engineering fromNorth Carolina State University, Raleigh, in 2000.
In 2000, he joined Analog Devices, Inc., Greens-boro, NC, where he has been involved in the designof communications integrated circuits.
Frank Murden received the B.S. degree from the
University of Louisville,Louisville, KY, and the M.S.degree from the University of Arizona, Tucson, bothin electrical engineering.
Since graduation, he has been with Analog De-vices, Inc., Greensboro, NC, doing a wide variety of designs.
Jon Strange (M’00) received the B.Sc. degree inphysics from the University of Durham, Durham,U.K., in 1984 and the M.Sc. degree in microelec-tronics from the University of Edinburgh, Edinburgh,U.K., in 1985.
From 1985 to 1987, he was a Researcher withthe VLSI Department, Thorn-EMI Central ResearchLaboratories, and from 1988 to 1991 he held several
design and engineering management positions forLSI Logic. In 1991, he cofounded Mosaic MicroSystems, Ltd., an analog design consultancy special-
izing in RF and radio system IC design. Since 1996, he has been with AnalogDevices, Inc., Kent, U.K., were he is currently Engineering Director within theRF and Wireless Business Unit responsible for IC product design in the area of radio systems integration. He has authored eight technical papers and has beengranted two U.S. patents, with four pending.
Mr. Strange receoved the the Chalmers Prize in physics in 1984.
Allen Hill received the B.S. degree from Guilford
College, Greensboro, NC.He is an Applications Engineer with 23 years ex-
perience at Analog Devices, Inc., Greensboro, where
he is presently with the Communications Group of the High Speed Converters Division.
Sanjay Nandipaku (M’00) received theB. Tech. andM.S. degrees fromthe Indian Instituteof Technology,Madras, in 1988 and 1991, respectively, both in elec-
trical engineering.His interests lie in the area of communication
system design, specializing in RF wireless systemsarea. He is currently an RF System Design Engi-neer with Analog Devices, Inc., Wilmington, MA,working on the development of architectures andproducts for mobile wireless market space. Prior tothis, he was a Research Engineer with the Center for
Development of Telematics, Bangalore, India, and the RF Group Lead withMidas Communication Technologies, Madras, India.
Johannes Harrebek was born in Aarhus, Denmark,on May 11, 1971. He received the M.Sc.E.E. degreefrom University of Aalborg, Aalborg, Denmark, in1995.
He was a Research and Development (R&D)RF Engineer with Cortech from 1995 to 1998 onDECT terminal development. In 1998, he joinedBosch Telecom, Denmark, as an R&D RF engi-neer on HSCSD GSM mobile phone developmentprojects with a focus on frequency synthesis andantenna design. From 2000 to 2001, he was with
the Department of GSM/EDGE Systems, Siemens Mobile, Denmark. He joined Analog Devices, Inc., in 2001 on the Analog Devices EDGE radio
implementation project and is now RF Systems Development Manager withAnalog Devices Wireless System Applications Center, Aalborg, Denmark,developing form factor reference designs on the latest Analog Devices wirelesssystems solutions.