hardware choices for sdr

Hardware Choices For SDR

Created & Presented by :Ali Masoudi

Content

Important Choices (Platforms) ASICs Embedded Processors DSPs FPGAs Picochip

Conclusion

Summer 2007 2/42SDR Course Project

ASICs

An application-specific integrated circuit (ASIC) is an integrated circuit (IC) customised for a particular use, rather than intended for general-purpose use.

Modern ASICs often include entire 32-bit processors, memory blocks including ROM, RAM, EEPROM, Flash and other large building blocks. Such an ASIC is often termed a SoC (System-on-a-chip).

ASICs perform signal downconversion, digital filtration, and perform at higher rates of speed than FPGAs.

Summer 2007 3 /42SDR Course Project

ASICs (design) Gate array design

Gate Array design is a manufacturing method in which the diffused layers, i.e. transistors and other active devices, are predefined and wafers containing such devices are held in stock prior to metallization

Standard cell design Every ASIC manufacturer could create functional blocks with

known electrical characteristics, such as propagation delay, capacitance and inductance, which could also be represented in third party tools.

Full-custom design Full-Custom ASIC Design defines all the photo lithographic layers of

the device.


ASICs (design) The significant difference is that Standard Cell design uses the

manufacturer's cell libraries that have been used in potentially hundreds of other design implementations and therefore are at much lower risk than full custom design. Standard Cells produce a design density that is cost effective, and they can also integrate IP cores and SRAM effectively, unlike Gate-Arrays.

IP Core = Intellectual Property Core IP core is a reusable unit of logic, cell, or chip layout design and is

also the intellectual property of one party.


ASICs (design) The benefits of Full-Custom Design usually include :

Reduced area (and therefore recurring component cost), performance improvements and also the ability to integrate (include) analog components and other pre-designed (and thus fully verified) components such as microprocessor cores that form a System-On-Chip.

The disadvantages of Full-Custom can include : Increased manufacturing and design time, increased non-recurring

engineering costs, more complexity in the Computer Aided Design (CAD) system and a much higher skill requirement on the part of the design team.


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Embedded Processors An Embedded Processors is simply a uProcessors that has

been “Embedded” into a device It is software programmable but interacts with different pieces

of hardware - how ? Performs both control and computation. more performance

than a uController but not as much performance as a general purpose processor.

Where are they used: Cars, Phones, Media Devices, Wireless, Printers, …


Embedded Processors

What is it really ?

Typically an Embedded Processor is a single-issue in-order RISC processor with a little cache.

It can then sold as a piece of silicon, custom layout, netlist, or architectural description

They are designed to be small, low power, and most importantly correct.

Often due to the real-time constraints of an application area they are designed to have a small deterministic worst case time per instruction.


Embedded ProcessorsWhy use an Embedded Processor? The main reason is simple: Cost

Embedded processors are small so they don’t take up much die area and thus they are cheap to fab.

Embedded processors are verified so I won’t spend a bunch of engineering man hours tracking down hardware bugs so I can tape out my chip.

Embedded processors run software the key part of that is the SOFT (deal with changing specs)

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Embedded Processors Cost, Power, and Size are important for embedded

applications Embedded processors occupy more than 95% of the

entire processor market A large number of electronic products require high-end

32/64-bits embedded processors

Today, the ARM family accounts for approximately 75% of all embedded 32-bit RISC CPUs, making it one of the most prolific 32-bit architectures in the world.

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ARM The ARM architecture (previously, the Advanced RISC

Machine, and prior to that Acorn RISC Machine) is a 32-bit RISC processor architecture developed by ARM Limited that is widely used in a number of embedded designs. Because of their power saving features, ARM CPUs are dominant in the mobile electronics market, where low power consumption is a critical design goal.

ARM's 2006 annual report and accounts state that royalties totaling $164.1 million were the result of licensees shipping 2.45 billion units. This is equivalent to 6.7 cents per unit shipped

In the same year ARM's licensing revenues for processor cores were $119.5 million, in a year when 65 processor licenses were signed, an average of $1.84 million per license.

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DSPs A digital signal processor (DSP) is a specialized

microprocessor designed specifically for digital signal processing, generally in real-time computing.

Characteristics Designed for real-time processing Optimum performance with streaming data Separate program and data memories Special Instructions for SIMD (Single Instruction, Multiple

Data) operations No hardware support for multitasking The ability to act as a direct memory access device if in a

host environment Processes digital signals

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DSPs The heart of the software defined radios rests in the

digital signal processing units.

Digital signal processing can be done on general-purpose microprocessors. However, a DSP contains architectural optimizations to speed up processing. These optimizations are also important to lower costs, heat-emission and power-consumption.

DSPs often use special memory architectures that are able to fetch multiple data and/or instructions at the same time.

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DSPs Most DSPs use fixed-point arithmetic, because in real world

signal processing, the additional range provided by floating point is not needed, and there is a large speed benefit and cost benefit due to reduced hardware complexity. Floating point DSPs may be invaluable in applications where a wide dynamic range is required but it is generally easier to implement algorithms in floating point.

Embedded general-purpose RISC processors are becoming increasingly DSP in functionality. For example, ARM.

Generally, DSPs are dedicated integrated circuits, however DSP functionality can also be realized using FPGAs.

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Conclusion

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FPGAs FPGA = Field Programmable Gate Array Basic Section of FPD:

Logical Block Routing (Switch Matrix) Input Output Block

More Advanced FPD Contains: On-chip Memory Embedded Processor Clock Management High-Speed Transceiver

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FPGA Structures

Basic Lookup Table (LUT)

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FPGA Structures Synchronous Look-UP

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FPGA Structures

Configurable Logic Block (CLB) Two identical slices in each CLB Two LUT in each slice

RAM Blocks Xilinx core generator Synplify ( Best Synthesizer in the world )

CLK - Delay Locked Loop (DLL)

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CLB Slice

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CLK - DLL In dealing with a

DDR-RAM , CLK-DLL can multiply frequency of CLK by factor 2 , by generating the same signal with 180 degree shift in phase .

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FPGAs Spartan

-II FPGA Family

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FPGA Advantages Designing with FPGA: Faster, Cheaper Ideal for customized designs

Product differentiation in a fast-changing market Offer the advantages of high integration

High complexity, density, reliability Low cost, power consumption, small physical

size Avoid the problems of ASICs

high NRE cost, long delay in design and testing increasingly demanding electrical issues

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FPGA Advantages (cont.) Very fast custom logic

massively parallel operation Faster than microcontrollers and

microprocessors much faster than DSP engines

More flexible than dedicated chipsets allows unlimited product differentiation

More affordable and less risky than ASICs no NRE, minimum order size, or inventory risk

Reprogrammable at any time in design, in manufacturing, after installation

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FPGA Advantages (cont.) Very fast custom logic

massively parallel operation Faster than microcontrollers and

microprocessors much faster than DSP engines

More flexible than dedicated chipsets allows unlimited product differentiation

More affordable and less risky than ASICs no NRE, minimum order size, or inventory risk

Reprogrammable at any time in design, in manufacturing, after installation

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User Expectations Logic capacity at reasonable cost

100,000 to a several million gates On-chip fast RAM

Clock speed 150 MHz and above, global clocks, clock management

Versatile I/O To accommodate a variety of standards

Design effort and time synthesis, fast compile times, tested and proven cores

Power consumption must stay within reasonable limits

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Conclusion

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Picochip The picoArray™ is a multi-processor IC which integrates

hundreds of processing elements into a single array. The individual elements have been optimized for signal

processing and wireless algorithm computation and control.

The result is a general purpose wireless communications processor, capable of executing all contemporary wireless standards, which combines the computational density of a dedicated ASIC with the programmability of a traditional high-end Digital Signal Processor (DSP).

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Picochip Targeted at wireless communications applications

software design simpler than hardware software defined gives flexibility scalable solution

Why highly parallel hardware? wireless systems have great deal of parallelism

Replacement for DSP, ASIC, FPGA combinations single architecture single development environment

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Picochip - Architecture

Processor

Switch Matrix

Example signal flows

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Inter-picoArray Interface or Asynchronous Data Interface

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Picochip - Array Elements (AE)

16-bit processor 64-bit LIW targeting

3 execution units 160MHz clock Harvard

architecture Processor and ports

work independently

DataMemory

InstructionMemory

Ports

Config

32-bit picoBus

configuration bus

Processor

32-bit picoBus

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Picochip - Picobus

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Picochip picoArray concept gives scalable, software defined

systems Rapid development due to

deterministic communications single programming environment

Integrated tool set Design Browser provides design visualisation Probes provide non-invasive debugging and monitoring

We want to have a SDR in wireless communications. The best choice is Picochip.

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Picochip - PC102 Current instantiation of the

picoArray Peak performance

197 GIPS 38.6 GMACs 3.3Tbps

communications bandwidth

308 processors 14 co-processor

accelerators for FEC, correlators

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W

0 1 2 3 4 5 6 7 8 9COLUMN

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CTRL2Switch SwitchPROCINT2Switch SwitchADI2/IPI [B]Switch Switch SwitchSwitch ADI2/IPI [A]CTRL2Switch Switch Switch SwitchFAU

CTRL2Switch SwitchADI2/IPI [C]Switch Switch SwitchSwitch ADI2/IPI [D]CTRL2Switch Switch Switch SwitchSRAMIF2 Switch SwitchFAU

STAN2 STAN2 STAN2 STAN2 MEM2SwitchSwitchSTAN2 STAN2 STAN2 STAN2 MEM2SwitchSwitch STAN2 STAN2 STAN2 STAN2 MEM2SwitchSwitch STAN2 STAN2 STAN2 STAN2 MEM2SwitchSwitch STAN2 STAN2 STAN2 STAN2 MEM2SwitchSwitch Switch SwitchFAU













Host Processor Interface

External Memory Interface

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Conclusion

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Conclusion It is apparent that ASICs, DSPs, FPGAs are not capable

of satisfying the power & efficiency requirements of mobile devices.

The typical result emerging is thus a hybrid design that is a combination of ASICs, DSPs, FPGAs.

FPGAs provide a strong platform for specialized digital signal processing tasks for SDRs. They have been used with success in wireless research environments

For example, describes FPGA-based FIR filters, FPGA-based CIC filters, extended precision arithmetic, and a CORDIC carrier recovery loop for a runtime reconfigurable digital receiver.

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The Benefits of FPGA Coprocessing

High-performance DSP platforms, traditionally based on general-purpose DSP processors running algorithms have been migrating towards the use of an FPGA pre-processor or coprocessor.

Doing so can provide significant performance, power, and cost advantages.

Even with these considerable advantages, design teams accustomed to working on processor-based systems may avoid using FPGAs because they lack the hardware skills necessary to use one as a coprocessor.

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Conclusion You can realize significant improvements in the

performance of a DSP system by taking advantage of the flexibility of the FPGA.

Common examples include (but are not limited to) FIR filtering, FFTs, digital down conversion, and forward error correction (FEC) blocks.

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Conclusion

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Thanks

Questions ?

hardware choices for sdr

Documents

design time

design density

design implementations

design team

chip layout design

hardware choices

functional blocks

manufacturers cell libraries