Proc. of the 6th Internat. Symposium on Power Semiconductor Devices & IC's, Davos, Switzerland May 3 1 - June 2, 1994 195

COMPARISON OF RBSOA OF ESTs WITH IGBTs AND MCTs

N.Iwatnuro*, B.J.Baliga, RKurlagunda, G.Mann and A WKelley

Power Semiconductor Research Center Electric and Computer Engineering Department

North Carolina State University Raleigh, NC 27695-7924, USA

Phone:(9 195 15-6174 Fax:(919)5 15-6170 (*) PSRC Industrial Scholar from Fuji Electric Co., Ltd.

ABSTRACT

The reverse biased safe operating area(RBSOA), at snubberless inductive load state, of 600V and 2500V ESTs has been analyzed numerically and experimentally for the first time and compared to those for the IGBT and Ma. The dependence of the RBSOA upon the P base resistance(Rb) in the main thyristor structure of the EST, which affects the triggering and holding currents of the device, has also been investigated. Two types of destructive failure mechanisms have been identified. One is due to the voltage-induced avalanche multiplication, the other is attributed to the current-induced latch-up of the parasitic thyristor. Physical analysis of the RBSOAs configuration are also discussed.

INTRODUCTION

Recently, power integrated circuits(P1Cs) have been used for a variety of applications like display drivers and power supplies. However, since the lateral devices have low power handling capability due to their thin drift layers, it is necessary to develop smart discrete power devices which have controllable high current capability. These devices are expected to be used in motor control traction and pollution-free electric vehicles for transportation. The Emitter Switched Thyristor(EST) shown in Fig.1 is the only MOS-gated thyristor structure which has been shown to exhibit wider forward biased safe operating area(FBS0A) than the IGBT[l]. This feature makes it suitable as a smart discrete output power device. However, this output device is also required to exhibit a large turn-off current capability in the so-called "hard switched' inverter without a snubber to obtain a simple and cost effective solution for the above application. This requires good reverse biased safe operation area(RE3SOA).

In this paper, the RBSOAs, at snubberless inductive load state, of 600V and 2500V EST devices will be reported for the first time and compared to those for the IGBT and M a . The dependence of the RBSOA upon the P base resistance(Rb) in the main thyristor structure of the

GATE CATHODE

? U T 4

Fig.1 Cross sectional view of the 6ooV dual channel EST structure.

EST, which affects the triggering and holding currents of the device, has also been analyzed. Furthermore, the destructive failure mechanisms as well as the configuration of the RBSOA of the EST are explained.

EST STRUCTURE AND OPERATION

A cross-section of the EST structure is shown in Fig.1. When the anode voltage is positive with respect to the cathode, this device can be turned on by the application of a positive gate bias to create a channel at the surface. Electrons from the cathode flow through the channel and via N+ floating emitter into N- drift region. This provides the base current for the PNP transistor in the main thyristor. Holes are injected from the P+ anode into the N- drift region and collected at the junction between

session 5: Thyristors 2 Paper 5.2 IEEE Cat. no. 94CH3377-9

196

the P base and the N- drift region. Prior to the main thyristor's latch-up, these holes flow beneath the floating N+ emitter into the cathode electrode. Under these condition, the device operates like an IGBT. As the current increases, the N+-P base junction of NPN transistor is forward-biased and the main thyristor latches up.

The turn-off of this device is accomplished by reducing the gate voltage below the threshold voltage of the N-MOSFET. This results in the removal of the channel for electron flow, so that the floating N+ emitter is disconnected from the cathode and the regenerative action of the thyristor is removed. In the hard switched inverter application, a high current and voltage are applied to the device at the same time during its turn-off operation, so that a wider RBSOA is required. The operation of the device is explained and the RBSOA obtained from both two-dimensional simulation and from experimental results on devices fabricated using an eight-mask DMOS process are provided below.

RESULTS AND DISCUSSION

A . 600V Device

The two-dimensional numerical simulations of the dual channel EST were carried out using MEDIC3 to verify the device physics and operation. For simplicity, the heat generation effect in the devices was not taken into account in this study. A cross section of a 600V device is shown in Fig.1. This is a punch-through type structure. The structure was chosen to have a floating N+ emitter length of 9pm, channel length of the lateral N-MOSFET of 7 p n and a gate oxide thickness of 1OOOA. An external resistance Rb of 1.3xlOSQ-pn was used to emulate the three dimensional P base resistance in the dual channel EST structure. The cell pitch size of the structure was set at 5 4 ~ . The N- drift region had a doing of l.Ox1014cm-3 and a thickness of 50p.m. These values were chosen to provide a 600V forward blocking capability. The N+ emitter and the P base had surface concentrations of 1 . 0 ~ lO2Ocm-3 and 5.0x1017cm3, respectively. The junction depths of the N+ emitter and the P base region were 1.Opm and 3.0pn, respectively. The P+ region had a surface concentration of 5.0~10%m-~ and a depth of 5.0p.m. In addition to the P base and the N+ emitter diffusion, an N- type implant with surface concentration of 3.0x1015cm-3 and a depth of 2 p n were used. A lifetime of lpsec was used in the N- drift region. The IGBT structure that was analyzed had the same impurity density and thickness for each layer as the EST except for the absence of the N+ floating region and P base layer in the main thyristor region and the difference of the gate electrode width. The cell pitch size for the IGBT was 46pm.

The RBSOA of the EST and IGBT were calculated with a snubberless inductive load circuit. This

Comparison of RBSOA (EST and IGBT) ~ 600V Devlce I Rwm Tcmv

1000,

IGBT(Von= 1.74y) 600 1 400 7

EST&,=6.5* ~ d n - ~ m ; Von= I .mv) i

200

i 0 '

0 100 200 300 400 500 600 700 800 900 Voltage(V)

Fig2 Calculated RBSOAs of the 6OOV EST and IGBT. Von shown in this figure means the on-state voltage drop at current density of

3ooA/cm2. Gate ramp time from +15V to -15V is l0nsec.

Comparison of RBSOA (EST and IGBT) 20 600V Den=

RoomTcmp. I I

t

0 100 200 300 400 500 600 700 800 900 Voltage(\?

Fig.3 Measured RBSOAs of the EST and IGBT.

197

circuit was assumed to have an infinite load circuit. The on-state voltage drop of the free wheeling diode was neglected when the anode voltage of the device was clamped by a power supply voltage. A gate resistance was set at 25r;2-cm2 for the EST and IGBT gate charge/discharge circuit.

For comparison with simulations, 15Omilx 15Omil ESTs and IGBTs with 6OOV forward blocking capability were designed and fabricated using an eight- mask DMOS process. The devices were fabricated using 4 1 l>-oriented wafers with a P+ substrate(0.02sz-cm), an epitaxial buffer layer(0Sa-cm,lOpm), and an N‘ epitaxial layer(32sl-cm, 50pn) as starting material. These devices had an N+ floating emitter length of 2 0 ~ . N- accumulation length of 3 p , lateral n-channel MOSFET channel length of 2 ~ , and channel width per unit cell of 4 O O p . The junction depths for P base and P+ region, gate oxide thickness and JFET implant surface concentration were the same as the values used in the simulation, The devices had an edge termination consisting of three floating field rings with field plate, which results in a forward blocking voltage in excess of 600V

Fig.2 exhibits the calculated results of the RBSOA’s dependence upon the P base resistance(Rb) in the main thyristor structure of the EST, which affects the triggering and holding currents of the device. The RBSOA of the IGBT is also shown in this figure for comparison. When comparing the RBSOAs between the EST and IGBT, there are two distinct region: one is due to the voltage-induced avalanche multiplication in the presence of high current density in the depletion region; the other is attributed to the current-induced latch-up of the parasitic thyristor[l], [2]. The experimental results of RBSOA of the EST and IGBT, measured using a specially designed non-destructive tester, are depicted in Fig.3. As can be seen from Figs.2 and 3, the experimental results are in qualitatively agreement with the calculated ones for Rb values of 6.5x105~-pm and 1 . 3 ~ 1 0 ~ ~ - p . Furthermore, it is found that, when the Rb is set at 2.2xlO~sz-p, the RBSOA of the EST can supersede that of the IGBT by approximately 20% despite its lower on-state voltage drop. Based upon these results, it can be concluded that the current-induced RBSOA and the on-state characteristic of the EST can be improved simultaneously over that of the IGBT with the smaller cell pitch size by choosing the Rb properly. This is because the P base region in the main thyristor structure works effectively as a bypass for the hole current flow with the proper Rb, so that a smaller hole current flows underneath the N+ emitter region of the EST parasitic thyristor. This can be clearly observed in the simulations performed with the two Rb values as shown in Fig.4.

On the other hand, the voltage-induced RBSOAs are identical for all the cases because the P base region in the main thyristor structure of the EST does not alter the electric field distribution at the P+/N- drift junction in the parasitic thyristor structure where the maximum avalanche generation takes place.

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(a) Rb=2.2x105n-J.Lm

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0 Distancebm) 23.5

Fig.4 Hole current flow vestors at gate voltage Vg=OV. Total current density is set of 300A/cm2.

198

B . 2500V Device

A cross-section of a 2500V device is shown in FigS. This is non-punch-through type structure. The structure was chosen to have a floating N+ emitter length of 9pm, channel length of the lateral N-MOSFET of 7pm and a gate oxide thickness of 600A. An external resistance Rb of 4.5x105n-pm was used to emulate the three dimensional P base resistance in the dual channel EST structure. The cell pitch of this structure was set at 54pm. The N- drift region had a doping of 4 .0~10l~cm-~ and a thickness of 442pm. These values were chosen to provide a 2500V forward blocking capability. The N+ emitter and P base had surface concentration of 1.Ox1020cm-3 and 5 . 0 ~ lO17cm-3, and the junction depths of the N+ emitter and the P base region were 1 . 0 ~ and 3.0pm, respectively. The P+ region had a surface concentration of 5.0xlO%m-3 and a depth of 5p.m. In addition to the P base and the N+ emitter diffusion, an N-type implant with surface concentration of 5.0xlO%m-3 and a depth of 2p.m was used. A lifetime of lopsec was used in the N- drift region. The IGBT structure in this analysis has the same impurity density and thickness for each layer and the same cell pitch size as the EST except for the absence of the N+ floating region and P base layer in the main thyristor region and the difference of gate electrode width. In the MCT structure, the same doping density and thickness of P+ anode and N' drift regions are also used except for a deeper P base and N+ emitter regions of 9pm and 1 . 5 ~ , respectively.

The RBSOAs of the EST, MCT and IGBT were calculated with a snubberless inductive load circuit. The circuit for this analysis was the same as for the 600V devices. A gate resistance of 25n-cm2 for the EST and IGBT and On-cm2 in the MCT was used for the gate charge/discharge circuit. Fig.6 exhibits the RBSOA's comparison between the EST, MCT and IGBT. As described in the analysis of 600V device, there are two distinct region in the RBSOA configuration. Fig.7 shows the avalanche generation rate distribution for the EST when the anode voltage is set at 2257.8V and the anode current density is set at lOONcm2. The maximum generation rate(Gmax) appears at the point of P+ base/N- drift junction. The calculated field strength at the point is 2.45xlWV/cm while that for the IGBT was found to be 2.48x105V/cm at the anode voltage of 2280.2Y and the anode current density of lOOA/cmZ. From these results, it is clear that the P base region in the main thyristor structure cannot relax the field strength at the point of P+ base/" drift junction.

On the other hand, the RBSOA limit for the EST which is determined by latch-up is wider than that of the IGBT. When the anode current of lOOA/cm2 is turned off in the EST, hole current density of 43.OA/cm2 flows from the P base in the main thyristor structure to the cathode electrode through the external resistance R b just after the gate voltage is reduced below the threshold voltage. This means that the 43.0% of hole current is bypassed through the P base region; as a result, the latch-

GATE CATHODE

9 U T E R 4

r

b ANODE

Fig.5 Cross sectional view of the 25OOV dual channel EST structure.

Comparison of RBSOA (EST, MCT and IGBT) 500 25OOV Device

I 400 : Room Temp.

0 0 500 1000 1500 2000 2500 3000

V o l t a g e 0

Fig.6 Calculated RBSOA of the 2500V EST, MCT and IGBT. Gate resistance is set of 25n-cm2 in EST and IGBT and On-cmz in MCT.

Gate ramp time from +15V to -15V is Ionsec.

199

up immunity of the parasitic thyristor improves as shown in Fig.6.

Meanwhile, the maximum turn-off current of MCT is determined mainly by the resistance of the integrated off-channel MOSFET, so that minimizing the channel length is one important issue to optimize the turn- off performance[3]. However, in spite of the fact that the off-channel length was set at approximately 0.5pm in the simulations with no gate resistance, the maximum controllable current for the MCT was found to be poor as shown in Fig.6. These results are consistent with those reported in Ref.[4] but in contrast to the results reported in Ref.[S]. This is because the turn-on MOSFET in the MCT was included in each cell during our simulations to eliminate a huge turn-on power dissipation problem.

ACKNOWLEDGEMENTS

The authors wish to thank the sponsors of the Power Semiconductor Research Center for their support. The two-dimensional numerical simulaticms reported in this paper were performed by using MEDlCI provided by Technology Modeling Associates, Inc.

27 50

CONCLUSION

The RBSOAs of the 6OOV and 2500V EST devices at the snubberless inductive load state have been investigated for the first time and compared to those for the IGBT and MCT. The physical mechanisms of the destructive failure have also been identified. There are two types of the failure mechanism: one is due [to the avalanche multiplication at high anode voltages; the other is attributed to the latch-up of the parasitic thyristor at high anode currents. An important conclusion of this study is an EST which exhibits a wider current-induced RBSOA than the IGBT and MCT with a good on-state characteristic can be obtained by optimizing the Rb value while the voltage- induced RBSOAs are almost the same for ill1 devices. This is because the P base region in the main thyristor structure works as a bypass for the hole current flow but does not relax the electric field strength at the P+/N- drift junction in the parasitic thyristor structure. Also, it is found that the maximum turn-off current for the MCT degrades considerably when the turn-on MOSFET is induced in each cell.

Fig.7 Calculated avalanche-generated carrier rate for the EST at V a of 2257.8V and Ia of 100A/cmz in the RBSOA calculation. G,. implies

the value of maximum carrier generation rate in the EST.

200

REFERENCES

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E21 N.Iwamuro, A.Okamoto, S.Tagami and H.Motoyama, "Numerical analysis of short- circuit safe operating area for p-channel and n- channel IGBT's," IEEE Trans. Electron Devices, VO~.ED-38, pp.303-309, 1991.

E31 F.Bauer, E.Halder, K.Hofmann, H.Haddon, P.Roggwiller, T.Stockmeier, J.Burgler, W.Fichtner, S.Muller, M.Westermann, J.- M.Moret and R.Vuilleumier, "Design aspects of MOS-controlled thyristor elements: technology, simulation, and experimental results," IEEE Trans. Electron Devices,vol.ED-38, pp. 1605- 1611,1991.

~41 M.Stoisiek, K.G.Oppermann and R.Steng1, "A 4OO-A/2000-V MOS-GTO with improved cell design," IEEE Trans. Electron Devices,vol.ED- 39, pp.1521-1528, 1992.

151 H.Lendenmann, H.Dettmer, U.Knmbein, W.Fichtner, F.Bauer and T.Stockmeier, "Approaching homogeneous switching of MCT devices: experiment and simulation," in Proc. Int. Symp. on Power Semiconductor Devices andICs,1993, Abstr.3.3, pp.71-76.