©hdp user group international, inc. proprietary 1 bmps (board-mounted power supply) modules...
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©HDP User Group International, Inc. Proprietary
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BMPS (Board-Mounted Power Supply) ModulesDefinition Stage Project
Update May 18, 2011 Shenzhen, PRC
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Overview of BMPS ProjectsBMPS Project Overview
• Board Mount Power Supply (BMPS) Application Guideline, version 1.0 (2007)– The first edition was released 3 years ago. It was a ”best practices
paper” based on the known technology at that time.
• Board Mount Power Supply (BMPS) Application Guideline, version 2.0 (2010)– The second edition is complete and published. It updates the first
edition with current best practices.
• Board Mount Power Supply (BMPS) Modules– This project will focus on features, practices and processes on and
surrounding BMPS modules with respect to their assembly to PWBs. – The results of this project may be inserted in the BMPS Guideline
third edition.
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Objectives
The objective of the project is to:
• Identify the key design / manufacturability issues and opportunities with a focus on assembly
• Demonstrate the feasibility, accessibility, and reliability of select module-PWB interconnect features.
• Issue guidelines on PWB layout for BMPS that will aid in assy.
– Pad configurations, etc.
• Issue guidelines for automated handling of BMPS– Pick and place nozzles, grippers etc.Issue guidelines for
automated handling of BMPS– Pick and place nozzles, grippers etc.
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Opportunity / Challenges
Technology changes and manufacturingexpectations have uncovered issues regarding theuse of modern high-current BMPS modules
1. Lead-free soldering• Hole-fill on critical connections is routinely below targets.• Manage critical temperatures across different components • Energy Efficiency is an industry Priority
2. Surface Mount BMPS Modules• Opportunity to eliminate wave solder process
3. Reliability of select “QFN” and CSP BGA packages/attaches
4. Handling Automation• Desire to eliminate hand loading of BMPS modules• Desire to obviate hand soldering and touch-up
5. Currents are increasing• Different interconnect scheme needed• Interconnect scheme is at root of other issues of greatest
interest.
- Power brick pin-thru hole-fill is routinely below target in “real life”.
- IPC-A-610DC Telecom Addendum 7.5.5.1 reducing PTH solder fill to minimum pin-wetted length within barrel of 0.047”
- This “helps” – in terms of pure workmanship standards acceptability - but is a small, incremental change.
-This does not change our motivation for hole-fill optimization.©HDP User Group International, Inc.
Proprietary5
Brick Hole-Fill
Brick Hole-Fill
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Example: hole-fill below class2 minimumOn “real product” assembly qualification.
Note: good thermal relief, OK pin-hole clearance,Poor(?) thermal inertia(no gnd plane annular rings)
Fill
Fill
PCB Thickness
Brick Hole-Fill
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Example: hole-fill below class2 minimumOn “real product” assembly qualification.
Note: good thermal relief, good pin-hole clearance,Poor(?) thermal inertia(no gnd plane annular rings)
Brick Hole-Fill
• Intent of BMPS Hole-Fill focus is to complement/supplement HDP Cu-Dissolution / Hole-Fill Project.
• Comparison of BMPS feature complements to Cu Erosion
• Work from / confirm / extend findings of other hole-fill work.
Cu-Dissolution vs. BMPSCu-Dissolution vs. BMPSCu-Dissolution/Hole-Fill• Optimize hole-fill vs. Cu-dissolution
• Measures:
– Hole-fill
– Cu Thickness Remaining
– Cu Dissolution Rate
• Component Types:
– DIMM sockets
– Capacitors
– ½ Brick Power Module
• 0.130” thick board
– 12 layers: 4x 1oz + 8x 2oz
• Variables
– Solder Alloy
– Wave Type
– Solder Temp
– Contact Time
– Plane connections / Thermal Relief
– Pin to hole clearance
BMPS
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• Optimize BMPS interconnect to/through PCB
• Measures:
– PTH Hole-fill
– SMD Thermal/Shock/Vibe Reliability
– Functional (Interconnect)Performance
• Component Types:
– PTH ½ Brick Power Module
– SMD ½ Brick Power Module
– SMD Large LGA Power Module
• 0.140 → 0.180 thick board desired
• 12 layers: 4x 1oz + 8x 2oz
• Variables
– PTH Gas-vent / No Gas-vent
– PTH Lead- length
– PTH thermal relief
– SMD interconnect type
– SMD footprint
– Via configurations
Pin-to-Hole Clearance vs FillPin-to-Hole Clearance vs FillHolistic ViewHolistic View
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Courtesy of Celestica, Thilo Sack
Thermal Relief & Other FactorsThermal Relief & Other Factors
©HDP User Group International, Inc. Proprietary
11Courtesy of Celestica, Thilo Sack
Thermal Relief & Other FactorsThermal Relief & Other Factors
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12Courtesy of Celestica, Thilo Sack
Anomaly: “Entry effect”(leading position on pcb w.r.t. reflow)superceding thermal relief as fill driver(inhibitor)
Fill generally following thermal relief.
CURRENT DENSITY – POWER PLANE - .083” BRICK PIN HOLE W/ 4 SPOKE - 2OZ PLANE - DISTRIBUTED VIA TO TOP&BOTTOM - 100 AMP ~POINT LOAD
BMPS PTHBMPS PTH
CURRENT DENSITY - TOP&BTM - .083” BRICK PIN HOLE - 2OZ PLANE - DISTRIBUTED VIA TO TOP&BTM - 100 AMP ~POINT LOAD
BMPS PTH BMPS PTH
BMPS PTHBMPS PTH
• Fill: Gas Venting vs No Gas Venting
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Woosh
!
BMPS PTHBMPS PTH• Fill vs Thermal Relief Variations
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Plane Disconnect
Spoke Reduction
Spoke Narrowing
Radial/Distributed Via
Targeted fo
r DOE
Targeted fo
r DOE
BMPS PTHBMPS PTH
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- Fill vs Lead Protrusion
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- PTH(Pin-Through-Hole) power bricks are “the” remaining impediment to the elimination of wave solder process.
- True for many assemblies. True for enough sectors of product to pursue aggressively for the sake of process elimination; cost-reduction, manufacturing lead-time, simplicity.
- PTH power connection is familiar, feels robust, well characterized. However, it is a mfg process weak point.
- SMD solutions are on the market, but limited.
-Simple conversions have been applied.
SMT BMPS
Brick SMT Attach VariantsBrick SMT Attach Variants
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Pedestal Leg w/ Ball
Pure Post
LGA
Brick SMT Attach VariantsBrick SMT Attach Variants
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PTH – NO VENT
PTH – WITH VENT
SMT - PURE POST
PTH – LONG, WITH VENT
SMT - PEDESTAL&BALL
BMPS BMPS
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- BMPS DOE
Test Vehicle Details - NominalTest Vehicle Details - Nominal
• Bricks – 30A or greater
• 0.140 - 0.180” Thick
• 12 Layer w/ 2oz & 1oz
• ENIG or ENIPIG Finish
• Larger PCA
• Multiple SMT sites
• Multiple PTH sites
• Dual PTH / SMT site
• SAC305
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Test Vehicle Details - NominalTest Vehicle Details - Nominal
• Assembly
• Rework(Multiple)
• Shock & Vibe
• ATC
• Xray
• X-section
• Dye & Pry
• Electrical Performance
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Test Vehicle ResourcingTest Vehicle Resourcing
• Brick PTH Vented - $ Re-quoting to Emerson
• Brick PTH Un-Vented - $ Re-quoting to Emerson
• Brick SMD Pedestal+Ball - $ Re-quoting to Emerson
• Brick SMD Pure Post - $ Re-quoting to Emerson
• Brick SMD LGA - $ Re-quoting to Emerson
• Design - Juniper Networks
• PCB - Meadville
• Assembly - ?
• Test - ?
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February 2011Suggested Next Steps
1. Window until May Shenzen Meeting to gather new user/supplier participant
input.
2. Complete modeling / design / tape out the test vehicle.
3. Complete resourcing the Test Vehicle
4. Build / Test / Results
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Target Schedule
Project Task When Complete Actual
Project start in definition stage 01/03/09 Date/Month/YY
Project start in implementation stage 05/18/11 Date/Month/YY
Collect knowledge and experience of existing solutions
Ongoing Date/Month/YY
Define a preferred solution, experimental work, if needed etc
05/18/11 Date/Month/YY
Issue a project report 09/07/11 Date/Month/YY
Assemble information for the BMPS Guideline 10/07/11 Date/Month/YY
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Project Participants
System Integrators• Juniper Networks , Leif Hutchinson, Project leader• Tekelec, Tony Cosentino• Oracle(Sun), Livia Hu, Michael Freda • Alcatel, Joe Smetana • IBM, Jim Wilcox • (Ericsson – Joining Soon?)• (Huawei – Joining Soon ?)
Suppliers• Emerson, KK Chin• TDK/Innoveta Randy Heinrich• Nihon Superior Keith Howell• (Ericsson – Joining Soon ?)
Facilitator• HDP User Group Staff, Jack Fisher
End – Thanks!
End.
Thanks !