heteroepitaxy and selective area heteroepitaxy lourdudoss/menu...inp seed elog inp...
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Sebastian Lourdudoss
Laboratory of Semiconductor Materials
Department of Materials and Nano Physics
School of Information and Communication Technology
KTH, Electrum 229, 164 40 Kista, Sweden
Heteroepitaxy and selective area heteroepitaxy of III-V compounds on silicon for
silicon photonics
1ADOPT Winter School, Romme, 2014
• Photonic Integrated devices for information highway– Background
• Photonic integration on silicon - Silicon photonics
• Hybrid integration approaches for integrating III-Vs on Si
• Heteroepitaxy and Selective Area Growth : Challenges
• Monolithic Approaches for integrating III-Vs on Si
• QW growth on InP/Si
• Templates for site controlled QD growth
• Summary and conclusions
Outline
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Background
The information highway used to look like this…
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Background
…But now it looks like this
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Background
But then,
people started to…
…have video conferences…
…play online games…
…stream high‐definition movies 5From Carl Junesand
Background
Computer trends
• multi‐core processing– dual, quad etc.
• Continuing shrinkage– gate length 14 nm
• higher transfer speed– HDMl, USB 3.0 etc.
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Copper drawbacks:
– Slow
– Crosstalk
– High power consumption
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Novel area: Silicon PhotonicsMarriage between electronics and photonics
Electronics Data processing
Photonics Data communication
Instrumental for the emerginginformation society. Numerousapplicationspresentlypenetrating all parts of our every-day life.
Silicon-PhotonicsParadigm shift, with major implications
IEEE Spectrum Aug. 2002
Silicon photonics for overcoming the interconnect bottleneck
Intels 50 G Silicon photonics links: Silicon transmitter – receiver system
Mario J. Paniccia, “A perfect marriage: Optics and silicon,”_Optik & Photonik , May 2011 No. 2 , p34.
IBM vision on siliconphotonic chip
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Photonic Integration –Optical Arbitrary Waveform Generation
(OAWG)
Monolithic InP 100-Channel x 10-GHz Device for Optical Arbitrary Waveform Generation, IEEE Photonics Journal, Volume 3, Number 6, 2011
Collaboration:
Background• Why Si?
+ Foundation of the CMOS industry
+ 50 years of process optimization
+ Huge economics of scale
• Si wafers → >100 chips on one wafer
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Strengths and weaknesses of silicon
• Excellent processing on very large areas (12” wafer today)
• High density integrated electronics
• SiO2 renders Si an excellent material for electronics
• SiO2 also renders Si an excellent waveguide
• Photodectectors (e.g., Si‐Ge), modulators (e.g., EO polymers
But no light emission!
Solution = III‐Vs on Si!
But……..
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Jack Kilby’s integrated circuit at Texas Instruments in 1958 by ”bonding”
Nobel prize in 2000
Integration path in electronics
Intel’s Poulson Itanium Processor in 2012: • 32‐nanometer process• 3.1 billion transistors • 544 mm2
=> ~ 0,5 billion transistors/cm2
http://www.theregister.co.uk/2011/08/22/intel_poul13
Integration path in silicon photonics
Same approach as that of Kilby’sin 1958!
But a goodstarting point!
Monolithic approach through heteroepitaxy more flexible
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Above‐IC silicon photonics and III‐V/SOI integration scheme
L. Grenouillet et al., Hybrid Integration for Silicon Photonic Applications, Opt. Quant. Electron. (2012).
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Heterogeneous photonic integration and opticalvertical interconnect access
Qian Wang et al., Heterogeneous Si/III‐V integration and the optical vertical interconnect access, Optics Express, 2012. 16
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Heteroepitaxy and Selective Area Heteroepitaxyfor Silicon Photonics
Heteroepitaxy: Growth of dissimilar materials often with large lattice mismatch
Selective area heteroepitaxy: Heteroepitaxy conducted selectively on open areas only
Problems:
Dislocations, line defects, planar defects, anti phase domain etc
Concepts: mismatch
• What is mismatched materials?
• Different lattice constant a1 ≠ a2• Different thermal expansion coefficient α1 ≠ α2
a1
a2
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Concepts: dislocations
• Line defect
• comes in two types:– Edge: Burgers vector & line vector perpendicular
– Screw: Burgers vector & line vector parallell
• May also be a mix between both19
Concepts: misfit dislocations• a1 ≠ a2
– If no relaxation: strain f =(a2 – a1)/a1– Compressive or tensile strain
– Complete relaxation: dislocations!
a2
a1
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Concepts: stacking faults• In FCC lattice, stacking follows ABCABC… along {111} planes
• Insertion of an extra C plane causes an intrinsic fault
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A
C
B
C
A
C
B
A
Faulty plane
Concepts: Antiphase Boundary
• Atomic steps may introduce Antiphase Boundary
• By off‐cutting with diatomic steps, antiphase boundary removed
[001]
Si substrate
Compound layer
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APB
Antiphase Boundary or Inversion Domain Boundary or Anti-phase Domain in heteroepitaxy
InP on Si?
Courtesy: Wondwosen Metaferia
Monolithic approaches for III-Vs on Si
Ge seeded growth
App. Phys. Lett. 97, 121913 (2010)
III-VsMetal catalysed nanowire growth
FIB activated growth
App.Phys.Lett. 97, 12 17 (2001)
III-V Quantum dots on Si
J. Nanophotonics, 3, 031602 (2009)
Conformal growth
Appl. Phys. Lett. 68 ,19(1996)
S.Lourdudoss, Current Opinion in Solid State and Materials Science, 16, 2(2012)91-99 24
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Monolithic approaches for III-Vs on Si
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Monolithic approaches for III-Vs on Si
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Monolithic approaches for III-Vs on Si
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J.Yang, P. Bhattacharya, Integration of epitaxially-grown InGaAs/GaAsquantum dot lasers with hydrogenated amorphous silicon waveguides on silicon. Optics Express 2008; 16:5136-5140.
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Monolithic approaches for III-Vs on Si
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Monolithic approaches for III-Vs on Si
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Schematic view of InP grown from SiO2 trench on Si through Ge seeding. The bottom picture of the rrepresents the created atomic steps on Ge
for avoiding APB’s.From: G. Wang et al., J. Electrochem. Soc.
2011; 158: H645-H650.
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Monolithic approaches for III-Vs on Si
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Lattice matched growth
Liebich et al, Appl. Phys. Lett. 99, 071109 (2011)
Monolithic approaches on Silicon
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Si-Ge-Sn on Silicon
Yijie Huo, Strained Ge and GeSn band engineering for Si photonic integrated circuits, Ph.D. Dissertation, 2010; Stanford University, USA. (http://snow.stanford.edu/thesis/Huo.pdf)
R.A.Soref, C.H.Perry. Predicted band gap of the new semiconductor SiGeSn. J. Appl. Phys. 1991; 69:539-541.
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Monolithic approaches on Silicon
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Monolithic approaches on SiliconIII-Sb on Si
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• AlSb buffer layer on Si => absence of vertically penetrating threading or screw dislocations
• N.B.!!! Large mismatch of 13%!• AlSb grown on Si initially consist of a crystalline AlSb QD ensemble
• =>coalesces into bulk material where the strain is reduced by crystallographic undulations, which relieve strain
Ref.: G.Balakrishnan et al., Appl. Phys. Lett. 2005; 86: 034105.
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Monolithic approaches on SiliconIII-Sb on Si
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J.R.Reboul et al., APL, 99,121113(2011)
CW operation of 2 µm laser @ RT Pulsed operation of 1.55 µm laser @ 90 K and RT
L. Cerutti et al., IEEE Photon. Technol. Lett., 22, 533 – 535, 2010.
Selective Area and Epitaxial Lateral Over Growth( S. Naritsuka et al., Jpn. J. Appl. Phys., 34(1995) L1432-35)
SiO
2m
askPrinciple of ELOG
InPELOG
ELOG InP on Si from nano-openings
InPELOG
SiO2
mask
ELOG InP on Si from μ-openings
• Y.T Sun and S. Lourdudoss, Proc. of SPIE, Vol. 4997 (2003)
• F. Olsson et al., Journal of AppliedPhysics (2008).
• C. Junesand et al., 22nd Int. conf. on Indium Phosphide and Related Materials, 2010, Kagawa, Japan, 22nd IPRM Conf. Proc., 232-235.
• W. Metaferia et al., Journal of Crystal Growth, vol. 332, pp. 27-33 (2011).
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Heteroepitaxy: Advantages of ELOG
• Overcomes problems associated with 8% lattice mismatch of InP on Si: misfitdislocations
• Potential for high quality InP on SiGrow large size InP on Si wafers for volume productioneven for InP based devices
• Enables monolithic growth of InP lasers on siliconNo costly InP substrates
• Si/SiO2 waveguide as the mask in ELOGCoupling of Si/SiO2 waveguides with InP devices feasible
Patents:1. S. Lourdudoss and F. Olsson, Semiconductor heterostructures and manufacturing thereof, US patent 2012.2. C. Junesand and S. Lourdudoss, Active photonic device, US Patent 2012.
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Planar defect studies of ELOG InP/Si
1. Carl Junesand et al., Optical Materials Express, Vol. 3, Issue 11, pp. 1960‐1973 (2013) http://dx.doi.org/10.1364/OME.3.0019602. Carl Junesand et al., Mater.Express,Vol.4(1), 41‐53, 2014, doi:10.1166/mex.2014.1140
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On InP (ref)
On Si
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Si
InP seed
ELOG InP
Photoluminescence of multi quantum welllaser structure
On InP(ref)
On Si
Big step Towards Integration Of InP laser on Silicon Collaboration: Intel (USA) and John Bowers, UCSB
Multi quantum well laser on Si fabricated in Electrum Lab
1. Z. Wang et al., Materials Science and Eng. B, 177(17), 1551‐1557 (2012), http://dx.doi.org/10.1016/j.mseb.2011.12.006.2. H. Kataria et al., Semicond. Sci. Technol. 28, 094008, 2013; doi:10.1088/0268‐1242/28/9/0940083. H. Kataria et al., IEEE JSTQE, 20(4), 8201407, 2014; doi:10.1109/JSTQE.2013.2294453
dx.doi.org/10.1021/nl402815v, Nano Lett. 14, 37‐43 (2014)
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Multi quantum wells of InP/InGaAsPon silicon
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Himanshu Kataria et al. IEEE JSTQE, 20(4), 8201407, 2014; DOI: 10.1109/JSTQE.2013.2294453.
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KIC InnoEnergy | Boosting Innovation for Sustainable Energy | Speaker: Yanting Sun 43
- Si subcell for 1.0eV band photon
absorption: CPV efficiency >50%
- Tandem solar cell on Si: cost
saving: 70%
High efficiency tandem solar cell on silicon substrate with mass
production compatibility
PI: Yanting Sun
Si substrate
Si subcell (1.1 eV)
Subcell 1.4eVSubcell 1.8eV
New start-up company TANDEM SUN AB
Direct interface of InP on Si
Picture removed (not yet
published)
Hybrid bonded QD lasers on Si
K.Tanabe et al, III-V/Si hybrid photonic devices by direct fusion bonding, Scientific Reports, 2012.
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Growth of QDs
Control of SITE, SIZE, SHAPE and DENSITY
Direct growth of QDs on the substrate= requires high resolution
patterning
Pyramidal frustum > QDs
Patterning- NIL, OL…
PF
QD
On InP: Appl. Phys. Lett. 91, 243106 (2007), Appl. Phys. Lett. 94, 143103 (2009)
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Growth of InP Nanopyramidal Frusta (NPF)
Aixtron HVPE reactor @ KTH
Nanoimprinted holes on InP substrate
Growth conditionGrowth T=5900C, Time 2.5 min, V/III=10, Sulphur doped InP
Circular hole openings in SiO2 on InP(seed)/Si
D=300 nm and S= 500 nm ( main focus of thispresentation)
Soft UV-Nanoimprint Lithography
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D=120nm, S=180nm
D=200 nm,S=300nm
D=300nm,S=500nm
Growth of InP NPF
InP NPF grown from different diameter and spacing of hole openings in the oxide mask 47
RT-Cathodoluminescence Studies
CL measurement done at Laboratory of Thin Film Physics, Linköping University, 581 83 Linköping, Sweden (Galia Pozina and Lars Hultman )
NPF show brighter compared to the InP seed layer Defect filtering involved epitaxial necking effect and reduced area growth The CL spectra from NPF is 15 times stronger, blue shifted and broader
CL-spectra of NPF on Si0.5 μm0.5 μm
SEM Panchromatic CL
1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.80
5
10
15
20
25
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CL
-Int
ensi
ty (
a.u)
Photon energy (eV)
NPF InP(seed)/Si
(b)
SEM (left) and (P-CL) images of the NPF on Silicon substrate
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InP on Si
1. W. Metaferia et al., Phys. Status Solidi C, 1–4 (2012) / DOI 10.1002/pssc.2011006782. Position paper on nanophotonics and nanoelectronics, Nanonewsletter, no. 24, Dec. 20113. W. Metaferia et al., RSC CrystEngComm, Accepted for publication (2014)
SEM micrographs of InP nanopyramids grown on InP precoated Si substrate
SEM and Panchromatic CL images of InPnanopyramids grown on InP precoated Si
substrate
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Site controlled quantum dots on Si on Nanoimprinted patterns
Collaboration: KTH + ORC, Tampere University of Technology + Linköping University
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HeteroepitaxialMaterials Systems
Advantage(s)Operating
wavelength of light sources
Challenges CMOS compatibility
Suitability for large volume production
Lattice matched/graded materials on Si
Thin buffer layer on Si for facile integration with Si
Good thermal dissipation
So far < 1.2 µm.
Localised growth/Growth on non‐planar silicon wafers for integration.
Lasing wavelength beyond 1.3 µm
Feasible for silicon photonics
Electronics –photonics integration not yet available
Good
III‐Sb on Si Also useful for long wavelength detectors
Good thermal dissipation
1.5 µm and beyond
Localised growth/Growth on non‐planar silicon wafers for integration
Control of 90o
dislocations Thin buffer layers for
facile integration with Si
‐do‐
Good
QDs on Si Low lasing threshold and high temperature stability
Good thermal dissipation
Mostly ~1 µm; recently ~1.3 µm
Thin buffer layers for facile integration with Si
CW laser operation at RT and above at wavelengths >1.3 µm
‐do‐Good
GeSiSn on Si Lattice and thermal matching feasible for laser, detector and modulator structures.
Growth at relatively low temperature
Good thermal dissipation
Potential for 1.5 µm
Materials issues on adequate Sn solubility in Si‐Ge for bandgap engineering
Feasible for silicon photonics
Electronics –photonics integration feasible
Good
S.Lourdudoss, Current Opinion in Solid State and Materials Science, 16, 2(2012)91-99
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HeteroepitaxialMaterials Systems Advantage(s)
Operating wavelength of light sources
Challenges CMOS compatibilitySuitability for large volume production
ELOG of InP Perfect template for growing lattice matched InGaAsP for lasers, detectors and modulators
Waveguide structure can be used as defect filtering mask and at the same time for coupling light
Adequate thermal dissipation
1.3 µm and 1.5 µm
Necessity of good seed layer.
Complete elimination of coalescence defects
Device design topography for ELOG on certain specific titled angle of the mask openings
Feasible for silicon photonics
Electronics –photonics integration not yet available
Good
SAH of InP in Si trenches
Perfect template for growing lattice matched InGaAsP for lasers, detectors and modulators
Ideal for integration with silicon devices at same horizontal level
Adequate thermal dissipation
1.3 µm and 1.5 µm
Enlarging the growth area by lateral growth above the trench level
Complete elimination of APBs
Feasible for silicon photonics
Electronics –photonics integration not yet available
Good
Bonding Flexible Thin buffer layer and
good integration strategy with Si photonic circuits
Any desirable wavelength
Very large scale integration
Uniformity, reproducibility and reliability in wafer and die bonding
Adequate thermal dissipation
Feasible for silicon photonics
Electronics –photonics integration feasible
Moderate
S.Lourdudoss, Current Opinion in Solid State and Materials Science, 16, 2(2012)91-99
Epiclarus AB
• Active 2012‐
• Co‐founders:– Carl Junesand, CEO
– Bo Hammarlund, VP marketing and sales
– Sebastian Lourdudoss, senior scientist
• Innovation and Product:– Semi‐insulating regrowth for photonic integration and Quantum Cascade Lasers (~ 15 µm deep mesas)
– Templates of III‐V on Si
– InP on Si for Si Photonics
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Tandem Sun AB
• Tandem Sun AB‒ Active: 2013‐‒ KTH Innovation‒ EIT‐KIC InnoEnergy partner
• Innovation and product‒ High efficiency multi‐junction solar cell on silicon substrate
(SiMJSC)• Founders
‒ Professor Sebastian Lourdudoss‒ Dr. Yanting Sun
• Technology‒ Coherent III‐V/Si heterojunction‒ PCT/SE2013/050355
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Summary and Conclusions
• Need for heterogeneous integration of InP on Si felt by big actors
• Monolithic integration is more flexible
• QW growth on Si ‐ promising
• Site controlled growth of InP based QDsfeasible even on Si
• Need for more technological developmenttowards monolithic integration with respectto hybrid integration
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Acknowledgements• Wondwosen Metaferia , Himanshu Kataria• Dr. Carl Junesand, Dr. Fredrik Olsson• Dr. Yanting Sun• Prof. Lech Wosinski, Fei Lou and
Dr. Zhechao Wang (Univ. Ghent), Prof. Lars Thylén
• Prof. Tapio Niemi and Prof. Mircea Guina, ORC, Tampere, Finland
• Dr. Galia Pozina and Prof. Lars Hultman, Linköping University• Prof. John Bowers, UCSB• Dr. Hyundai Park and Dr. Hai‐Feng Liu, Intel
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