hx8347-d t an preliminary v01 081114aitendo3.sakura.ne.jp/aitendo_data/product_img/lcd/tft...39...

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( DOC No. HX8347-D(T)-AN ) HX8347-D(T) 240RGB x 320 dot, 262k color, with internal GRAM, TFT Mobile Single Chip Driver Preliminary version 01 September, 2008

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( DOC No. HX8347-D(T)-AN )

HX8347-D(T) 240RGB x 320 dot, 262k color, with internal GRAM, TFT Mobile Single Chip Driver Preliminary version 01 September, 2008

-P.1- Himax Confidential

Sep, 2008 This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

1. MPU mode Reference FPC Circuit and Initial Code . ................................................................................ 4

1.1 CMO.................................................................................................................................................... 5 1.1-1CMO 2.6”Reference FPC Circuit ................. .................................................................................. 5 1.1-2 Initial Code for CMO 2.6” .................... .......................................................................................... 6 1.1-3 CMO 2.0” 2.2” 2.4” 2.8” Reference FPC Circuit .........................................................................11 1.1-4 Initial Code for CMO 2.0” .................... ........................................................................................ 12 1.1-5 Initial Code for CMO 2.2” .................... ........................................................................................ 17 1.1-6 Initial Code for CMO 2.8” .................... ........................................................................................ 22

2. RGB mode Reference FPC Circuit .................. ......................................................................................... 27 2.1. Initial Code for Reference .................... ......................................................................................... 28

3. OTP Programming ................................. .................................................................................................... 30 4. Revision History ................................ ........................................................................................................ 31

HX8347-D(T) 240RGB x 320 dot, 262k color, with Internal GRAM, TFT Mobile Single Chip Driver LLLList of ist of ist of ist of ContentsContentsContentsContents Sep, 2008

-P.2- Himax Confidential

Sep, 2008 This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

Figure 1. 1The HX8347-D MPU Application Reference Circuit........................................................ 4 Figure 2. 1 The HX8347-D SPI+RGB Application Reference Circuit............................................. 27

HX8347-D(T) 240RGB x 320 dot, 262k color, with Internal GRAM, TFT Mobile Single Chip Driver LLLList of ist of ist of ist of FigureFigureFigureFigure Sep, 2008

-P.3- Himax Confidential

Sep, 2008 This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

Table 3. 1 OTP ADDRESS MAPPING ........................................................................................... 30

HX8347-D(T) 240RGB x 220 dot, 262k color, with Internal GRAM, TFT Mobile Single Chip Driver LLLList of ist of ist of ist of TableTableTableTable

Sep, 2008

-P.4- Himax Confidential

Sep, 2008 This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

1. MPU mode Reference FPC Circuit and Initial Code

NR

ES

ET

NR

D_E

DN

C_S

CL

NW

R_R

NW

3. The input pin must be fixed IOVCC or GND when no use. Refer to "Pin Description". NC

S

VC

L

DD

VD

H

C3

1P

VG

L

VG

H

C3

1N

VR

EG

1

VC

OM

VC

OM

L

VC

OM

H

VD

DD

TE

IM0

IM1

IM2

OS

C

DNC1DNC

VCOM1VCOM

NCS1NCS

VDDD1VDDD

NWR_SCL1NWR_SCL

VG

H

VTEST1VTEST

DDVDH1DDVDH

IM3IM1

C08

C31NC31P

IM2IM2

VCOMH1VCOMH

U1

HX8347-D (BUMP UP)

VG

L

C1

1P

VP

P_

OT

P

HS

YN

CD

OT

CL

KD

EN

RE

SE

TN

RD

_EN

WR

_RN

WIM

3IM

2

C2

2N

DD

VD

H

C2

2P

G2

G4

G32

0

G1

G3

G31

7G

319

S1

S2

S3

S72

0S

719

S71

8

G6

G31

8

G31

5

G5

VG

H

C1

1N

CO

NN

CO

NN

VC

OM

NC

S

VS

SA

DN

C_S

CL

VS

SC

VC

I

VS

SD

VS

YN

C

DU

MM

Y27

DU

MM

Y

DU

MM

Y23

DU

MM

Y24

S26

2S

263

S36

1S

265

S26

6S

267

C2

1PC

21N

IM0

SD

AD

17

TE

ST

10D

16

D1

5T

ES

T9

D1

4D

13

TE

ST

8D

12

D1

1T

ES

T7

D1

0D

9T

ES

T6

D8

D7

TE

ST

5D

6D

5T

ES

T4

D4

D3

TE

ST

3D

2D

1D

0T

ES

T2

TE

CA

BC

_PW

M_O

UT

OS

CIO

VC

CV

DD

D

C1

2PC

12N

C3

1PC

31N

VC

L

VR

EG

1

VT

ES

T

VM

ON

I

VC

OM

H_D

UM

MY

VC

OM

L_D

UM

MY

RC

M1

RC

M0

SR

GB

SM

XS

MY

IFS

EL

VC

OM

_DU

MM

Y

IM1

TE

ST

1

CA

BC

PW

MO

UT

IM1IM3

C12P

C02 (OPEN)

C12N

TE1TE

VCOML1VCOML

VCL1VCL

NRESET1NRESET

VT

ES

T

VGL1VGL

NR

ES

ET

IOV

CC

NRD_E1NRD

VC

I

NR

ES

ET

NR

D

VREG1VREG1

NW

R_

SC

L

VGH1VGH

GN

D

OSC1OSC

240RGB x 320 TFT Panel

IM4IM0

IM3

C2

1N

C01

C2

1P

C11P C11N

VT

ES

T

C10

1- -1

IM3 IM2 IM1

8080 MCU 16-bits Parallel type II

0

0

IM0

DB

8

DB

10D

B9

DB

7

0

Interface mode

DB

12D

B11

VD

DD

00

DB

13D

B14

100

DB

15

IOV

CC

3-WIRE SERIAL INTERFACE

8080 MCU 8-bits Parallel type II

DB

17

DB

16

SD

A

TE

00

0

1 0

110

C2

2NC

22P

DB

1D

B0

DB

4D

B3

DB

2

01-

DB

6D

B5

ID

01 0 0

001

01

1

01

101 1 8080 MCU 9-bits Parallel type II

C09

8080 MCU 16-bits Parallel type I

8080 MCU 18-bits Parallel type II

8080 MCU 9-bits Parallel type I

VSSA

VSSD

IM0

IM1

IM2

IM3

GN

D

IM2

IM0

VC

I

IM1

4-WIRE SERIAL INTERFACE

8080 MCU 8-bits Parallel type I

C06

VP

P_

OT

P

C01 ( C11P/N )

C02 ( C12P/N )(Optional)

Recommended spec.Capacitor

C04 ( C21P/N )

C03 ( DDVDH )

1uF / 6.3Volt.

C06 ( VGH )

C05 ( C22P/N )

C09 ( VCL)

C08 ( C31P/N )

C07 ( VGL )

1uF / 10 Volt.

1uF / 6.3Volt.

C10 ( VDDD )

1uF / 10 Volt.

1uF / 10 Volt.

1uF / 6.3 Volt.

1uF / 16 Volt.

1uF / 25 Volt.

1uF / 6.3 Volt.

1uF / 6.3 Volt.

2. SDI pin is I/O pin. SDO is no use.

CONN1CONN1

CO

NN

1

VC

OM

LV

CO

MH

SD

A

CA

BC

PW

M

DB

11

CONN2CONN2

CO

NN

2

VS

SD

VS

SA

VS

SC

DB

13

DB

15 N

CS

DB

5

DB

9D

B8

DB

10

DB

14

DB

12

DB

7

DB

4

NW

R_S

CL

DB

3

DB

6

DB

0

DB

2D

B1

DN

C_S

CL

NR

D

DB

16 G

ND

TE

DB

17

VR

EG

1

C07

VG

L VC

L

DD

VD

H

CO

NN

1C

ON

N2

CA

BC

PW

M

VSSC

C03

C04

C21NC21P

SRGB="0" S1,S2,S3="B,G,R"

C31

P

C12

PC

12N

C31

N

SMX="0" S720->S1

RCM[1:0]="0x" MPU I/F

SMY="0" G1->G320

CA

BC

PW

M

PWMPWM

VP

P_O

TP

VPP_OTP1VPP_OTP

IFSEL="0" REGISTER-CONTENT INTERFACE

DN

C_S

CL

C05

8080 MCU 18-bits Paralle type I

C22P

NC

S

GND1GND

GND2GND

J1

FPC60-0.5-4.0L

VC

I1

VC

I2

GN

D3

VC

C4

IOV

CC

5

nRE

SE

T6

DB

1713

DB

1614

DB

1515

DB

1416

DB

1317

DB

1218

DB

1119

DB

1020

DB

921

DB

822

DB

723

DB

624

DB

525

DB

426

DB

327

DB

228

DB

129

DB

030

nRD

_E

31

NW

R_R

NW

32

DN

C33

nCS

34

FLM

35

GN

D36

PW

M_O

UT

37

VS

YN

C38

HS

YN

C39

DO

TC

LK

40

EN

AB

LE

41

SD

O42

SD

I43

NC

44

NC

45

NC

46

NC

47

NC

48

NC

49

NC

50

NC

51

EX

TC

52

DB

S53

IM3

54

IM2

55

IM1

56

IM0

57

GN

D58

BL+

/NC

59

BL_

GN

D/N

C60

DB

237

DB

228

DB

219

DB

2010

DB

1911

DB

1812

IM3

1. VCI, IOVCC are separated from different power so urce to get better display quality.

IOV

CC

VC

I

VCI1VCI

IOVCC1IOVCC

C22N

Figure 1. 1The HX8347-D MPU Application Reference C ircuit

HX8347-D(T) 240RGB x 320 dot, 262k color, with Internal GRAM, TFT Mobile Single Chip Driver Preliminary Version 01

Sep, 2008

-P.5- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

1.1 CMO 1.1-1CMO 2.6”Reference FPC Circuit

Title

Size Document Number Rev

Date: Sheet of

Driver IC:HIMAX HX8347D A01

CMO 2.6" FPC Rev A01

Custom

1 1Friday , September 19, 2008

/CS

RS

VC

IC081u/10V

NOTES 2:Set IFSEL="0";Register-content interface mode.

-

VP

P_O

TP

1 1 -

C041u/10V

NOTES 3:Set IM3~IM0="1000";80 system 18bit type I interface.

NOTES 1:Set IOVCC=2.8V(1.65~3.3V);VCI=2.8V(2.5~3.3V)

IOV

CC

C051u/10V

VD

DD

C101u/6.3V

0

VC

OM

SDA,SCL,RS

VP

P_O

TP

VPP_OTP

/CS

DB

4

TE

DB

1

IM3

TE

VCOM

IM2

VC

OM

IOVCC

VC

IV

CI DB

2D

B3

DB

5

IM2IM3 IM0IM1 Valid Data busInterface000

00

00

0101

0

1100DB17-10, DB8-1DB7-0DB15-0

ID-- 1DB17-10SDA,SCL

00

0

00

1

10

1111

DB17-001 0

8080 MCU 18 bits parallel

DB17-9

DB8-0DB17-0

VC

L

IOV

CC

C09

1u/6.3V

TE

J1Vci

1

Vci

2

GN

D3

Vcc

4

Vcc

5

RE

ST

6

DB

177

DB

168

DB

159

DB

1410

DB

1311

DB

1212

DB

1113

DB

1014

DB

915

DB

816

DB

717

DB

618

DB

519

DB

420

DB

321

DB

222

DB

123

DB

024

RD

25

WR

26

RS

27

CS

28

FLM

29

GN

D30

BL+

31

BL-

32

DB

16

DB

13

DB

15

GN

D

DB

9

/RE

SE

T

DB

14

DB

12

DB

17

DB

11

/RD

DB

7

DB

10

DB

6

DB

8

RS

TE

GN

D

DB

0

/WR

IM0

IM3

IM0

IM1

IM2

DB

0

C031u/10V

DD

VD

H

8080 MCU 18-bits Parallel type II

8080 MCU 16-bits Parallel type I

8080 MCU 9-bits Parallel type II

3-WIRE SERIAL INTERFACE 8080 MCU 8-bits Parallel type II8080 MCU 16-bits Parallel type II

8080 MCU 18-bits Paralle type I

8080 MCU 8-bits Parallel type I

4-WIRE SERIAL INTERFACE

8080 MCU 9-bits Parallel type I

C02 ( C12P/N )(Optional)

Recommended spec.Capacitor

C01 ( C11P/N )

C07 ( VGL )

C06 ( VGH )

C05 ( C22P/N )

C04 ( C21P/N )

C03 ( DDVDH )

1uF / 6.3Volt.

1uF / 10 Volt.

1uF / 6.3Volt.

C10 ( VDDD )

C09 ( VCL)

C08 ( C31P/N ) 1uF / 6.3 Volt.

1uF / 16 Volt.

1uF / 25 Volt.

1uF / 10 Volt.

1uF / 10 Volt.

1uF / 6.3 Volt.

1uF / 6.3 Volt.

DB

1

CO

G1

CO

G2

DB

2

CA

BC

_PW

MO

UT

DB

3D

B4

COG1

OG

1

COG2C

OG

2

DB

5D

B6

CA

BC

_PW

MO

UTCABC_PWMOUT

DB

7D

B8

C011u/6.3V

DB

10D

B9

U1 CMO Panel

VC

OM

2

CO

G1

3

CO

G2

4

C22

P5

C22

N6

C21

P7

C21

N8

VG

H9

VG

H10

DU

MM

Y11

VG

L12

VG

L13

VT

ES

T14

CA

BC

_PW

MO

UT

15

VC

L16

VC

L17

C31

P18

C31

P19

C31

N20

C31

N21

VP

P_O

TP

22

VP

P_O

TP

23

VS

SD

24

VS

SD

25

VS

SC

26

VS

SC

27

VS

SA

28

VS

SA

29

VC

I30

VC

I31

DN

C_S

CL

32

NC

S33

VS

YN

C34

HS

YN

C35

DO

TC

LK36

DE

37

NR

ES

ET

38

NR

D39

NW

R_S

CL

40

IM3

41

IM2

42

IM1

43

IM0

44

SD

A45

DB

1746

DB

1647

DB

1548

DB

1449

DB

1350

TE

ST

851

DB

1252

DB

1153

TE

ST

754

DB

1055

DB

956

TE

ST

657

DB

858

DB

759

TE

ST

560

DB

661

DB

562

TE

ST

463

DB

464

DB

365

TE

ST

366

DB

267

DB

168

DB

069

TE

70

CA

BC

_PW

MO

UT

71

IOV

CC

72

IOV

CC

73

VD

DD

74

VD

DD

75

C12

P76

C12

P77

C12

N78

C12

N79

C11

P80

C11

P81

C11

N82

C11

N83

DD

VD

H84

DD

VD

H85

VR

EG

186

IFS

EL

87

RC

M0

88

RC

M1

89

SR

GB

90

SM

X91

SM

Y92

VC

OM

93

VC

OM

94

VC

OM

1

DB

11D

B12

C02

1u/6.3V (open)

DB

13D

B14

DB

15D

B16

DB

17

/WR

/RD

/RE

SE

T

C06

1u/25V

VG

H

IM1

VG

L

C07

1u/16V

-P.6- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

1.1-2 Initial Code for CMO 2.6”

//##################################################################. M51_WR_REG(U05_LCD_POWER_ON, 0x0F); //VCI & IOVCC ON DelayX1ms(10); //RESET M51_WR_REG(U05_LCD_RST, 0x01); // LCD HW RST Enable DelayX1ms(5); M51_WR_REG(U05_LCD_RST, 0x00); // LCD HW RST Disable. DelayX1ms(10); //Driving ability Setting Set_LCD_8B_REG(0xEA,0x00); //PTBA[15:8] Set_LCD_8B_REG(0xEB,0x20); //PTBA[7:0] Set_LCD_8B_REG(0xEC,0x0C); //STBA[15:8] Set_LCD_8B_REG(0xED,0xC4); //STBA[7:0] Set_LCD_8B_REG(0xE8,0x40); //OPON[7:0] Set_LCD_8B_REG(0xE9,0x38); //OPON1[7:0] Set_LCD_8B_REG(0xF1,0x01); //OTPS1B Set_LCD_8B_REG(0xF2,0x10); //GEN Set_LCD_8B_REG(0x27,0xA3); // //Gamma 2.2 Setting Set_LCD_8B_REG(0x40,0x01); // Set_LCD_8B_REG(0x41,0x00); // Set_LCD_8B_REG(0x42,0x00); // Set_LCD_8B_REG(0x43,0x10); // Set_LCD_8B_REG(0x44,0x0E); // Set_LCD_8B_REG(0x45,0x24); // Set_LCD_8B_REG(0x46,0x04); // Set_LCD_8B_REG(0x47,0x50); // Set_LCD_8B_REG(0x48,0x02); // Set_LCD_8B_REG(0x49,0x13); // Set_LCD_8B_REG(0x4A,0x19); // Set_LCD_8B_REG(0x4B,0x19); // Set_LCD_8B_REG(0x4C,0x16); // Set_LCD_8B_REG(0x50,0x1B); // Set_LCD_8B_REG(0x51,0x31); // Set_LCD_8B_REG(0x52,0x2F); // Set_LCD_8B_REG(0x53,0x3F); // Set_LCD_8B_REG(0x54,0x3F); // Set_LCD_8B_REG(0x55,0x3E); // Set_LCD_8B_REG(0x56,0x2F); // Set_LCD_8B_REG(0x57,0x7B); // Set_LCD_8B_REG(0x58,0x09); // Set_LCD_8B_REG(0x59,0x06); // Set_LCD_8B_REG(0x5A,0x06); // Set_LCD_8B_REG(0x5B,0x0C); // Set_LCD_8B_REG(0x5C,0x1D); // Set_LCD_8B_REG(0x5D,0xCC); //

-P.7- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//Power Voltage Setting Set_LCD_8B_REG(0x1B,0x1B); //VRH=4.65V Set_LCD_8B_REG(0x1A,0x01); //BT (VGH~15V,VGL~-10V,DDVDH~5V) Set_LCD_8B_REG(0x24,0x2F); //VMH(VCOM High voltage ~3.2V) Set_LCD_8B_REG(0x25,0x57); //VML(VCOM Low voltage -1.2V) //****VCOM offset**/// Set_LCD_8B_REG(0x23,0x88); //for Flicker adjust //can reload from OTP //Power on Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x01,0x00); //DP_STB='0', out deep sleep Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); //262k/65k color selection Set_LCD_8B_REG(0x17,0x06); //default 0x06 262k color // 0x05 65k color //SET PANEL Set_LCD_8B_REG(0x36,0x00); //SS_P, GS_P,REV_P,BGR_P //Display ON Setting Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3C); //GON=1, DTE=1, D=1100 //Set GRAM Area Set_LCD_8B_REG(0x02,0x00); Set_LCD_8B_REG(0x03,0x00); //Column Start Set_LCD_8B_REG(0x04,0x00); Set_LCD_8B_REG(0x05,0xEF); //Column End Set_LCD_8B_REG(0x06,0x00); Set_LCD_8B_REG(0x07,0x00); //Row Start Set_LCD_8B_REG(0x08,0x01); Set_LCD_8B_REG(0x09,0x3F); //Row End WR_8B_FORMAT(0x22); //Start GRAM write

-P.8- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // Power Off Setting Set_LCD_8B_REG(0x28,0x38); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); M51_WR_REG(U05_LCD_POWER_ON, 0x00); //VCI & IOVCC OFF //################################################################## // ENTER IDLE mode Setting Set_LCD_8B_REG(0x18,0x34); //I/P_RADJ,N/P_RADJ, IDLE mode 55Hz Set_LCD_8B_REG(0x2F,0x11); //IDLE mode line inversion Set_LCD_8B_REG(0x01,0x04); //IDLE='1' , enter IDLE mode // EXIT IDLE mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode line inversion Set_LCD_8B_REG(0x01,0x00); //IDLE='0', EXIT IDLE mode //################################################################## // ENTER Partial mode Setting 32line Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ Partial mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Partial mode line inversion Set_LCD_8B_REG(0x01,0x01); //PTL='1', Enter Partial mode Set_LCD_8B_REG(0x0A,0x00); //PSL[15:8]=0x00 Set_LCD_8B_REG(0x0B,0x20); //PSL[7:0]=0x20 Set_LCD_8B_REG(0x0C,0x00); //PEL[15:8]=0x00 Set_LCD_8B_REG(0x0D,0x47); //PEL[7:0]=0x47 Set_LCD_8B_REG(0x26,0x01); //refresh cycle=5frame // EXIT Partial mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode, line inversion Set_LCD_8B_REG(0x01,0x00); //PTL='0', EXIT Partial mode

-P.9- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // ENTER Partial + IDLE mode Setting 32line Set_LCD_8B_REG(0x18,0x34); //I/P_RADJ,N/P_RADJ, Partial mode 55Hz Set_LCD_8B_REG(0x2F,0x11); // Partial + IDLE mode line inversion Set_LCD_8B_REG(0x01,0x09); // PTL='1' IDLE=’1’, Enter Partial + IDLE mode Set_LCD_8B_REG(0x0A,0x00); //PSL[15:8]=0x00 Set_LCD_8B_REG(0x0B,0x20); //PSL[7:0]=0x20 Set_LCD_8B_REG(0x0C,0x00); //PEL[15:8]=0x00 Set_LCD_8B_REG(0x0D,0x47); //PEL[7:0]=0x47 Set_LCD_8B_REG(0x26,0x01); //refresh cycle=5frame // EXIT Partial + IDLE mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ ,Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode, line inversion Set_LCD_8B_REG(0x01,0x00); // PTL='0' IDLE=’0’, EXIT Partial + IDLE mode //################################################################## // Enter Sleep mode Setting Set_LCD_8B_REG(0x28,0x38); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); // Exit Sleep mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3F); //GON=1, DTE=1, D=1100

-P.10- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // Enter Deep Sleep mode Setting Set_LCD_8B_REG(0x28,0x38); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); Set_LCD_8B_REG(0x01,0xC0); //DP_STB[1:0]=’11’ // Exit Deep Sleep mode Setting Set_LCD_8B_REG(0x01,0x00); //DP_STB='0', out deep sleep DelayX1ms(10); Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3F); //GON=1, DTE=1, D=1100 WR_8B_FORMAT(0x22); //Start GRAM write

-P.11- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

1.1-3 CMO 2.0” 2.2” 2.4” 2.8” Reference FPC Circuit

RS

/CS

VC

I

Title

Size Document Number Rev

Date: Sheet of

Driver IC:HIMAX HX8347D A01

CMO 2.0" FPC Rev A01

B

1 1Wednesday , October 08, 2008

C081u/10V

NOTES 2:Set IFSEL="0";Register-content interface mode.

-

VP

P_O

TP

1 1 -

C041u/10V

NOTES 3:Set IM3~IM0="1000";80 system 18bit type I interface.

NOTES 1:Set IOVCC=2.8V(1.65~3.3V);VCI=2.8V(2.5~3.3V)

C051u/10V

0

VC

OM

SDA,SCL,RS

VP

P_O

TP

DB

4

/CS

TE

VPP_OTP

IM3

DB

1

TE

IM2

VC

IV

CI DB

5 IOVCC

DB

3D

B2

IM3 IM2 IM1

VCOM

IM0 Interface Valid Data bus0 0

00

00

00

10 1 0

0 0 1 1

DB15-0DB7-0DB17-10, DB8-1DB17-10

1- - ID SDA,SCL

00

000

101

1

111

01 0

IOV

CC

DB17-0

VC

L

DB17-0DB8-0

DB17-9

8080 MCU 18 bits parallel

GN

D

C09

1u/6.3V

DB

15

DB

13

DB

16

J1Vci

1

Vci

2

GN

D3

Vcc

4

Vcc

5

RE

ST

6

DB

177

DB

168

DB

159

DB

1410

DB

1311

DB

1212

DB

1113

DB

1014

DB

915

DB

816

DB

717

DB

618

DB

519

DB

420

DB

321

DB

222

DB

123

DB

024

RD

25

WR

26

RS

27

CS

28

FLM

29

GN

D30

BL+

31

BL-

32

DB

11

DB

17

DB

12

DB

14

/RE

SE

T

DB

9D

B8

DB

6

DB

10

DB

7

/RD

/WR

DB

0

GN

DT

E

RS

IM08080 MCU 16-bits Parallel type II8080 MCU 8-bits Parallel type II3-WIRE SERIAL INTERFACE

8080 MCU 9-bits Parallel type II

8080 MCU 16-bits Parallel type I

8080 MCU 18-bits Parallel type II8080 MCU 9-bits Parallel type I

4-WIRE SERIAL INTERFACE

8080 MCU 8-bits Parallel type I

8080 MCU 18-bits Paralle type I

C01 ( C11P/N )

Capacitor Recommended spec.

C02 ( C12P/N )(Optional)

1uF / 6.3Volt.

C03 ( DDVDH )

C04 ( C21P/N )

C05 ( C22P/N )

C06 ( VGH )

C07 ( VGL )

C08 ( C31P/N )

C09 ( VCL)

C10 ( VDDD )

1uF / 6.3Volt.

1uF / 10 Volt.

1uF / 10 Volt.

1uF / 10 Volt.

1uF / 25 Volt.

1uF / 16 Volt.

1uF / 6.3 Volt.

1uF / 6.3 Volt.

1uF / 6.3 Volt.

CO

G1

CO

G2

CA

BC

_PW

MO

UT

OG

1COG1

CO

G2

COG2

CA

BC

_PW

MO

UTCABC_PWMOUT

VG

H

C06

1u/25V

IM1

VG

L

C07

1u/16V

TE

DB

0D

B1

DB

2

DB

4D

B3

DB

6D

B5

DB

8D

B7

DB

10D

B9

DB

12D

B11

DB

14D

B13

U1 CMO Panel

VC

OM

2

CO

G1

3

CO

G2

4

C21

P5

C21

N6

C22

P7

C22

N8

VG

H9

VG

H10

DU

MM

Y11

VG

L12

VG

L13

VT

ES

T14

CA

BC

_PW

MO

UT

15

VC

L16

VC

L17

C31

P18

C31

P19

C31

N20

C31

N21

VP

P_O

TP

22

VP

P_O

TP

23

VS

SD

24

VS

SD

25

VS

SC

26

VS

SC

27

VS

SC

28

VS

SA

29

VS

SA

30

VS

SA

31

VS

SA

32

VS

SA

33

VC

I34

VC

I35

DN

C_S

CL

36

NC

S37

VS

YN

C38

HS

YN

C39

DO

TC

LK40

DE

41

NR

ES

ET

42

NR

D43

NW

R_S

CL

44

IM3

45

IM2

46

IM1

47

IM0

48

SD

A49

DB

1750

DB

1651

DB

1552

TE

ST

953

DB

1454

DB

1355

TE

ST

856

DB

1257

DB

1158

TE

ST

759

DB

1060

DB

961

TE

ST

662

DB

863

DB

764

TE

ST

565

DB

666

DB

567

TE

ST

468

DB

469

DB

370

TE

ST

371

DB

272

DB

173

DB

074

TE

75

CA

BC

_PW

M_O

UT

76

OS

C77

IOV

CC

78

IOV

CC

79

VD

DD

80

VD

DD

81

VD

DD

82

VD

DD

83

VD

DD

84

VD

DD

85

C12

P86

C12

P87

C12

N88

C12

N89

C11

P90

C11

P91

C11

N92

C11

N93

DD

VD

H94

VC

OM

1

DD

VD

H95

VR

EG

196

IFS

EL

97

VC

OM

L_D

UM

98

VC

OM

H_D

UM

99

RC

M0

100

RC

M1

101

SR

GB

102

SM

X10

3

SM

Y10

4

VC

OM

_DU

M10

5

VC

OM

_DU

M10

6

DD

VD

H

C031u/10V

C011u/6.3VC02

1u/6.3V (open)

VD

DD

C101u/6.3V

IOV

CC

DB

16D

B15

DB

17

IM3

IM2

IM1

IM0

/WR

/RD

/RE

SE

T

-P.12- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

1.1-4 Initial Code for CMO 2.0”

//##################################################################. M51_WR_REG(U05_LCD_POWER_ON, 0x0F); //VCI & IOVCC ON DelayX1ms(10); //RESET M51_WR_REG(U05_LCD_RST, 0x01); // LCD HW RST Enable DelayX1ms(5); M51_WR_REG(U05_LCD_RST, 0x00); // LCD HW RST Disable. DelayX1ms(10); //Driving ability Setting Set_LCD_8B_REG(0xEA,0x00); //PTBA[15:8] Set_LCD_8B_REG(0xEB,0x20); //PTBA[7:0] Set_LCD_8B_REG(0xEC,0x0C); //STBA[15:8] Set_LCD_8B_REG(0xED,0xC4); //STBA[7:0] Set_LCD_8B_REG(0xE8,0x40); //OPON[7:0] Set_LCD_8B_REG(0xE9,0x38); //OPON1[7:0] Set_LCD_8B_REG(0xF1,0x01); //OTPS1B Set_LCD_8B_REG(0xF2,0x10); //GEN Set_LCD_8B_REG(0x27,0xA3); // //Gamma 2.2 Setting Set_LCD_8B_REG(0x40,0x00); // Set_LCD_8B_REG(0x41,0x00); // Set_LCD_8B_REG(0x42,0x01); // Set_LCD_8B_REG(0x43,0x12); // Set_LCD_8B_REG(0x44,0x10); // Set_LCD_8B_REG(0x45,0x26); // Set_LCD_8B_REG(0x46,0x08); // Set_LCD_8B_REG(0x47,0x54); // Set_LCD_8B_REG(0x48,0x02); // Set_LCD_8B_REG(0x49,0x15); // Set_LCD_8B_REG(0x4A,0x19); // Set_LCD_8B_REG(0x4B,0x19); // Set_LCD_8B_REG(0x4C,0x16); // Set_LCD_8B_REG(0x50,0x19); // Set_LCD_8B_REG(0x51,0x2F); // Set_LCD_8B_REG(0x52,0x2D); // Set_LCD_8B_REG(0x53,0x3E); // Set_LCD_8B_REG(0x54,0x3F); // Set_LCD_8B_REG(0x55,0x3F); // Set_LCD_8B_REG(0x56,0x2B); // Set_LCD_8B_REG(0x57,0x77); // Set_LCD_8B_REG(0x58,0x09); // Set_LCD_8B_REG(0x59,0x06); // Set_LCD_8B_REG(0x5A,0x06); // Set_LCD_8B_REG(0x5B,0x0A); // Set_LCD_8B_REG(0x5C,0x1D); // Set_LCD_8B_REG(0x5D,0xCC); // //Power Voltage Setting

-P.13- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

Set_LCD_8B_REG(0x1B,0x1B); //VRH=4.65V Set_LCD_8B_REG(0x1A,0x01); //BT (VGH~15V,VGL~-10V,DDVDH~5V) Set_LCD_8B_REG(0x24,0x2F); //VMH(VCOM High voltage ~3.2V) Set_LCD_8B_REG(0x25,0x57); //VML(VCOM Low voltage -1.2V) //****VCOM offset**/// Set_LCD_8B_REG(0x23,0x79); //for Flicker adjust //can reload from OTP //Power on Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x01,0x00); //DP_STB='0', out deep sleep Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); //262k/65k color selection Set_LCD_8B_REG(0x17,0x06); //default 0x06 262k color // 0x05 65k color //SET PANEL Set_LCD_8B_REG(0x36,0x00); //SS_P, GS_P,REV_P,BGR_P //Display ON Setting Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3C); //GON=1, DTE=1, D=1100 //Set GRAM Area Set_LCD_8B_REG(0x02,0x00); Set_LCD_8B_REG(0x03,0x00); //Column Start Set_LCD_8B_REG(0x04,0x00); Set_LCD_8B_REG(0x05,0xEF); //Column End Set_LCD_8B_REG(0x06,0x00); Set_LCD_8B_REG(0x07,0x00); //Row Start Set_LCD_8B_REG(0x08,0x01); Set_LCD_8B_REG(0x09,0x3F); //Row End WR_8B_FORMAT(0x22); //Start GRAM write

-P.14- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // Power Off Setting Set_LCD_8B_REG(0x28,0x38); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); M51_WR_REG(U05_LCD_POWER_ON, 0x00); //VCI & IOVCC OFF //################################################################## // ENTER IDLE mode Setting Set_LCD_8B_REG(0x18,0x34); //I/P_RADJ,N/P_RADJ, IDLE mode 55Hz Set_LCD_8B_REG(0x2F,0x11); //IDLE mode line inversion Set_LCD_8B_REG(0x01,0x04); //IDLE='1' , enter IDLE mode // EXIT IDLE mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode line inversion Set_LCD_8B_REG(0x01,0x00); //IDLE='0', EXIT IDLE mode //################################################################## // ENTER Partial mode Setting 32line Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ Partial mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Partial mode line inversion Set_LCD_8B_REG(0x01,0x01); //PTL='1', Enter Partial mode Set_LCD_8B_REG(0x0A,0x00); //PSL[15:8]=0x00 Set_LCD_8B_REG(0x0B,0x20); //PSL[7:0]=0x20 Set_LCD_8B_REG(0x0C,0x00); //PEL[15:8]=0x00 Set_LCD_8B_REG(0x0D,0x47); //PEL[7:0]=0x47 Set_LCD_8B_REG(0x26,0x01); //refresh cycle=5frame // EXIT Partial mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode, line inversion Set_LCD_8B_REG(0x01,0x00); //PTL='0', EXIT Partial mode

-P.15- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // ENTER Partial + IDLE mode Setting 32line Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Partial mode 55Hz Set_LCD_8B_REG(0x2F,0x11); // Partial + IDLE mode line inversion Set_LCD_8B_REG(0x01,0x09); // PTL='1' IDLE=’1’, Enter Partial + IDLE mode Set_LCD_8B_REG(0x0A,0x00); //PSL[15:8]=0x00 Set_LCD_8B_REG(0x0B,0x20); //PSL[7:0]=0x20 Set_LCD_8B_REG(0x0C,0x00); //PEL[15:8]=0x00 Set_LCD_8B_REG(0x0D,0x47); //PEL[7:0]=0x47 Set_LCD_8B_REG(0x26,0x01); //refresh cycle=5frame // EXIT Partial + IDLE mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ ,Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode, line inversion Set_LCD_8B_REG(0x01,0x00); // PTL='0' IDLE=’0’, EXIT Partial + IDLE mode //################################################################## // Enter Sleep mode Setting Set_LCD_8B_REG(0x28,0xB8); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); // Exit Sleep mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3F); //GON=1, DTE=1, D=1100

-P.16- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // Enter Deep Sleep mode Setting Set_LCD_8B_REG(0x28,0xB8); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); Set_LCD_8B_REG(0x01,0xC0); //DP_STB[1:0]=’11’ // Exit Deep Sleep mode Setting Set_LCD_8B_REG(0x01,0x00); //DP_STB='0', out deep sleep DelayX1ms(10); Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3F); //GON=1, DTE=1, D=1100 WR_8B_FORMAT(0x22); //Start GRAM write

-P.17- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

1.1-5 Initial Code for CMO 2.2”

//##################################################################. M51_WR_REG(U05_LCD_POWER_ON, 0x0F); //VCI & IOVCC ON DelayX1ms(10); //RESET M51_WR_REG(U05_LCD_RST, 0x01); // LCD HW RST Enable DelayX1ms(5); M51_WR_REG(U05_LCD_RST, 0x00); // LCD HW RST Disable. DelayX1ms(10); //Driving ability Setting Set_LCD_8B_REG(0xEA,0x00); //PTBA[15:8] Set_LCD_8B_REG(0xEB,0x20); //PTBA[7:0] Set_LCD_8B_REG(0xEC,0x0C); //STBA[15:8] Set_LCD_8B_REG(0xED,0xC4); //STBA[7:0] Set_LCD_8B_REG(0xE8,0x40); //OPON[7:0] Set_LCD_8B_REG(0xE9,0x38); //OPON1[7:0] Set_LCD_8B_REG(0xF1,0x01); //OTPS1B Set_LCD_8B_REG(0xF2,0x10); //GEN Set_LCD_8B_REG(0x27,0xA3); // //Gamma 2.2 Setting Set_LCD_8B_REG(0x40,0x00); // Set_LCD_8B_REG(0x41,0x00); // Set_LCD_8B_REG(0x42,0x01); // Set_LCD_8B_REG(0x43,0x12); // Set_LCD_8B_REG(0x44,0x10); // Set_LCD_8B_REG(0x45,0x26); // Set_LCD_8B_REG(0x46,0x08); // Set_LCD_8B_REG(0x47,0x53); // Set_LCD_8B_REG(0x48,0x02); // Set_LCD_8B_REG(0x49,0x15); // Set_LCD_8B_REG(0x4A,0x19); // Set_LCD_8B_REG(0x4B,0x19); // Set_LCD_8B_REG(0x4C,0x16); // Set_LCD_8B_REG(0x50,0x19); // Set_LCD_8B_REG(0x51,0x2F); // Set_LCD_8B_REG(0x52,0x2D); // Set_LCD_8B_REG(0x53,0x3E); // Set_LCD_8B_REG(0x54,0x3F); // Set_LCD_8B_REG(0x55,0x3F); // Set_LCD_8B_REG(0x56,0x2C); // Set_LCD_8B_REG(0x57,0x77); // Set_LCD_8B_REG(0x58,0x09); // Set_LCD_8B_REG(0x59,0x06); // Set_LCD_8B_REG(0x5A,0x06); // Set_LCD_8B_REG(0x5B,0x0A); // Set_LCD_8B_REG(0x5C,0x1D); // Set_LCD_8B_REG(0x5D,0xCC); // //Power Voltage Setting

-P.18- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

Set_LCD_8B_REG(0x1B,0x1B); //VRH=4.65V Set_LCD_8B_REG(0x1A,0x01); //BT (VGH~15V,VGL~-10V,DDVDH~5V) Set_LCD_8B_REG(0x24,0x2F); //VMH(VCOM High voltage ~3.2V) Set_LCD_8B_REG(0x25,0x57); //VML(VCOM Low voltage -1.2V) //****VCOM offset**/// Set_LCD_8B_REG(0x23,0x97); //for Flicker adjust //can reload from OTP //Power on Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x01,0x00); //DP_STB='0', out deep sleep Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); //262k/65k color selection Set_LCD_8B_REG(0x17,0x06); //default 0x06 262k color // 0x05 65k color //SET PANEL Set_LCD_8B_REG(0x36,0x00); //SS_P, GS_P,REV_P,BGR_P //Display ON Setting Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3C); //GON=1, DTE=1, D=1100 //Set GRAM Area Set_LCD_8B_REG(0x02,0x00); Set_LCD_8B_REG(0x03,0x00); //Column Start Set_LCD_8B_REG(0x04,0x00); Set_LCD_8B_REG(0x05,0xEF); //Column End Set_LCD_8B_REG(0x06,0x00); Set_LCD_8B_REG(0x07,0x00); //Row Start Set_LCD_8B_REG(0x08,0x01); Set_LCD_8B_REG(0x09,0x3F); //Row End WR_8B_FORMAT(0x22); //Start GRAM write

-P.19- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // Power Off Setting Set_LCD_8B_REG(0x28,0x38); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); M51_WR_REG(U05_LCD_POWER_ON, 0x00); //VCI & IOVCC OFF //################################################################## // ENTER IDLE mode Setting Set_LCD_8B_REG(0x18,0x34); //I/P_RADJ,N/P_RADJ, IDLE mode 55Hz Set_LCD_8B_REG(0x2F,0x11); //IDLE mode line inversion Set_LCD_8B_REG(0x01,0x04); //IDLE='1' , enter IDLE mode // EXIT IDLE mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode line inversion Set_LCD_8B_REG(0x01,0x00); //IDLE='0', EXIT IDLE mode //################################################################## // ENTER Partial mode Setting 32line Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ Partial mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Partial mode line inversion Set_LCD_8B_REG(0x01,0x01); //PTL='1', Enter Partial mode Set_LCD_8B_REG(0x0A,0x00); //PSL[15:8]=0x00 Set_LCD_8B_REG(0x0B,0x20); //PSL[7:0]=0x20 Set_LCD_8B_REG(0x0C,0x00); //PEL[15:8]=0x00 Set_LCD_8B_REG(0x0D,0x47); //PEL[7:0]=0x47 Set_LCD_8B_REG(0x26,0x01); //refresh cycle=5frame // EXIT Partial mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode, line inversion Set_LCD_8B_REG(0x01,0x00); //PTL='0', EXIT Partial mode

-P.20- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // ENTER Partial + IDLE mode Setting 32line Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Partial mode 55Hz Set_LCD_8B_REG(0x2F,0x11); // Partial + IDLE mode line inversion Set_LCD_8B_REG(0x01,0x09); // PTL='1' IDLE=’1’, Enter Partial + IDLE mode Set_LCD_8B_REG(0x0A,0x00); //PSL[15:8]=0x00 Set_LCD_8B_REG(0x0B,0x20); //PSL[7:0]=0x20 Set_LCD_8B_REG(0x0C,0x00); //PEL[15:8]=0x00 Set_LCD_8B_REG(0x0D,0x47); //PEL[7:0]=0x47 Set_LCD_8B_REG(0x26,0x01); //refresh cycle=5frame // EXIT Partial + IDLE mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ ,Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode, line inversion Set_LCD_8B_REG(0x01,0x00); // PTL='0' IDLE=’0’, EXIT Partial + IDLE mode //################################################################## // Enter Sleep mode Setting Set_LCD_8B_REG(0x28,0xB8); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); // Exit Sleep mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3F); //GON=1, DTE=1, D=1100

-P.21- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // Enter Deep Sleep mode Setting Set_LCD_8B_REG(0x28,0xB8); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); Set_LCD_8B_REG(0x01,0xC0); //DP_STB[1:0]=’11’ // Exit Deep Sleep mode Setting Set_LCD_8B_REG(0x01,0x00); //DP_STB='0', out deep sleep DelayX1ms(10); Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3F); //GON=1, DTE=1, D=1100 WR_8B_FORMAT(0x22); //Start GRAM write

-P.22- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

1.1-6 Initial Code for CMO 2.8”

//##################################################################. M51_WR_REG(U05_LCD_POWER_ON, 0x0F); //VCI & IOVCC ON DelayX1ms(10); //RESET M51_WR_REG(U05_LCD_RST, 0x01); // LCD HW RST Enable DelayX1ms(5); M51_WR_REG(U05_LCD_RST, 0x00); // LCD HW RST Disable. DelayX1ms(10); //Driving ability Setting Set_LCD_8B_REG(0xEA,0x00); //PTBA[15:8] Set_LCD_8B_REG(0xEB,0x20); //PTBA[7:0] Set_LCD_8B_REG(0xEC,0x0C); //STBA[15:8] Set_LCD_8B_REG(0xED,0xC4); //STBA[7:0] Set_LCD_8B_REG(0xE8,0x40); //OPON[7:0] Set_LCD_8B_REG(0xE9,0x38); //OPON1[7:0] Set_LCD_8B_REG(0xF1,0x01); //OTPS1B Set_LCD_8B_REG(0xF2,0x10); //GEN Set_LCD_8B_REG(0x27,0xA3); // //Gamma 2.2 Setting Set_LCD_8B_REG(0x40,0x00); // Set_LCD_8B_REG(0x41,0x00); // Set_LCD_8B_REG(0x42,0x01); // Set_LCD_8B_REG(0x43,0x13); // Set_LCD_8B_REG(0x44,0x10); // Set_LCD_8B_REG(0x45,0x26); // Set_LCD_8B_REG(0x46,0x08); // Set_LCD_8B_REG(0x47,0x51); // Set_LCD_8B_REG(0x48,0x02); // Set_LCD_8B_REG(0x49,0x12); // Set_LCD_8B_REG(0x4A,0x18); // Set_LCD_8B_REG(0x4B,0x19); // Set_LCD_8B_REG(0x4C,0x14); // Set_LCD_8B_REG(0x50,0x19); // Set_LCD_8B_REG(0x51,0x2F); // Set_LCD_8B_REG(0x52,0x2C); // Set_LCD_8B_REG(0x53,0x3E); // Set_LCD_8B_REG(0x54,0x3F); // Set_LCD_8B_REG(0x55,0x3F); // Set_LCD_8B_REG(0x56,0x2E); // Set_LCD_8B_REG(0x57,0x77); // Set_LCD_8B_REG(0x58,0x0B); // Set_LCD_8B_REG(0x59,0x06); // Set_LCD_8B_REG(0x5A,0x07); // Set_LCD_8B_REG(0x5B,0x0D); // Set_LCD_8B_REG(0x5C,0x1D); // Set_LCD_8B_REG(0x5D,0xCC); // //Power Voltage Setting

-P.23- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

Set_LCD_8B_REG(0x1B,0x1B); //VRH=4.65V Set_LCD_8B_REG(0x1A,0x01); //BT (VGH~15V,VGL~-10V,DDVDH~5V) Set_LCD_8B_REG(0x24,0x2F); //VMH(VCOM High voltage ~3.2V) Set_LCD_8B_REG(0x25,0x57); //VML(VCOM Low voltage -1.2V) //****VCOM offset**/// Set_LCD_8B_REG(0x23,0x86); //for Flicker adjust //can reload from OTP //Power on Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x01,0x00); //DP_STB='0', out deep sleep Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); //262k/65k color selection Set_LCD_8B_REG(0x17,0x06); //default 0x06 262k color // 0x05 65k color //SET PANEL Set_LCD_8B_REG(0x36,0x00); //SS_P, GS_P,REV_P,BGR_P //Display ON Setting Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3C); //GON=1, DTE=1, D=1100 //Set GRAM Area Set_LCD_8B_REG(0x02,0x00); Set_LCD_8B_REG(0x03,0x00); //Column Start Set_LCD_8B_REG(0x04,0x00); Set_LCD_8B_REG(0x05,0xEF); //Column End Set_LCD_8B_REG(0x06,0x00); Set_LCD_8B_REG(0x07,0x00); //Row Start Set_LCD_8B_REG(0x08,0x01); Set_LCD_8B_REG(0x09,0x3F); //Row End WR_8B_FORMAT(0x22); //Start GRAM write

-P.24- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // Power Off Setting Set_LCD_8B_REG(0x28,0x38); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); M51_WR_REG(U05_LCD_POWER_ON, 0x00); //VCI & IOVCC OFF //################################################################## // ENTER IDLE mode Setting Set_LCD_8B_REG(0x18,0x34); //I/P_RADJ,N/P_RADJ, IDLE mode 55Hz Set_LCD_8B_REG(0x2F,0x11); //IDLE mode line inversion Set_LCD_8B_REG(0x01,0x04); //IDLE='1' , enter IDLE mode // EXIT IDLE mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode line inversion Set_LCD_8B_REG(0x01,0x00); //IDLE='0', EXIT IDLE mode //################################################################## // ENTER Partial mode Setting 32line Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ Partial mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Partial mode line inversion Set_LCD_8B_REG(0x01,0x01); //PTL='1', Enter Partial mode Set_LCD_8B_REG(0x0A,0x00); //PSL[15:8]=0x00 Set_LCD_8B_REG(0x0B,0x20); //PSL[7:0]=0x20 Set_LCD_8B_REG(0x0C,0x00); //PEL[15:8]=0x00 Set_LCD_8B_REG(0x0D,0x47); //PEL[7:0]=0x47 Set_LCD_8B_REG(0x26,0x01); //refresh cycle=5frame // EXIT Partial mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode, line inversion Set_LCD_8B_REG(0x01,0x00); //PTL='0', EXIT Partial mode

-P.25- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // ENTER Partial + IDLE mode Setting 32line Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Partial mode 55Hz Set_LCD_8B_REG(0x2F,0x11); // Partial + IDLE mode line inversion Set_LCD_8B_REG(0x01,0x09); // PTL='1' IDLE=’1’, Enter Partial + IDLE mode Set_LCD_8B_REG(0x0A,0x00); //PSL[15:8]=0x00 Set_LCD_8B_REG(0x0B,0x20); //PSL[7:0]=0x20 Set_LCD_8B_REG(0x0C,0x00); //PEL[15:8]=0x00 Set_LCD_8B_REG(0x0D,0x47); //PEL[7:0]=0x47 Set_LCD_8B_REG(0x26,0x01); //refresh cycle=5frame // EXIT Partial + IDLE mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ ,Normal mode 75Hz Set_LCD_8B_REG(0x2F,0x11); //Normal mode, line inversion Set_LCD_8B_REG(0x01,0x00); // PTL='0' IDLE=’0’, EXIT Partial + IDLE mode //################################################################## // Enter Sleep mode Setting Set_LCD_8B_REG(0x28,0xB8); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); // Exit Sleep mode Setting Set_LCD_8B_REG(0x18,0x36); //I/P_RADJ,N/P_RADJ, Normal mode 75Hz Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3F); //GON=1, DTE=1, D=1100

-P.26- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

//################################################################## // Enter Deep Sleep mode Setting Set_LCD_8B_REG(0x28,0xB8); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_8B_REG(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_8B_REG(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); Set_LCD_8B_REG(0x01,0xC0); //DP_STB[1:0]=’11’ // Exit Deep Sleep mode Setting Set_LCD_8B_REG(0x01,0x00); //DP_STB='0', out deep sleep DelayX1ms(10); Set_LCD_8B_REG(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_8B_REG(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_8B_REG(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_8B_REG(0x28,0x3F); //GON=1, DTE=1, D=1100 WR_8B_FORMAT(0x22); //Start GRAM write

-P.27- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

2. RGB mode Reference FPC Circuit

Capacitor

C01 ( C11P/N )

C02 ( C12P/N )(Optional)

Recommended spec.

C04 ( C21P/N )

C03 ( DDVDH )

1uF / 6.3Volt.

C07 ( VGL )

C06 ( VGH )

C05 ( C22P/N )

C09 ( VCL)

C08 ( C31P/N )

1uF / 10 Volt.

1uF / 6.3Volt.

C10 ( VDDD )

1uF / 25 Volt.

1uF / 10 Volt.

1uF / 10 Volt.

1uF / 6.3 Volt.

1uF / 16 Volt.

1uF / 6.3 Volt.

1uF / 6.3 Volt.

RC

M0

VC

OM

LV

CO

MH

RC

M1

CA

BC

PW

M

CA

BC

PW

M

VR

EG

1

SRGB="0" S1,S2,S3="B,G,R"

SMY="0" G1->G320SMX="0" S720->S1

C3

DD

VD

H

VT

ES

T

C11

NC

11P

C12

PC

12N

VS

YN

C

DE

DO

TC

LK

HS

YN

C

HSYNCHSYNC

ENABLEENABLE

DOTCLKDOTCLK

VSYNCVSYNC

RC

M0

RC

M1

DO

TC

LK

CO

NN

2C

ON

N2

NR

ES

ET

DN

C_S

CL

2. SDI pin is I/O pin. SDO is no use.3. The input pin must be fixed IOVCC or GND when no use. Refer to "Pin Description".

DD

VD

H

VC

L

NC

S

VR

EG

1

VG

H

VG

L

VC

OM

VC

OM

L

VD

DD

VC

OM

H

C31

PC

31N

C8

C31NC31P

VCOM2VCOM

NCS2NCS

C22

P

VDDD2VDDD

DNC_SCL1DNC_SCL1

DDVDH2DDVDH

VCOMH2VCOMH

C12NC12P

C2 (OPEN)

VG

H

NR

ES

ET

240RGB x 320 TFT Panel

C11P

C1

C11N

C10

VCOML2VCOML

DB

8

VCL2VCL

DB

9

DB

7

NRESET2NRESET

DB

10

VGL2VGL

VD

DD

DB

12D

B11

DB

13D

B14

IOV

CC

DB

17

DB

16D

B15

IOV

CC

SD

A

TE

NR

ES

ET

VC

I

VREG2VREG1

VGH2VGH

GN

D

DB

1D

B0

DB

3

DB

2

DB

6D

B5

DB

4

C9

C22

N

IOV

CC

VC

I

HS

YN

CV

SY

NC

C6

DE

VP

P_O

TP

VS

SD

VS

SA

VS

SC

C7

VC

L

VG

LC21NC21P

C4

C5

NC

S

C22P C22N

C21

NC

21P

GN

D

SD

A VTEST2VTEST

NC

S VSSA

GN

D

VSSD

VSSC

GND3GND

GND4GND

J2

FPC60-0.5-4.0L

VC

I1

VC

I2

GN

D3

VC

C4

IOV

CC

5

nRE

SE

T6

DB

171

3

DB

161

4

DB

151

5

DB

141

6

DB

131

7

DB

121

8

DB

111

9

DB

102

0

DB

92

1

DB

82

2

DB

72

3

DB

62

4

DB

52

5

DB

42

6

DB

32

7

DB

22

8

DB

12

9

DB

03

0

nRD

_E3

1

NW

R_R

NW

32

DN

C3

3

nCS

34

FLM

35

GN

D3

6

PW

M_O

UT

37

VS

YN

C3

8

HS

YN

C3

9

DO

TC

LK4

0

EN

AB

LE4

1

SD

O4

2

SD

I4

3

NC

44

SH

UT

45

RL

46

TB

47

IDM

48

RE

V4

9

RC

M0

50

RC

M1

51

EX

TC

52

DB

S5

3

IM3

54

IM2

55

IM1

56

IM0

57

GN

D5

8

BL+

/NC

59

BL_

GN

D/N

C6

0

DB

237

DB

228

DB

219

DB

201

0

DB

191

1

DB

181

2

1. VCI, IOVCC are separated from different power so urce to get better display quality.

VC

I

IOV

CC

IOVCC2IOVCC

VCI2VCI

VT

ES

T

DB

11

DB

5

DB

15

DB

13

DB

10

DB

8D

B9

DB

12

DB

14

DB

3D

B4

DB

7

DB

2

DB

0

DB

6

DB

16

DB

1

NW

R_S

CL

DB

17

VS

YN

C

RCM[1:0]="11" RGB MODE2 (HS+VS)RCM[1:0]="10" RGB MODE1 (HS+VS+DE)

HS

YN

C

NW

R_

SC

L

DO

TC

LK

IFSEL="0" REGISTER-CONTENT INTERFACE

U2

HX8347-D (BUMP UP)

VG

L

C11

P

VP

P_

OT

P

HS

YN

CD

OT

CLK

DE

NR

ES

ET

NR

D_E

NW

R_R

NW

IM3

IM2

C22

N

DD

VD

H

C22

P

G2

G4

G32

0

G1

G3

G31

7G

319

S1

S2

S3

S72

0S

719

S71

8

G6

G31

8

G31

5

G5

VG

H

C11

N

CO

NN

CO

NN

VC

OM

NC

S

VS

SA

DN

C_S

CL

VS

SC

VC

I

VS

SD

VS

YN

C

DU

MM

Y27

DU

MM

Y

DU

MM

Y23

DU

MM

Y24

S26

2S

263

S36

1S

265

S26

6S

267

C21

PC

21N

IM0

SD

AD

17T

ES

T10

D16

D15

TE

ST

9D

14D

13T

ES

T8

D12

D11

TE

ST

7D

10D

9T

ES

T6

D8

D7

TE

ST

5D

6D

5T

ES

T4

D4

D3

TE

ST

3D

2D

1D

0T

ES

T2

TE

CA

BC

_PW

M_O

UT

OS

CIO

VC

CV

DD

D

C12

PC

12N

C31

PC

31N

VC

L

VR

EG

1

VT

ES

T

VM

ON

I

VC

OM

H_

DU

MM

YV

CO

ML_

DU

MM

Y

RC

M1

RC

M0

SR

GB

SM

XS

MY

IFS

EL

VC

OM

_DU

MM

Y

IM1

TE

ST

1

CA

BC

PW

MO

UT

DE

CO

NN

1

CONN3CONN1

CO

NN

2

CONN4CONN2

CA

BC

PW

M

PWM1PWM

VPP_OTP2VPP_OTP

VP

P_O

TP

Figure 2. 1 The HX8347-D SPI+RGB Application Refere nce Circuit

-P.28- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

2.1. Initial Code for Reference //for CMO 2.6” //################################################################## M51_WR_REG(U13_RGB_IF_ENABLE, 0x13); // RGB IF TIMING ENABLE. DelayX1ms(5); //RESET M51_WR_REG(U05_LCD_RST, 0x01); // LCD HW RST Enable DelayX1ms(5); M51_WR_REG(U05_LCD_RST, 0x00); // LCD HW RST Disable. DelayX1ms(10); //Driving ability Setting Set_LCD_SPI_REG_8b(0xEA,0x00); //PTBA[15:8] Set_LCD_SPI_REG_8b(0xEB,0x20); //PTBA[7:0] Set_LCD_SPI_REG_8b(0xEC,0x0C); //STBA[15:8] Set_LCD_SPI_REG_8b(0xED,0xC4); //STBA[7:0] Set_LCD_SPI_REG_8b(0xE8,0x38); //OPON[7:0] Set_LCD_SPI_REG_8b(0xE9,0x10); //OPON1[7:0] Set_LCD_SPI_REG_8b(0xF1,0x01); //OTPS1B Set_LCD_SPI_REG_8b(0xF2,0x10); //GEN //Gamma 2.2 Setting Set_LCD_SPI_REG_8b(0x40,0x01); // Set_LCD_SPI_REG_8b(0x41,0x00); // Set_LCD_SPI_REG_8b(0x42,0x00); // Set_LCD_SPI_REG_8b(0x43,0x10); // Set_LCD_SPI_REG_8b(0x44,0x0E); // Set_LCD_SPI_REG_8b(0x45,0x24); // Set_LCD_SPI_REG_8b(0x46,0x04); // Set_LCD_SPI_REG_8b(0x47,0x50); // Set_LCD_SPI_REG_8b(0x48,0x02); // Set_LCD_SPI_REG_8b(0x49,0x13); // Set_LCD_SPI_REG_8b(0x4A,0x19); // Set_LCD_SPI_REG_8b(0x4B,0x19); // Set_LCD_SPI_REG_8b(0x4C,0x16); // Set_LCD_SPI_REG_8b(0x50,0x1B); // Set_LCD_SPI_REG_8b(0x51,0x31); // Set_LCD_SPI_REG_8b(0x52,0x2F); // Set_LCD_SPI_REG_8b(0x53,0x3F); // Set_LCD_SPI_REG_8b(0x54,0x3F); // Set_LCD_SPI_REG_8b(0x55,0x3E); // Set_LCD_SPI_REG_8b(0x56,0x2F); // Set_LCD_SPI_REG_8b(0x57,0x7B); // Set_LCD_SPI_REG_8b(0x58,0x09); // Set_LCD_SPI_REG_8b(0x59,0x06); // Set_LCD_SPI_REG_8b(0x5A,0x06); // Set_LCD_SPI_REG_8b(0x5B,0x0C); // Set_LCD_SPI_REG_8b(0x5C,0x1D); // Set_LCD_SPI_REG_8b(0x5D,0xCC); // //Power Voltage Setting Set_LCD_SPI_REG_8b(0x1B,0x1B); //VRH=4.65V Set_LCD_SPI_REG_8b(0x1A,0x01); //BT (VGH~15V,VGL~-10V,DDVDH~5V)

-P.29- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

Set_LCD_SPI_REG_8b(0x24,0x2F); //VMH(VCOM High voltage ~3.2V) Set_LCD_SPI_REG_8b(0x25,0x57); //VML(VCOM Low voltage -1.2V) //****VCOM offset**/// Set_LCD_SPI_REG_8b(0x23,0x88); //for Flicker adjust //can reload from OTP //Power on Setting Set_LCD_SPI_REG_8b(0x19,0x01); //OSC_EN='1', start Osc Set_LCD_SPI_REG_8b(0x01,0x00); //DP_STB='0', out deep sleep Set_LCD_SPI_REG_8b(0x1F,0x88);// GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_SPI_REG_8b(0x1F,0x80);// GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_SPI_REG_8b(0x1F,0x90);// GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 DelayX1ms(5); Set_LCD_SPI_REG_8b(0x1F,0xD0);// GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 DelayX1ms(5); //262k/65k color selection Set_LCD_SPI_REG_8b(0x17,0x60); //default 0x60 262k color // 0x50 65k color //Display ON Setting Set_LCD_SPI_REG_8b(0x28,0x38); //GON=1, DTE=1, D=1000 DelayX1ms(40); Set_LCD_SPI_REG_8b(0x28,0x3F); //GON=1, DTE=1, D=1100 //Set Window Area Set_LCD_SPI_REG_8b(0x02,0x00); Set_LCD_SPI_REG_8b(0x03,0x00); //Column Start Set_LCD_SPI_REG_8b(0x04,0x00); Set_LCD_SPI_REG_8b(0x05,0xEF); //Column End Set_LCD_SPI_REG_8b(0x06,0x00); Set_LCD_SPI_REG_8b(0x07,0x00); //Row Start Set_LCD_SPI_REG_8b(0x08,0x01); Set_LCD_SPI_REG_8b(0x09,0x3F); //Row End //################################################################## // Power Off Setting Set_LCD_SPI_REG_8b(0x28,0x38); //GON=’1’ DTE=’1’ D[1:0]=’10’ DelayX1ms(40); Set_LCD_SPI_REG_8b(0x1F,0x89); // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=1

DelayX1ms(40); Set_LCD_SPI_REG_8b(0x28,0x04); //GON=’0’ DTE=’0’ D[1:0]=’01’ DelayX1ms(40); Set_LCD_SPI_REG_8b(0x19,0x00); //OSC_EN=’0’ DelayX1ms(5); M51_WR_REG(U05_LCD_POWER_ON, 0x00); //VCI & IOVCC OFF

-P.30- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

3. OTP Programming YA[2:0]=11

1 YA[2:0]=11

0 YA[2:0]=1

01 YA[2:0]=1

00 YA[2:0]=0

11 YA[2:0]=0

10 YA[2:0]=0

01 YA[2:0]=0

00 Non-Progr

am XA[4:0]=00011 VMF17 VMF16 VMF15 VMF14 VMF13 VMF12 VMF11 VMF10 00h XA[4:0]=00100 VMF17 VMF16 VMF15 VMF14 VMF13 VMF12 VMF11 VMF10 00h XA[4:0]=00101 VMF17 VMF16 VMF15 VMF14 VMF13 VMF12 VMF11 VMF10 00h XA[4:0]=00110 VMH6 VMH6 VMH5 VMH4 VMH3 VMH2 VMH1 VMH0 00h XA[4:0]=00111 VML6 VML6 VML5 VML4 VML3 VML2 VML1 VM L0 00h XA[4:0]=01000 Valid_VM

L Valid_VM

H Valid_VMF

3 Valid_VMF

2 Valid_VMF

1 00h

XA[4:0]=01001 Valid_panel DDVDH_TRI

SS_Panel GS_Panel REV_Panel BGR_Panel 00h

Table 3. 1 OTP ADDRESS MAPPING

Note: Valid bit must program if user want use this OTP function

Find optimized value and record them

(Only ‘1’ needs to be programmed)

Set OTP_OTPEN=’1’ (R38h=14h)

Set OTP_PPRog=’1’ (R38h=16h)

Apply external Voltage to VPP 6.5V

Set related Address to XA[4:0] & YA[2:0]

Set OTP_PWE=’1’ (R38h=17h)

Set OTP_PWE=’0’ (R38h=16h)

Floating external Voltage 6.5V

Set OTP_PPRog=’0’ (R38h=04h)

Set OTP_OTPEN=’0’ (R38h=00h)

Re-Power on

Wait> 600us

Wait >1us

Wait >1us

Wait 1us

Wait >1us

Wait 1us

Wait 1us

Wait 1us

Wait 1us

-P.31- Himax Confidential

Sep, 2008

HX8347-D(T) 240RGB x 320 dot, 262k color, TFT Mobile Single Chip Driver

APPLICATION NOTE Preliminary V01

This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Himax.

4. Revision History

Version Date Description of changes 2008/08/11 New setup 2008/08/20 P7 and P13 modify VCOM setting 2008/09/15 Modify P11 SPI+RGB reference FPC circuit

Modify normal mode at 70Hz Modify P14 OTP Programming

2008/10/13 Add CMO 2.0” application 2008/10/17 1. Modify P8 P9 P10 CMO2.6” Power Off Setting,

Enter Sleep mode Setting, and Enter Deep Sleep mode Setting 2. Modify P14 P15 P16 CMO2.0” Power Off Setting, Enter Sleep mode Setting, and Enter Deep Sleep mode Setting

2008/11/12 Modify CMO 2.0” application circuit

01

2008/11/14 Add CMO 2.2” and 2.8” initial code