i2c bus

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Inter-Integrated Circuit (I 2 C)

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Page 1: I2C Bus

Inter-Integrated Circuit (I2C)

Page 2: I2C Bus

Inter-Integrated Circuit

Developed and patented by Philips for connecting low speed peripherals to a motherboard, embedded system or cell phone

Multi-master, two wire bus , up to 100 kbits/sec One data line (SDA) One clock line (SCL) Master controls clock for slaves Each connected slave has a unique 7-bit address

Page 3: I2C Bus
Page 4: I2C Bus

I2C is a low to medium speed serial bus with an impressive list of features:

Resistant to glitches and noise.

Supported by a large and diverse range of peripheral devices.

A well-known robust protocol.

A long track record in the field.

A respectable communication distance which can be extended to longer distances with bus extenders.

Page 5: I2C Bus

Protocol Transfers are byte oriented, msb first Start: SDA goes low while SCL is high Master sends address of slave (7-bits) on next

7 clocks Master sends read/write request bit

0-write to slave 1-read from slave

Slave ACKs by pulling SDA low on next clock Data transfers now commence

Page 6: I2C Bus

Terminology Transmitter – The device sending data to the bus Receiver – Device receiving data from the bus Master – device initiating a transfer, generates to clock

and terminates a transfer Slave – Device addressed by the master Multi-master – more than one master can attempt to

control the bus Arbitration – procedure to insure that only one master has

control of the bus at any instant Synchronization – procedure to sync then clocks of two or

more devices

Page 7: I2C Bus

Master-to-Slave Data Transfer

Clock is controlled by master Data is written to slave on next 8 clock pulses Data receipt is acknowledged by slave on 9th

pulse by pulling SDA low When slave releases SDA master can send

next byte Master will eventually set a Stop condition by

making a low to high transition on SDA with SCL is high

Page 8: I2C Bus

Complete I2C Transfer Data transfer is initiated with the START bit (S) when SDA is pulled low while SCL stays high. Then, SDA sets the transferred bit while SCL is low and the data is sampled (received) when SCL rises .When the transfer is complete, a STOP bit (P) is sent by releasing the data line to allow it to be pulled up while SCL is constantly high

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Page 11: I2C Bus

I2C Extensions

10 bit addressing (up to 1024 addresses)

Fast mode – up to 400 kbits/sec

High-Speed – up to 3.4 Mbits/sec

Page 12: I2C Bus

(I2C) Applications

Simple Hardware standard. Simple protocol standard.

• Easy to add / remove functions or devices (hardware and software).

• Easy to upgrade applications. Very convenient for monitoring application

• Fast enough for all “Human Interfaces” applications –Displays, Switches, Keyboards–Control, Alarm systems