ibm rs 6000 greg young, nathan einsig, rich zizik, ben noble
TRANSCRIPT
IBM RS 6000
Greg Young, Nathan Einsig,
Rich Zizik, Ben Noble
IBM History
• IBM began in the state of New York on June 15, 1911
• Computing-Tabulating-Recording Company
• Thomas Watson joins company in 1914– Defines a new way of running a company
– Preached a positive outlook, and his favorite slogan, "THINK," became a mantra for C-T-R's employees.
• Company grew during great depression while the rest of the economy declined
• As far back as 1932 IBM was target for antitrust actions due to its enormous success
RS 6000 History• RS stands for RISC system
– RISC was produced in early 1974 for a telephone switching network
– Project terminated, but design was implemented with miniprocessors
– First machine to use RISC was the 801
• RISC was inexpensive, but had high performance– Separates data and instruction caches allowing high
bandwidth between memory and CPU
– Simplified pipeline allows faster processing
RS 6000 History
• RS 6000 used for the famous Deep Blue system
• May 1997 Deep Blue defeats World Chess Champion Garry Kasparov in a six game match
• Provoked a world debate debate on how close computers could come to approximating human intelligence
Role in Marketplace
• The RS 6000 is IBM’s flagship processor
• The RS 6000 chip is used in many of IBM’s servers and workstation platforms
• Ability to systematically explore vast numbers of variables lends itself to heavy processing tasks
Role in Marketplace
• As shown in Deep Blue the chip is capable of closely simulating human intelligence
• Capable of running complex autonomous programs
• Ideal for systems that are used for agent design and implementation
• Highly capable for running agent software such as Artificial Neural Networks
Role in Marketplace
• Used in:– air traffic control– modeling of financial data– development of new drug therapy– forecasting weather– NASA satellites– beating the worlds best chess player
Form of RISC Architecture
Predominantly RISC Some more complex instructions are
performed via software Second-generation RISC engine based on
the new IBM POWER architecture
Superscalar Architecture
Divides work among different functional units operating in parallel
Benefit– Improves Cycles/instruction– Higher Performance achieved
Superscalar Architecture
Drawback– Can Require Substantial Hardware
• more than can fit on one chip in the available CMOS technology
Solution– They use a compiler that delivers maximum
performance out of minimum hardware– Assigned registers to functional units
RS-6000 Processor
• Three Main Units– Fixed-Point Unit– Floating-Point Unit– Branch Unit– Each unit has its own register set
• Units Operate In Parallel– Synchronization signals passed between Fixed-
Point and Floating-Point Units
Fixed-Point Unit
• Performs data-address computations– For itself and the Floating-Point Unit
• Schedules Data Movement – For itself and the Floating-Point Unit
• Checks for Interrupt– Signals passed to Floating-Point Unit
• The two units operate in overlap manner
Floating-Point Unit
• Not a Coprocessor– design allows for enhanced floating-point
arithmetic
• Loads and Stores for Unit– done by Fixed-Point Unit
• 64 bit Multiply-Add Instruction– accomplishes (A * B) + C in one cycle
Branch Unit
• Overall Controller of Units– insures the integrity of program execution
Instruction Set
Adapted Instruction Set of IBM 801 Added more complex instruction
VLSI allowed for more complex instructions
All Instructions are 32 bits long Simple register oriented instruction set