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BY :- AM IT R. NAIKWADE

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Page 1: Ic Tester Report

BY :- AMIT R. NAIKWADE

Page 2: Ic Tester Report

Digital IC Tester

TABLE OF CONTENTS

Sr. No.

CONTENTS Page No.

1 Abstract 51 Introduction to digital IC tester 62 Background 83 Block Diagram 104 Features of IC tester circuit 105 Technical Specifications 115 Introduction to LCD 126 Introduction to KEYPAD 137 IC tester circuit diagram 148 PCB Layouts 159 Algorithm of program 17

10 Flow chart 1811 Logic involved 1912 Code for IC testing 2013 Problems and Troubleshooting 4014 Conclusions 4215 Future Scope of Work 4316 Component list and their cost 4417 References 4618 Software used 46

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Digital IC Tester

ABSTRACT

The digital IC tester is implemented by using the 89C51 microcontroller board.

The processing of the inputs and outputs is done by the microcontroller. The display part on

the microcontroller board is modeled using LCD. After the successful testing of the IC, the

result is displayed on the LCD.

The basic function of the digital IC tester is to test a digital IC for correct logical

functioning as described in the truth table and/or function table. It can test digital ICs having a

maximum of 24 pins. Since it is programmable, any number of ICs can be tested within the

constraint of the memory available. This model applies the necessary signals to the inputs of

the IC, monitoring the outputs at each stage and comparing them with the outputs in the truth

table. Any discrepancy in the functioning of the IC results in a fail indication, displays the faulty

and good gates on the LCD. The testing procedure is accomplished with the help of keys

present on the main board.

At this stage we had completed to test the most common used digital IC's used in our laboratories, mainly belonging to the 74TTL series and successfully completed writing assembly code for 10 IC’s. This tests various types of IC's like OR, XOR, NAND, AND, NOT, NOR, XNOR GATES and also FULL ADDER, MULTIPLEXER, SHIFT REGISTER.

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Digital IC Tester

INTRODUCTION

In any manufacturing industry there are continuous efforts in cost reductions, upgrade

quality and improve overall efficiencies. In electronic industry, with dramatic increase in circuit

complexity and the need for the higher levels of reliability, a major contributor cost in any

product can be in the testing. However we should recognize in the real world that no product

is perfect, so that testing and in particular automatic testing will be an essential part of

production in the foreseeable future.

In industries, research centers and college, some common IC's are frequently used;

many times people face problems due to some fault in these integrated circuits. So it is very

essential to test them before actually using them in any of the applications. Microcontroller

based digital IC tester is best solution for these problems.

This project has the capability of testing any available digital IC of the TTL or CMOS

family of 24 pins. The main advantage over the industry standard for the project is its low cost

and eases of updating to any new IC design which may be inducted in the market by any

company only through software updating.

The IC-tester tests the basic logic gates used in the digital laboratory of colleges. It

uses 89c51 as the controlling and processing unit. The keyboard and the display circuits are

interfaced with the master microcontroller. The input is given to the corresponding pins of the

IC to be tested using program stored in micro-controller acting as slave. The output is taken

from the relevant pin. It is compared with the look-up table of that IC being stored in the

memory. Depending on the result of comparison, the output is displayed in the LCD display.

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Digital IC Tester

Microcontrollers have become ubiquitous in electronic applications.

However the system supported by these devices has become exceedingly complex in terms of

functionality and the quantity of peripheral components. In recent years the boundaries of such

systems have stretched to include additional peripheral components marking the advent of

system-on-chip(S o C). The motivation to develop such devices has been to increase

functionality and performance while reducing system cost, integrity complexity and power

dissipation.

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Digital IC Tester

BACKGROUND OF DIGITAL IC TESTER

The digital IC tester is implemented in order to test the digital IC’s to verify the faulty

gates and the good gates. The necessary inputs to the gates of the IC to be tested which is

placed in the ZIF socket is received from the slave micro-controller IC and corresponding

outputs are accumulated and sent to the same controller IC where the output is compared

with the functional or the logic table and if any discrepancy results, it displays the fail in the

LCD display screen. Analog IC tester is also available in the market which was replaced by this

digital IC tester which is more sophisticated by performing the tasks in a much easier fashion

and the execution time also very fast in it

The primary purpose of this digital IC tester is that it can easily check the IC within due

course of time and if any discrepancy results then it determines the gates which were good

ones and which were the bad ones. The manual operation or a human intervention includes

testing of each individual IC by making necessary connections and verifying the outputs for

each gate by the truth table is a time taking and tedious process.

With the implementation of the micro controller units it makes the job much easier to

receive data for the respective gates and process output and display results. The operation of

a MCU based controller is determined primarily by its program.

Microcontrollers are versatile. MCUs are very useful, since its approach is

programmable, many additional features are possible at little or no added cost.

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Digital IC Tester

And the main advantage of this circuit is that whenever a new IC is to be tested it does

not include any addition of hardware but a slight updating in the software code is sufficient

enough.

The IC TESTER CIRCUIT is one among the many applications of the MICROCONTROLLER

BOARD. The IC which is to be tested is mounted on the ZIF socket. The inputs are fed to the IC

which is primarily processed through the slave controller board. The program is written in

such a way that comparisons are to be made between the expected data from the truth table

and the data that is obtained from the data bus which is nothing but the outputs of the IC that

is in testing process. Finally a display has to be made on the LCD display which is located in the

main controller board specifying which gates of the IC are working and which are not.

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Digital IC Tester

FEATURES OF IC TESTER

1: User friendly set up and operates.

2:16 X 2 character LCD display.

3: Built in 2 functions and 10 numerical keys.

4: Identifies over 10 CMOS / TTL digital ICs (up to16 pins).

5: Various LED’S and LCD display to present the test results FAIL or PASS.

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TECHNICAL SPECIFICATIONS:

FAMILY : TTL, CMOS,

RANGE : Logic Gates, Shift Register, Adder and Multiplexer can be tested. TEST SOCKETS : A single 24 pin ZIF sockets for IC Testing.

PACKAGE : DIP14, 16, 20 and 24 pins.

DISPLAY : 16X2 LCD Display. INDICATOR LEDs: 4 bright LEDs of 3 mm each.

KEY PAD : 4X3 MATRIX TYPE.

ELECTRICAL : 230 V (+/- 10 %), 1 phase, 50 Hz (+/- 2 %)

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LCD

The LCD in the board is 16X2 characters display.

PIN DIAGRAM OF 16X2 LCD:

DB0-DB7: Data pins

RS: Register select. If RS =0, the instruction command code register is selected, allowing the

user to send a command such as clear display, cursor at home etc. If RS=1, the data register

is selected allowing the user to send data to be displayed on the LCD.

R/W: Read or Write. R/W=1 when reading;

R/W=0 when writing.

E: Enable. The Enable pin is used by LCD to latch information presented to its data pins.

When data is supplied to data pins, a high to low pulse must be applied to this pin in order

for the LCD to latch in the data present at the data pins.

LCD COMMAND CODES:

08 h-Displays off, cursor off

01h-Clear Display screen

06-Increment cursor (shift cursor to right)

0ch- Display on, cursor off.

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Digital IC Tester

80H – Force cursor to beginning of first line

0C0h - Force cursor to beginning of first line

4X3 KEY-PAD:

Row pins are connected to lower 4 pins of port 1. And column pins are connected to lower 3

pins of port 3.

The keyboard section is as shown in the figure below. The keyboard is designed as a matrix and is interfaced to port 1 of the master IC. Here P1.0, P1.1, P1.2, P1.3 are configured as input ports, and P3.0, P3.1, P3.2 are configured as output ports. The keyboard consists of 10 digits as well as an ‘ENTER’ button and ‘RESET’ button.

In case of matrix Keypad both the ends of switches are connected to the port Pin. Over here we have considered a 4x3 matrix keypad i.e. four rows and three columns. So in all twelve switches have been interfaced using just seven lines. The adjoining figure shows the diagram of a matrix keypad and how it is interfaced with the controller.

As you can see no pin is connected to ground, over here the controller pin itself provides the ground. We pull one of the Column Pins low & check the row pins if any of the Pin is low then we come to know which switch is pressed.

Suppose we make column 1 pin low and while checking the rows we get Row 3 is low then we come to know switch 7 has been pressed.

EXPERIMENTAL ASPECTS:

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CIRCUIT DIAGRAM

PCB LAYOUTS

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Track Side

Component Side

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PCB LAYOUTS

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ALGORITHM OF CODE FOR DIGITAL IC TESTER

I. Begin.

II. Reset the circuit.

III. Initialize the LCD.

IV. Display the message “Enter IC number”.

V. Wait for some time.

VI. Press the IC number on the keypad.

VII. Display the IC number.

VIII. Send the code of the respective IC from master microcontroller to slave microcontroller.

IX. Check the working of IC depending upon the truth tables and functional tables.

X. Depending upon the output, give the control signals to the master microcontroller to

display respective messages on LCD.

XI. Stop.

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FLOWCHART OF THE IC TESTER PROGRAM

LOGIC TO TEST AN IC

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Start

Reset the Circuit

Initialize the LCD

Display the Message

“Enter IC no.”

Accept and Display

IC no

Check IC working

Stop

Send control signals to Master

Display messages on LCD

Send IC no. to slave

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The logic to test an IC is very simple. We can test it using their truth tables and functional tables. In case of logic gates, we should check truth tables and in case of ICs like shift register, full adder, multiplexer etc we should check functional tables.

Let us take an example of logic gate IC 7400 i.e. NAND gate. In this gate first two terminals are the inputs and third terminal is the output. So we are externally giving inputs to first 2 pins of IC and checking the 3rd terminal. If the desired output is obtained, LCD displays PASS and if the output is wrong, LCD displays FAIL.

PROGRAM FOR MASTER CONTROLLER

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; FOR OLD KIT

; FOR MICRONTROLLER WITH DIP PACKAGE.

PN EQU 40H

ORG 00H

LJMP MAIN

ORG 50H

MAIN:

MOV R6, #00H

MOV R1, #00H

MOV SP, #70H ; stack pointer to 70h

LCALL LCDINIT ; LCD INITIALISATION

MOV A, #80H ; SELECT FIRST LINE

LCALL COMMAND ; SAVE TO COMMAND

MOV DPTR, #MSG1 ; DISPLAY FIRST MESSAGE

MOV R7, #0FH ; NUMBER OF CHAR TO DISPLAY

LCALL DISPLAY

LJMP K

LCDINIT:

MOV A, #20H

LCALL COMMAND

MOV A, #28H

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LCALL COMMAND

MOV A, #08H

LCALL COMMAND

MOV A, #01H

LCALL COMMAND

MOV A, #06H

LCALL COMMAND

MOV A, #0DH

LCALL COMMAND

MOV A, #0CH

LCALL COMMAND

RET

COMMAND:

LCALL READY

PUSH 07H ; STORE THE CONTENT OF R7

MOV R7, A

ANL A, #0F0H

SWAP A

MOV P0, A

CLR P0.6; RS=0

CLR P0.5; W=0 WRITE

SETB P0.4; E=1

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NOP

CLR P0.4; E=0

MOV A, R7

ANL A, #0FH

MOV P0, A

CLR P0.6; R=0

CLR P0.5; W=0

SETB P0.4; E=1

NOP

CLR P0.4

POP 07H

RET

READY:

PUSH 0E0H

WAIT:MOV P0, #0FH

CLR P0.4

CLR P0.6

SETB P0.5

SETB P0.4

MOV A, P0

CLR P0.4

SETB P0.4

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NOP

NOP

CLR P0.4

JB 0E3H, WAIT

POP 0E0H

RET

DATA1:

LCALL READY

PUSH 07H ; STORE THE CONTENT OF R7

MOV R7, A

ANL A, #0F0H

SWAP A

MOV P0, A

SETB P0.6; RS=1

CLR P0.5; W=0 WRITE

SETB P0.4; E=1

NOP

CLR P0.4; E=0

MOV A, R7

ANL A, #0FH

MOV P0, A

SETB P0.6; R=1

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CLR P0.5; W=0

SETB P0.4; E=1

NOP

CLR P0.4

POP 07H

RET

DISPLAY: LCALL DEBOUNCE

CLR A

MOVC A,@A+DPTR

LCALL DATA1

INC DPTR

DJNZ R7, DISPLAY

RET

K: Nop

K1: MOV P3, #0FH ; MAKE P3 AS INPUT PORT

MOV P1, #00H ; MAKE P1 AS I/P PORT

MOV A, P3 ; STORE THE KEY STATUS IN A

ANL A, #00000111b

CJNE A, #00000111b, K1 ; CHECK FOR ALL KEY RELEASED

K2: MOV P3, #0FH ; MAKE P3 AS INPUT PORT

MOV P1, #00H ; MAKE P1 AS I/P PORT

MOV A, P3 ; STORE THE KEY STATUS IN A

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ANL A, #00000111b

CJNE A, #00000111b, K3 ; CHECK FOR ANY KEY PRESSED

AJMP K2

K3: LCALL DEBOUNCE ; FOR DEBOUNCE CHECKING

MOV P3, #0FH ; MAKE P3 AS INPUT PORT

MOV P1, #00H ; MAKE P1 AS I/P PORT

MOV A, P3 ; STORE THE KEY STATUS IN A

ANL A, #00000111b

CJNE A, #00000111b, DETECTKEY ; CHECK FOR ANY KEY PRESSED

AJMP K2

DETECTKEY:

MOV P1, #11111110B ; CHECK ROW0 1 (0 4 8 C)

MOV A, P3

ANL A, #00000111b

CJNE A, #00000111b, ROW0

MOV P1, #11111101B ; CHECK ROW1 (1 5 9 D)

MOV A, P3

ANL A, #00000111b

CJNE A, #00000111b, ROW1

MOV P1, #11111011B ; CHECK ROW2 (2 6 A E)

MOV A, P3

ANL A, #00000111b

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CJNE A, #00000111b, ROW2

MOV P1, #11110111B ; CHECK ROW3 (3 7 B F)

MOV A, P3

ANL A, #00000111b

CJNE A, #00000111b, ROW3

LJMP K2 ; GO TO START TO CHECK KEY RELEADSED

ROW0:MOV DPTR, #KEYCODE0

LJMP FIND

ROW1:MOV DPTR, #KEYCODE1

LJMP FIND

ROW2:MOV DPTR, #KEYCODE2

LJMP FIND

ROW3:MOV DPTR, #KEYCODE3

LJMP FIND

FIND: RRC A

JNC MATCH

INC DPTR

SJMP FIND

MATCH: mov r0, #50h

CLR A

MOVC A,@A+DPTR

MOV R4, A

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Cjne a, #45H, x1

ljmp enter

x1: cjne a,#52H,x2

ljmp reset1

x2: SUBB A,#30H

MOV B,A

mov @r0,B

inc r0

inc r1

CLR A

MOV A,R6

CJNE A,#00H, KEYOUT2

INC R6

LCALL KEYOUT1

LCALL KEYOUT

KEYOUT3:LJMP K

KEYOUT2: LCALL KEYOUT

SJMP KEYOUT3

KEYOUT1:MOV A,#0CH

LCALL COMMAND

MOV A,#0C4H

LCALL COMMAND

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RET

KEYOUT :MOV A,#06H

LCALL COMMAND

MOV A,R4

LCALL DATA1

RET

enter:mov a,@r0

mov r7,a

dec r0

mov a,@r0

swap a

orl a,r7

mov b,a

cjne r1,#04h,e3

e1: mov dptr,#enter1

mov r5,#00h

movc a,@a+dptr

cjne a,b,e2

mov p2,r5

sjmp Q

e2: inc r5

inc dptr

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sjmp e1

e3: mov r5,#08h

mov dptr,#enter2

movc a,@a+dptr

cjne a,b,e4

mov p2,r5

SJMP Q

e4: inc r5

inc dptr

sjmp Q

reset1:lcall lcdinit

ljmp MAIN

DEBOUNCE: MOV R2,#255

HERE1 :MOV R5,#255

HERE : DJNZ R5,HERE

DJNZ R2,HERE1

RET

MSG1: DB "ENTER IC NO:- "

enter1:db '00','02','04','08','32','86','83','95'

enter2: db '86','51'

KEYCODE0 : DB '0','1','2'

KEYCODE1 : DB '3','4','5'

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KEYCODE2 : DB '6','7','8'

KEYCODE3 : DB '9','E','R'

Q:NOP

END

PROGRAM FOR SLAVE CONTROLLER:

l1: mov a,p0

cjne a,#0h,l1

mov a,p0

mov dptr,#t11

movc a,@a+dptr

t11:db 01h,02h,03h,04h,05h,06h,07h,08h,09h,0ah

cjne a,#01h,y1

nand0:

mov r0,#00h

mov r1,#00h

mov r2,#00h

mov r3,#00h

mov r4,#00h

nand1 :

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lcall n00 ;CHECK FOR INPUTS 00

acall nand2

lcall n01 ; CHECK FOR INPUTS 01

acall nand2

lcall n10 ; CHECK FOR INPUTS 10

acall nand2

lcall n11 ; CHECK FOR INPUTS 11

acall nand6

nand2:jnb p0.2,nand3 ;CHECK THE OUTPUT

inc r0 ;INCREMENT R0

nand3:jnb p0.5,nand4

inc r1 ; INCREMENT R1

nand4:jnb p2.1,nand5

inc r2 ;INCREMENT R2

nand5: jnb p2.4,a11

inc r3 ; INCREMENT R3

a11: ret ;RETURN

nand6:jb p0.2,nand7

inc r0

nand7:jb p0.5,nand8

inc r1

nand8:jb p2.1,nand9

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inc r2

nand9:jb p2.4,a1

inc r3

a1: ljmp w

y1: cjne a,#02h,y2

adder:setb p0.4 ;A=1010 AND B=1011

clr p2.5

clr p2.3

clr p2.1

setb p0.7

clr p0.2

setb p0.0

setb p2.2

setb p2.6

clr p0.3

setb p2.7

jnb p2.0,adder1

inc r0

adder1:jb p0.5,adder2

inc r0

adder2:jnb p0.1,adder3

inc r0

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adder3:jb p2.6,adder4

inc r0

adder4:jnb p2.4,adder5

inc r0

adder5:cjne r0,#05h,adder6

setb p1.2

setb p3.7

ljmp q

adder6:setb p3.6

y7: cjne a,#8h,y8

shiftreg:mov p0,#40h

clr p2.1

setb p2.2

setb p2.7

nop

jnb p2.6,s1

inc r0

s1: clr p2.2

lcall delay

setb p2.2

jnb p2.5,s2

inc r0

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s2: clr p2.2

lcall delay

setb p2.2

jnb p2.4,s3

inc r0

s3: clr p2.2

lcall delay

setb p2.2

jnb p2.3,s4

inc r0

s4: cjne r0,#04h,s5

setb p1.2

setb p3.7

ljmp q

s5: setb p3.6

ljmp q

delay: mov r7,#0ffh ;DELAY

delay2:mov r6,#0ffh

delay1:djnz r6,delay1

djnz r7,delay2

y8: cjne a,#9h,y9

mux: mov r0,#00h

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clr p0.6

clr p0.7

mov p2,#80h

setb p0.3

jnb p0.4,mux1

inc r0

mux1:clr p0.3

mov p2,#84h

setb p0.2

jnb p0.4,mux2

inc r0

mux2:clr p0.2

setb p0.1

mov p2,#82h

jnb p0.4,mux3

inc r0

mux3:clr p0.1

setb p0.0

mov p2,#86h

jnb p0.4,mux4

inc r0

mux4:clr p0.0

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setb p2.3

mov p2,#81h

jnb p0.4,mux5

inc r0

mux5:mov p2,#85h

jnb p0.4,mux6

inc r0

mux6:mov p2,#83h

jnb p0.4,mux7

inc r0

mux7:mov p2,#87h

jnb p0.4,mux8

inc r0

mux8:cjne r0,#8h,mux9

setb p1.2

setb p3.7

sjmp mux10

mux9:setb p3.6

mux10:ljmp q

y10: mov p0,#00100000b

ljmp q

;INPUTS 00

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n00: clr p0.0

clr p0.1

clr p0.3

clr p0.4

clr p2.3

clr p2.2

clr p2.6

clr p2.5

ret

;INPUTS 01

n01: clr p0.0

setb p0.1

clr p0.3

setb p0.4

clr p2.3

setb p2.2

clr p2.6

setb p2.5

ret

;INPUTS 10

n10: setb p0.0

clr p0.1

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setb p0.3

clr p0.4

setb p2.3

clr p2.2

setb p2.6

clr p2.5

ret

;INPUTS 11

n11: setb p0.0

setb p0.1

setb p0.3

setb p0.4

setb p2.3

setb p2.2

setb p2.6

setb p2.5

ret

w: cjne r0,#4h,x

setb p1.2

inc r4

x: cjne r1,#4h,y

setb p1.3

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inc r4

y: cjne r2,#4h,z

setb p1.4

inc r4

z: cjne r3,#4h,z3

setb p1.5

inc r4

z3: cjne r4,#04h,q1

setb p3.7

lcall q

q1: setb p3.6

lcall q

q: nop

end

EXPERIMENTAL OBSERVATIONS

Problems & Trouble shooting

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Problems do occur even with perfect designed circuit the problems that are faced during the

project

Use of NOP command

Considerable delays

Supply and ground to IC

Operating system for downloading hex code

Even though there are no errors in the code and the logic is also correct, sometimes

there will be a distraction on the LCD screen during displays we have to use the NOP

command- No Operation command adequate number of times such that there doesn’t occur

any characters other than the desired ones.

Considerable delays are to be given during the issue of control commands to LCD. We

know that controller is faster than the external I/O devices. So we use delays in between the

issue of control and data commands to LCD screen.

While writing procedures for the IC to be tested, the first step is to give supply and

ground connections to the IC and later proceed with the testing code. Without giving supply

and ground connections to IC, if we implement the code that is, first the logic later the supply

connections, the logic will not work i.e., it is futile. So always keep in mind that, be sure of

supply and ground connections and later proceed with the logic.

It is better to implement the design of the code in either Windows NT or windows XP

operating system for downloading the hex code in to controller board. The .exe files are

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compatible for Windows NT or windows XP operating system but not recommended for

Windows 95 or windows 98. It is recommended to work with windows 2000 professional

operating system

CONCLUSIONS

The project has been successfully completed and the main objective of emulating an IC tester

on 89c51 micro controller has been achieved. For a given specification any IC can be checked

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for its functionality. It takes more time to test an IC manually, with the implementation of the

system with microcontroller makes the testing procedure simpler.

So we conclude that any digital IC with the given specifications can be implemented on

IC tester circuit. This system is capable of testing the IC’s having up to 24 pins.

FUTURE SCOPE OF WORK

This digital IC tester can test various digital IC families just by the software

updating. In this project the code is written for 10 IC’s which can be extended to digital

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families of 74XX and 40XX, but the code written might be reaching out of bounds of memory

that is available in the microcontroller. That is due to the RAM may not be sufficient to

support the whole code so we have to interface extra memory chips.

The availability of large memory capacity makes the PIC processor the best suited

surrogate for microcontroller with optimal features. So far the IC to be tested is mounted on

the ZIF socket, and the respective details of the IC are selected form the menu provided in the

micro controller board. This in turn produces the results by displaying if the IC is working or

not by mentioning the gates. One special feature which makes this project, true equipment for

industrial purpose is that to have a search procedure included in it. The search procedure is

used, so that if we place an IC in the ZIF socket the entire process of identifying the IC and then

selecting and sending the inputs to the IC’s should be done by this procedure.

This circuit has been designed with an aim to test an IC having up to 24 pins. So

necessary steps should be taken in order to utilize this project to be implemented for digital

IC’s having pins more than 24.

COMPONENT LIST & BILLING

Sr. No. COMPONENTS SPECIFICATIONS QTY

PRICE (RS)

1 AT 89C51 4 8 BIT I/O PORT, 128KB FLASH 4KB RAM 2 120

2 LCD MODULE 16X2 2 200

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Digital IC Tester

4 KEYPAD 4X3 MATRIX 1 120

5 ZIF SOCKET 24 PINS 1 90

6 CAPACITORS 10µF(25V), ELECTROLYTIC 1 2

33pF CERAMIC 4 4

1000 µF(25V), ELECTROLYTIC) 1 3

0.1 µF(25V), ELECTROLYTIC) 1 2

1 µF(25V), ELECTROLYTIC) 1 2

7 RESISTORS 8.2KΏ(1/4W) 2 2

10kΏ(1/4W) 1 1

100 Ώ(1/4W) 4 2

1kΏ(1/4W) 1 1

8 RESISTOR STACK 4.7KΏ(9 PIN) 2 6

4.7KΏ(8 PIN) 1 3

CRYSTAL 11.059 MHZ 2 20

9 DIODE 1N4007 4 8

10 LEDS RED 2 2

GREEN 2 2

11 IC 7805 +5V regulator 1 12

12 POWER CONNECTOR 1 8

13 RELIMENTS (2X2) 2 20

(4x4) 1 15

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(8X8) 4 60

14 CONNECTOR 16 PIN 1 30

7 PIN 1 10

15 SWITCH PUSH BUTTON TYPE 1 5

16 TRANSFORMER 230V-9V STEP DOWN, 500 mA 1 45

17 PCB MICROCONTROLLER BOARD 1 150

ZIF SOCKET BOARD 1 75

POWER SUPPLY BOARD 1 10

18 CASING 200

TOTAL 1230

REFERENCES

I. The 8051 micro-controller and embedded systems by MAZIDI.

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II. Kenneth J.Ayala, The 8051 Microcontroller, Penrum International Publications

III. www.alldatasheet.com

SOFTWARE USED

I. NOVARM DIP TRACE: for PCB layout

II. PG4UW BY ELNEC SOFTWARES

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