icsense asic for mems

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© ICsense NV | ConfidentialWWW.ICSENSE.COM

February 2016

ASIC design and supply for MEMS

https://www.youtube.com/watch?v=q_ly11ANtJQ&list=UU5toVKZVucJ-CK8s7gg-yIw

https://www.youtube.com/watch?v=q_ly11ANtJQ&list=UU5toVKZVucJ-CK8s7gg-yIw

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Chip miracle2

“ This MEMS lab-on-chip ASIC identifies cancer tumor cells. It contains 10.000 through-silicon holes to trap the cells. Every hole has its own dedicated analog-front-end that measures the cell’s impedance. This chip was manufactured in a 0.35um BCD process. It is the largest ASIC so far designed at ICsense (12mm x 14mm)

www.icsense.com

Trends in MEMS. Challenges for the ASIC.

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excellence | innovation | trustCONFIDENTIAL © ICsense

Trends in MEMS

Consumer market is important driver for MEMS

• MEMS become cheaper

• MEMS become smaller

• Higher noise

• Less sensitivity


MEMS ASIC:

Lower power

Lower noise

Lower area

© Chipworks


Trends in MEMS

Continued integration

• 6 DoF: 3-axis accelero + 3-axis gyro

• 9 DoF: + 3-axis magneto

• +10 DoF: + pressure/altimeter/humidity

• All in one package / ASIC


© Yole development

MEMS ASIC:

Lower power

Lower area

Higher complexity

“Innovation is likely to occur in the signal processing ASIC and packaging, rather than in the MEMS part of the product”

(quote St. J. Dixon-Warren, Chipworks on MEMS microphones)


Challenges for MEMS-ASIC co-design

Performance up, cost down

• Lower power

• Lower size

• Higher integration

• More features

• Standard technologies

IC design to cross the chasm

• MEMS co-design

• Improved architectures

• Deploy digital force

• Technology

• Circuit innovations

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Challenge 1: importance of good MEMS modelling

Physical model ≠ electrical model

Physical parameter in, digital out

• System level specs (datasheet)

• MEMS measurements

• FEM

Details for electrical model:

• Cpar

• Vlatch/hold

• Temp effects

• Process variations

• Non-linearities

• Offset and gain errors

• Noise levels

• Quadrature signals (IMU)

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Simplified electrical model of accelerometer

FEM model of pre stressed micro mirror (COMSOL)


Challenge 2: noise

Noise of MEMS system

Proportional to

• 1/(V_drive)2 (technology)

• ΔC/C fixed (MEMS)

• Sqrt(current consumption) (circuit)

•Mechanical sensor noise (MEMS)

•Driver noise (circuit)

Therefore lower noise by

++++ Increase of drive voltage

++ Increase of sensitivity (ΔC ) (<> linearity)

++ Decrease of fixed cap and/or parasitic capacitances

+ Increase in current

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Challenge 3: circuit level focus

Circuit optimization and innovation

Ultra-low-power techniques for read-out

• Current domain operation, Class AB

•ULP and low area ADC

• Time versus accuracy and hardware

• Read-out instrumentation in a few uA’s

Highly-accurate oscillators to lock on to MEMS

•High temperature/noise/supply stability

• ΔΣ Fractional-N techniques

Power management

High voltage drive

•High accuracy DAC

• Added cost and complexity

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Optimal performance through system optimization• Co-design of MEMS and ASIC• Architecture choice• Technology choice• Circuit choice


Challenge 4: selecting the right technology

Separate MEMS process enables optimal ASIC technology choice

Maximum voltage determines maximal SNR

Digital force of low cost technologies (CMOS)

•Move as much processing to the digital domain (~SDR)

•Digital becomes area and power dominant

•Move to lower technology nodes 0.18um → 0.13um → 90nm

Area/size

• Exploit digital scaling

• Analog hardly scales

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Why moving so much to the digital domain ?• More flexibility• Filtering in digital domain is easier• Calibration of analog circuits• Time-accuracy trade-off


Mixed-signal ASIC design flow

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Foundry and technology selectionWafer fabrication (MPW, MLM, SLM)ATE test HW/SW developmentPlatform selection: Teradyne, Credence, …Assembly (QFN, BGA, WLCSP,…)

ESD/LU, HTOL, HAST, …AEC-Q100Skew lots

DfT/DfM (Design for Test/Manufacturing)Development and verification100% PVT corner coverageFME(D)A, (A)SIL

Worldwide ASIC supplyWafer ordering, test/assembly Screening/burn-inQuality control Yield managementCustomer returns and FA

ASIC

DEFINITION

DEVELOPMENT

& VALIDATION

MANUFACTURING,

ASSEMBLY & TEST

QUALIFICATION &

INDUSTRIALIZATION SUPPLY



MEMS data processing is increasing. Digital design important !

• Automation to minimize fault occurrence• Extensive use of coverage and assertions • Power aware verification

Typical requirements

• I2C - SPI master/slave • 1-wire communication • Flash, EEPROM and OTP controllers• DSP data-paths • MCU core integration with on-chip peripherals • Dedicated FSM (Finite-State-Machine) and closed-loop systems

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=> Solid mixed-signal ASIC design flow is key to success


Mixed-Mode


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Mixed-mode simulationsModel-based

Full mixed-mode simulationsAMS (multiple solvers)Models/schematics/xRCRegression suits

Analog: Matlab controlled

LayoutVirtuoso (GXL)

Digital: Script controlled

Schematic entryVirtuoso

SimulatorsSpectre, APS, XPS, UltraSim, AFS

ModelingSimulinkVerilogA(MS)

SimulatorsIncisiveVCS

SynthesisTest InsertionClock gatingIsolation gates

VerificationLEC/Formal verificationPower analysis(UPF, CPF)Assertion coverageConstraint randomized

HDLanguagesVHDLVerilogSystemVerilogSystemC

System levelModeling

Matlab + Simulink

Place & routeATPG Test patterns

Physical Verif.Calibre DRC, LVS Calibre xRCPVS



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Enhance first-time-succes through:• Structured design environment

• Traceability, systematic design approach

• Full Mixed-Signal coverage (analog + digital under 1 roof)

• Version control systems for co-design in larger design teams

Modelling Block level Top level Mixed-mode Digital

Verilog-A Spectre Ultrasim AMS (+Spectre)

Verilog

Verilog-AMS Spectre RF APS AMS (+APS) VHDL

Simulink AFS (BDA) AFS (BDA) AMS (+Ultrasim)

System-Verilog

Matlab APS System-C

PSL/CPF/UPF

Design tools supported at ICsense


Business aspects

Top 5 reasons for ASIC

1. small form factor

2. reduce product’s bill-of-material

3. protect your IP

4. lower power consumption

5. increase performance/reliability

Breakdown ASIC cost

1. Silicon area

2. Package

3. Test time during production

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Business aspects

Unit price can be minimized through:

1. Silicon area minimization (!!)

2. Test time optimization

3. Packaging and connection methods

4. Finding the best technology fit (technical + commercial)

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Important considerations before starting ASIC designTrends in MEMS. Challenges for the ASIC.

www.icsense.com

About ICsense

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Facts

Mixed-signal IC design and ASIC supply

Experts in analog, mixed-signal and high-voltage

Largest independent European design group

Unique, risk mitigating design methodology

• First silicon success

• Fastest time-to-market

• 100% project execution success

Skilled in innovative, first-of-a-kind ASIC developments

ISO9001 / ISO13485 certified

Design HQ in Leuven, Belgium. Founded in 2004.

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Corporate overview


Facts

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Corporate overview

93%

Repeat Business

On-site designers

D&BFinancial rating

50+ 2A+

Key Figures

Finalist "Most promising company of the year 2014" (Ernst & Young )

"Fastest growing company", Trends Gazelle 2013 & 2014

Deloitte Fast-50“Fastest growers”2014 & 2015

Turnover

‘05 ‘06 ‘07 ‘08 ‘09 ‘10 ‘11 ‘12 ‘13 ‘14 ‘15


Worldwide customer base

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Corporate overview

International presence

Corporate HQ in Leuven, Belgium

Sales in Switzerland, Germany, Japan


Recent first-of-a-kind ASIC developments

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Corporate overview

Portable X-ray readout ASIC

MEMS speakerHV driver ASIC

Automotive communication ASIC

40-channel brain stimulation ASIC

Medical patch pulse generation ASIC

Impedance spectroscopy for cancer cell detection

EPC Gen-2 RFID for use in Airbus 380

Cochlear implant ICs Wireless Li-Ion battery charger ASIC for IPG/INS

Satellite power mgmtand motor control


Cooperation models

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Corporate overview

Design Service ASIC Supply

Architectural design / spec freeze • •

System modeling • •

Technology selection o •

Analog and digital design/layout • •

Functional safety o o

Qualification and production test plan o •

Prototyping o •

Functional tests (bench testing) • •

ATE HW/SW •

Assembly / production •

Qualification (AEC-Q100) •

QA, SCM •

Yield guarantees by ICsense (fixed unit price) •

• = included, o = optional


Quality, reliability and functional safety

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“The bitter taste of poor quality lingers long after the sweet taste of low price is forgotten”

ISO 13485 – ISO 9001 certifiedIEC 61508 – ISO26262 functional safety

• Unique design environment

• 100% PVT corner coverage (6-sigma)

• Version Control SOS Cliosoft, SVN

• Issue management (JIRA)

• FME(D)A, (A)SIL

• ESD, EMC (IEC61067, IEC62132)

• ISO pulses (ISO16750-2, ISO7637-2)

• Zero-defect strategy

• Robustness validation

• AEC-Q100 qualification (grade 4-0)

• 8D reporting – failure analysis

• QA / reliability monitoring

Development ASIC production


Markets served

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Corporate overview

Automotive Medical ConsumerIndustrial Aerospace

• Communication

(CAN,SENT,PSI5,...)

• Fuel injection driver

• Gyroscope interface ASIC

• Hall sensor read-out

• GMR sensor interface

• Gyroscope interface

• H-bridge drivers

• Xenon HID lamp driver

• Battery management chip

• Motor control

• ...

• X-ray imaging chipset

• Power management chip

• Deep brain stimulator

• Li-ion Battery charger

• Nerve stimulation IC

• Hearing aid power mgmt

• Lab-on-chip interface

• ECG readout

• Wireless power/data

transfer

• ...

• HV MEMS digital speaker

• 3-axis magnetic compass

• MEMS gyroscope

• Accelerometer interface

• Hall sensor interface

• 40W PoE PD

• SMPS controller

• DC-DC converters

• Class D audio drivers

• Frac-N synthesizers

• Low ppm X-less oscillators

• ...

• Pressure & flow sensors

• Communication (RS485, ...)

• Inductive proximity sensor

• High-power DC-DC

controllers

• Wheatstone bridge

• Passive RFID tags

• Digital processing

• Motor control interfaces

• Strain gauge interfacing

• Inertial Measurement

Units (IMU)

• ...

• Custom rad hard design

• Rad hard IP portfolio

available

• Rad hard ADCs

• Rad hard DACs

• X-tal less oscillators

• Digital power controllers

• High reliability applications

• ...


Silicon proven

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Corporate overview

ULTRA-LOW-POWERUltra-low-power AFE, low quiescent current PMU, active

PVT monitoring and compensation, RFID, nano-amp clocks

RADIATION HARD CUSTOM IPADC, DAC, Vref, PLL, DC-DC

AUXILIARY CIRCUITSOn-chip temp measurement, POR, watchdog, reverse

voltage & short circuit protection, OV/UV/OC/SC protection, temperature stable oscillators, precision Vref

SENSOR/MEMS INTERFACINGAccelerometer, gyroscope, wheatstone bridge, capacitive, inductive proximity, Hall, fluxgate, GMR, CMOS/CCD/X-ray

imagers

ANALOG FRONT END (AFE)Instrumentation amp, PGA, offset-compensation ,low-

noise amp, chopping/CDS, high-performance ADC & DAC

HIGH-VOLTAGEHigh-side, low-side drivers, HV level shifters, gate drivers, power control, piezo drivers, neural interfacing, Class-D/AB/G/H amplifiers, HV switch arrays, floating switches, HV in standard CMOS (patented)

POWER MANAGEMENT AND DC-DC Inductive DC-DC, multi-level/single-coil, charge pumps, PWM controllers, LDO, linear regulators, RF energy harvesting

BATTERY MANAGEMENTWireless charging, Li-Ion, State-of-Charge/Health, bandgap, brownout detection, soft-start/inrush limitation

COMMUNICATION PROTOCOLSSPI, I2C, UART, RS485, CAN, J1850, xDSL, EPC Gen-2, OWI, PWM, SENT, LIN, OBD, PSI5, 4-20mA, LVDS

CLOCK AND FREQUENCY +/- 500 ppm on-chip clock (no external components), low-jitter PLL, DS fractional-N synthesis

MICROCONTROLLERSMSP430, ARM core, 8051, custom FSM

MEMORYOTP, MTP, Flash, EEPROM, RAM, ROM, NV-RAM


93% returning customers

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Corporate overview

Niels Trapp, Senior Manager

”ICsense developed the analog front-end for our new industrialtransceiver in TSMC 40nm. ICsense is a valuable partner forRenesas and we highly appreciated the flexibility, expertiseand innovativeness of ICsense.”

Geert Evens, Director ASIC Design

“Based on the excellent project track record of ICsense, ON hasselected ICsense as one of its preferred IC design partners foranalog, mixed-signal and high-voltage. In the numerousprojects with different BUs, ICsense has proven to deliver high-quality and reliable IC designs compliant with our stringentdemands.”

Shannon Morton, Senior Manager

”ICsense’s expertise in making high-voltage circuits with low-voltage transistors led to first silicon success for this complexand innovative design. We particularly appreciate our closecooperation with ICsense's engineers and their proactive andflexible attitude."

Clem Robertson, Project Manager

”ICsense is one of our major outsource partners to developlarge IP blocks to our requirements. We especially value themfor their strong technical engagement, robust management,track record of on-time delivery, high-integrity people andtheir relax company culture.”

Yuval Cohen, CTO

“ICsense’s turnkey approach which includes test andmanufacturing services, delivers an efficient and cost effectivemass-production solution to seamlessly integrate the High-Voltage ASIC driver with our MEMS structure”

Bob Hamlin, VP Engineering

“With ICsense, we found a skilled, innovative partner for thedevelopment of our RF front-end. Their high quality of service,innovation, IC knowledge and dedication has beeninstrumental to our success to date.”

Tony Nygard, Mgr. Enabling Technologies

“The flexible attitude of the ICsense design team combinedwith their advanced analog IC design expertise, specifically forhigh voltages, significantly impacted the feasibility and thesuccessful integration of our Cochlear implant IC. “

watch on-line video testimonial :

http://www.icsense.com/VIDEO/Customer_testimonials?utm_medium=pdf_presentation&utm_campaign=pdf_mail&utm_source=pdf_ICsense_testimonials







Contact us

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Corporate overview

Gaston Geenslaan 14

3001 Leuven

Belgium

Tel : +32 16 58 97 00

Fax : +32 16 58 97 20

[email protected]

www.icsense.com

linkedin.com/company/icsense

ICsense NV

mailto: [email protected]

http://www.icsense.com/

http://www.linkedin.com/company/icsense

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ASIC for mining industry(Sealevel -4 km)

Cancer cell detection ASIC(Sealevel)

RFID ASIC for airplanes(Sealevel + 10 km)

ASIC 9-DOF IMU MEMS(Sealevel)

Satellite motor control ASIC(Sealevel + 160 km)

Electronic compass ASIC(Sealevel)

Gas sensor ASIC(Sealevel)

icsense asic for mems

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