Capacitive Current Switching Duties of High-Voltage Circuit Breakers: Background and Practice of New IEC Requirements

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R.P.P.Smeets, member, lEEE A.G.A. Lathouwers

KEMA High-Power Laboratory Amhem, the Netherlands

Abstract: Capacitive current is switched in power networks in a number of situations, such as the charging current of overhead lines, cables, GIs installations or the load currents of capacitor- and lilter banks. In each of these situations, the current to be intempted is small or very small. Nevertheless this interruption duty has to be considered with the utmost care. Above all, this is due to the inherent risk of re-establishement of arcing (‘restrike’) because of severe voltage stress after inter- ruption. Restrike may cause high overvoltages depending on the network topology and can lead to damage to circuit components. This concern is reflected in a major revision of the relevant IEC standard (IEC60056) that is presently under consideration. In the revised edition, the concept of a ‘restrike-free’ circuit breaker is abandoned and the regime of testing is sharpened.

In the present contribution, the background of the coming IEC60056 standard will be highlighted.Test practice in the high- power laboratory will be illuminated.

Keywords: Type tests, circuit breaker, capacitive current, capa- citor bank, SF6. restrike

charge of the stray- and load capacitances over the system’s inductance(s). This causes high-frequency restrike currents in the system. The flow of the restrike current can - under circumstances - cause unwanted over- voltages in the system, due to the inherent high values of di/dt and the associated induced voltages. In addition, restrike can damage the breaker’s interior (e.g. puncture of the nozzle) due to the formation of a new arc path not always properly controlled by the cooling activity. After interruption of restrike current, in except- ional cases a renewed situation of trapped charge of high- er value than before, can initiate voltage escalation [l].

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I. CAPACITIVE LOAD SWITCHING

A. Capacitive load de-energization Capacitive currents have to be switched in high-voltage networks in a number of situations. These situations all have in common that, due to the 90 degree lagging load voltage. at interruption of the power frequency current the load capacitance is left after at the system peak volt- age (in the single phase case). Half a period of power 6equency later, the source side ac voltage has become opposite to this trapped voltage, causing a 2 pu dielectric voltage stress on the circuit breaker. This is outlined in fig. 1 illustrating the well-known “1 - cos” recovery volt- age.

Breakdown of the circuit breaker contact gap near this moment of maximum dielectric stress (or any moment later than one quarter of a power frequency period after current interruption) is called “restrike” and causes a dis-

Thus, the small interrupted current is rather a disadvant- age than an advantage. In short-circuit- interruption a much larger contact distance is needed for interruption, allowing the transient recovery voltage (TRV) to develop over fully opened contacts.

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B. Capacitive load energization Energization of capacitive load is usually associated with ‘‘inrush‘’ current, the charging current of the capacitive load over the inductance of the system. Depending on the nature of the load (capacitor bank, overhead line, cable) the inrush current has an oscillatory character with a frequency (in the case of capacitor bank switching) up to a hundreds of times the power frequency current with an amplitude of up to few tens of kkpcal. Since this current at least partially flows during the period of prestrike - i.e. when an arc is established between approaching contacts - damage to circuit breakers (andor capacitors) is a risk.

For SF6 breakers, the sudden release of energy may da- mage the breaker (as with restrike), whereas for vacuum circuit breakers, contacts may weld under the action of the high current arc between closing contacts. Such a weld, when broken at the next opening, leaves metallic microprotrusions, possibly reducing the dielectric strength of the gap. especially when the breaking of the weld is not followed by the annihilation of the protrusions by suffi- cient arcing activity.

For the energization of overhead lines and cables, the in- rush current is naturally limited by their surge impedance (hundreds of ohms for overhead lines and several tens of ohms for cables) so that inrush current in these cases is usually much smaller than with capacitor banks.

Two situations are distinguished here: 0 the “single bank” case where only one single bank is

connected to the bus, where a relatively large source inductance limits both amplitude and frequency; the “back-to-back” case, where a capacitor is con- nected to a bus that already feeds (an)other capacitor bank@); the small stray inductance gives high fre- quency and amplitude.

II. NETWORK CONSIDERATIONS

There are two reasons to consider capacitor bank current switching as the most severe capacitive switching duty:

0 the amplitude of the inrush current is generally much higher (and more detrimental to the breaker) than with distributed components such as lines and cables; the frequency of switching of (shunt) capacitor banks is much higher than that of lines and cables. This is because shunt capacitor banks are more often than not used for the supply of reactive power for reasons of voltage stability at the point of application. Be- cause the reactive power requirements of the system vary according to the daily load cycle, switching of shunt capacitors is often on a daily basis, unlike the switching of sections of the T&D grid.

A very important parameter is the location of the capaci- tive load. In order to understand this, the simple equiva- lent circuit of fig. 2 is of help.

Fig. 2 Circuit diagram for voltage jump

Upon dropping of the capacitive load C1, the voltage at the source side of the circuit breaker will “jump” in an oscillatory manner to a Iower value. It can easily be deri- ved that the relative voltage jump (AUAJ) is given by:

-=c , with & the capacitive current and I, the local U 1,

short circuit current as governed by L,. This voltage jump manifests itself as an initial TRV and is very important in reducing the probability of restrike, as explained with the help of fig. 3. In this figure, the dielectrical recovery of the breaker gap is assumed to be a straight line for the sake of explanation only. Depending on the moment of contact separation (i.e. the moment of start of recovery) the following possiblities arise: the intersection of this line (c in fig. 3) with the voltage jump oscillation leads to a harmless continuation of power frequency current (reignition), whereas the intersection with the 1 - cos recovery voltage initiates a full restrike (b); contact separation at point (a) leads to complete recovery. Point d is the moment of current inter- ruption. From this, it is clear that a higher voltage jump (pertinent to a “weak“ location in the grid i.e. low short- circuit current) reduces the probability of restrike. Mutatis mutandis, capacitive switching at strong network locations is associated with higher probability of restrike.

III. NEW IEC REQlJIFlEMENTS

Since 1987, the existing IEC 60056 is in operation, that - among others - gives requirements that breakers have to fulfil when assigned a capacitive switching duty [2]. A major problem in quality assurance of circuit breakers is the verification of the absence of restrike events throughout their life, based on a limited number of tests. This especially applies to breakers assigned to capacitor bank switching duties, having an expected number of switching operations much higher than can ever be tested economically. Therefore, it is rather peculiar that after passing a limited number of tests (40 threephase and 48 single phase) without restrike a breaker is declared “restrike free”, as defined in the present IEC 60056.

In the ongoing revision of the standard, new requirements for capacitive switching duties are put forward, that are believed to be more in conformity with the reality in

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a b c d

Wg. 3: Voltage jump, reignition, restrike and m v e r y at capacitive current interruption

power supply circuits. The concept of a “restrike-free” breaker is now abandoned, and replaced by two classes: 0 C1: Breakers that are expected to have a low proba-

bility of restrike after passing the tests. This class was modelled after the existing ANSI C37.09 standard.

0 C2: Circuit breakers that are expected to have a very low probability of restrike after passing the tests

These new test requirements are more severe compared to the existing IEC standard in terms of number of tests and preconditioning, the latter for class C2 only. Precondition- ing of the breaker (simulating ageing) is prescribed to be a short-circuit current stress of 60% of the rated short- circuit breaking current with rated operation sequence (usually 0-CO-CO) prior to the capacitive switching tests. A comparative summary of the required number of make- break test is shown in table 1. In the new IEC 60056, the rated capacitive breaking current varies from 10 - 500 A for line and cable switching (3.6 - 550 kV) and is 400 A for capacitor bank duties for all voltages. When a breaker is assigned to have a rated back-to-back capacitor bank inrush current, this current should have a peak value of 20 kA and a frequency of 4.25 kHz . As can be seen in table 1. the definition of voltage jump is changed in the revision process. In the existing IEC 60056, the rated short-circuit breaking current (I,) is taken as a measure: two supply circuits have to be pre- pared, one supplying I, and one supplying 0.1 I,. This has the disadvantage that the 100% circuit is very difficult to realize for rated voltages > 72 kV in most test labo- ratories, forcing test engineers to search for a way-out possibly leading to ill-defined and ad hoc solutions not contributing to the uniformity of testing that IEC pursues. Practice has established that “the highest available power”

is often used, giving values for the voltage jump often being unrealistically high. Therefore, one should welcome the revised requirements giving a more strict and a more workable prescription of the voltage jump in test laboratories. In addition, on can have doubts on the necessity of testing at maximum short circuit current level. Recent infor- mation on existing stresses on circuit breakers revealed that the expected maximum short-circuit current in 90% of the cases is less than 75% of the rated circuit breaker short-circuit current [4].

Table 1: Comparison of numbers of tests existing (grayed) and draft IEC 60056 for capacitive switching duties. See notes below.

Colomn P single (1) m three-phase (3) tests; Column S: required operating sequence; Columns jump 2%: tests must be done with a supply circuit the short-circuit impedance of which is designed to cause S 2% voltage jump with 10 - 40% of the rated capacitive breaking current Columns jump 5%: as columns jump 2% but with 5 5% voltage jump at 100% of the rated capacitive breaking current Column 100% 1: tests must be done with a circuit able to supply 5 100% of the breakers’ rated shoa-circuit breaking current. Half of the test arc with reduced (204%) of the capacitive current. Column 10% I: as column 100% I, with 10% Short-circuit current In the existing practice no restrike is accepted, in the revised IEC dmtl, one restrike is allowed if a repetition of the complete series, after finishing of the first series, is free from restrikes. In the new IEC. 2 25% of all tests have to be performed at mini- mum arcing time. No such requirement is in the present IEC 60056. Single phase testing requires a test-voltage equal to the rated phase- to-ground voltage multiplied by a factor between 1.0 - 1.7, depending on system grounding, type of fault, mutual pbase influence etc.

0

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Regarding capacitor bank switching practice, a world wide survey was carried out by CIGRE Working Group 13.04 comprising 43 utilities in 17 countries [3]. In fig. 4, the results on the short-circuit current are sum- marized. For capacitor banks installed in the weaker part of the system, it is reasonable to assume a value in be- tween the minimum and maximum short circuit power curve of fig. 4, yielding a 90% percentile around 30 kA. This implies, that in 90% of the surveyed cases, the short circuit current is smaller than 30 U.

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IV. TESTING

Already long before the new IEC 60056 comes into effect (expected in the first half of 2000). testing experience was gathered at KEMA regarding the revised requirements. In a period of 18 months, 37 tests were requested from various customers offering switchgear from 72.5 - 550 kV for capacitive tests. In table 2, the results of these tests are compared for the tests according to the existing IEC 60056 (14 objects) and the tests according to the revised IEC 60056/CDV r e quirements as summarized in table 2.

fail pass 17% 83%

revised IEC 60056/CDV 64% 36% table 2

The vast majority of customers were testing aimed at ‘very low probability of restrike’. From the results it a p pears that the new requirements are definitely more severe with regard to capacitive current switching.

a. Direct testing In order to realize a sufficiently small (c 5%) voltage jump as defined in the forthcoming IEC standard, supply circuits in test laboratories must be designed for sufficient short-circuit current at all voltage levels. This implies, that capacitive current switching tests must be performed in high-power laboratories with sufficient installed power. An impression of the requirement of three-phase power for direct three-phase testing in conformity with the revised IEC 60056 for various capacitive switching duties can be obtained from fig. 5. Indicated are the limitations in power and voltage (for full pole three-phase direct test) of KEMA’s high-power laboratory. Beyond the indicated boundaries, tests can be performed on a single phase basis or as half pole tests. It must be realized that three-phase tests are essential for three-phase enclosed switchgear. which is at present available up to around 300 kV. For higher voltage ratings, single phase enclosed switchgear is

common practice.

Another important limiting factor is the available reactive power. The availability of huge capacitor banks to si- mulate the capacitive load is a prerequisite not only for the necessary MVAr of the load, but is also necessary for the supply of inrush current when a circuit breaker has the back-to-back switching duty. In back-to-back switching, two (large) capacitor banks must be available at either terminal of the breaker. Since CO operation is mandatory, one bank (at load side) of the breaker controls the assigned capacitive current, whereas the series combination of both banks, together with the (parasitic) inductance of the loop determines both inrush current frequency and peak value. In some cases, the required small value of this inductance (typically few hundreds of pH) is a problem, such as in situations where the banks are physically remote from the testobject. Then, it may be difficult to realize both frequency and peak value of the inrush current. Especially for the lower voltage ratings (c 36 kv) the required surge impedance of the inrush circuit may be loo low to achieve. In these cases, a solution can be a low-inductive connection to the capacitor banks, such as a cable, although this solution cai only be applied up to a limited test voltage.

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Rg. 5: Required three-phase power for full pole direct capacitive switching tests according the forthcoming IEC 60056

With 200 MVAr (50 Hz) I 240 MVAr (60 Hz) of available three-phase reactive power, KEMA high power laboratory is able to perform full pole direct three-phase capacitive switching tests up to 245 kV. Above that volt- age, single phase tests are possible (KEMA’s single phase limit 335 MVAd60 Hz and 280 M Y A r b O Hz) up to 420

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kV full pole.

An example of this is a recent project at KEMA, invol- ving the test of 420 kV circuit breakers (of three different types) for back-to-back capacitor bank switching in con- formity with the revised EC 60056 (class C2 restrike probability). All breakers were preconditioned with 37 kA current (3x0) and endured 20 % inrush current at 4.25 kHz at least 120 times. The results are summarized in table 3:

#of CO's tested at 90 A 48 48

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Table 3: Results of capacitive tests of 420 kV circuit breakers

The restrikes (object X, Y) andor the clear visual damage (X. Z) of the interior after inspection convinced the manu- facturers to modify the design of breakers. These might very well have passed the more relaxed requirements of the existing IEC 60056. An oscillogram with a restrike of this test series is shown in fig. 6. The damage to object Z, free of restrikes, is probably caused by the inrush current. From the above example, it is clear that the combined efforts of manufacturer, utilities, standardizing body and test authorities will lead to a higher reliability of operation of the networks.

b. Synthetic testing In the case that full rated capacitive load andor the K.EhlA4

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necessary short-circuit power is not available, synthetic test methods are a well-known practice. This is a combi- nation of a (medium voltage) source providing the rated current (not necessarily capacitive) and a high-voltage source with restricted current capabilities. The voltage jump can be realized with separate RLC elements [SI. An auxiliary circuit breaker separates the current circuit (with restricted voltage withstand ability) from the HV source. Recently, synthetic tests of a single-break 550 kV 63 kA breaker were succesfully performed at KEMA. Generally speaking, (capacitive) synthetic testing raises a number of considerations with respect to the equivalence of the testing conditions and the network situation: 1. A difficulty with most synthetic test schemes is that

the ac and dc components of the recovery voltage are normally applied at one terminal of the test object, the other terminal being earthed. In particular for GIs and UHV breakers this is an undesirable situation. Also, in a number of synthetic test circuits (the so called "os- cillatory circuits"), the presence of dc voltage at load side of the testabject before testing is a disadvantage.

2. In the case that the recovtry voltage is applied by an oscillating circuit, a circuit with a very high quality factor is needed to reach a sufficiently high recovery voltage. All too often, voltage decay is too rapid.

3. A principle disadvantage of synthetic testing is that the events after a restrike cannot be represented correctly. This also applies to the making- and back- to-back tests

4. Interaction between circuit and circuit breaker arc can be different in a number of c a w : i) Current chopping (sudden arc extinction of small - e.g. line charging - current prior to natural zero) is known to be influenced by different parasitic elements and the increased ratio of arc voltage to driving

voltage inherent to

6: *i- sampled at 1 0 ldIz Of reStrfking 420 kV breaks undagohg bCk-tO-Wk capacitlvc tesf in conformity with new IEC 60056 (oscts: HF rccordiugs (1 MHz sampling frequeacy) of inrush current (bottom left) and restrike (top right). Vertical scale of insaa. 8 Wdiv .

synthetic testing. usually, the tendency for an arc to chop is increased in synthetic test circuits. ii) Rapid changes in arc voltage, such as the ex- tinction peak occurring prior to current zero in gas circuit breakers can introduce strong current oscillations in capacitive current [6]. It can easily be derived that a circuit like in fig. 2 responds to a rise of arc voltage with a rate dddt = S, with a har- monic current i(t): i(t) = S,C~[l-cos(ax)J, with o the oscillation fre quency of the short- circuit reactance L) and the load capacitance (CJ. This current is superim- posed on the (small) pow-

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er frequency current and causes current interruption prior to the prospective (i.e. without arc voltage influence) current zero. Because of the different current slope to zero, the voltage jump is strongly affected by the superimposed current, such as is shown in fig. 7, showing the effect of arc voltage transients on on the voltage jump. A case was simulated of 300 A no load line-charging cur- rent in a 20 kA circuit at 245 kV. Close to current zero, an arc voltage transient is generated: (a) constant arc voltage only; (b) slow arc voltage rise (S, = 8 V/p); (c) steep arc voltage rise (initial slope 80 V/ps). From this example, it is clear that current distortion due

10 incremental arc voltage (kv)

20

16 initial TRV (voltage jump) (kv)

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fig. 7: Effect of arc voltage transients (a: none; b gradual; c: steep) on arc current and initial TRV (voltage jump)

to arc voltage transients can have a strong bearing on volt- age jump and thus on restrike probability. This reasoning especially applies to cases of small current interruption, lower voltages (larger equivalent capacitances) and/or circuit breaker types having high extinction peaks (e.g. air blast types or radially blown SF6 types). The arc-circuit interaction described above, is different in the case of synthetic testing at reduced M V k , with (much) less than the full rated capacitance, the effect of arc voltage transients on the initial recovery is much less pronounced.

V. CONCLUSIONS

It is often thought that short-circuit current breaking is the only severe switching duty. It spite of the much smaller current to be interrupted, the severity of various capaci- tive switching duties must not be underestimated, largely due to the probability of restrike. The new IEC 60056 requirements with respect to capa- citive current switching will lead to a lower probability of

restrike of adequately tested circuit breakers in spite of the fact that the (erronous) concept of “restrike-free” cir- cuit breaker is abandoned. The higher level of reliability is largely thanks to the increased number of tests and the artificial ageing by preconditioning the breaker. The updated, more robust re- quirements will lead to a larger uniformity, since utilities will tend to adopt the new IEC requirements, rather than to stick to own specifications [7]. New explicite and realistic definitions of the initial TRV (voltage jump) will limit arbitrariness and too easy an escape from test requirements. As before, preference must be given to direct testing, being the closest match to the situation in real networks. When applying synthetic test methods, a number of con- siderations must be kept in mind, such as correct mag- nitude of recovery voltage, dielectric stress in GIs and correct representation of arc-circuit interaction.

VI. REFERENCES

[I] CERE WG 13.04, “Capacitive Current Switching - State of the Arf’, Electm No. 155,1994, pp. 33-63 [2] IEC 56, “High-voltage alternating circuit-breakers”, International Electrotechnical Commission, 1987 [3] CIGRE WG 13.04, “Shunt Capacitor Switching, Sfresses and Test Methods”, Elecrra. No. 183,1999,13 - 43 [4] A.J.L. Janssen, W. Lanz, “An International Survey on Electrical Stresses on High-Voltage Circuit-Breakers”, Report on behalf of CIGRE WG 13.08, CIGRE Conference, Paris, 1998 [5] CIGRE WG 13.04, “Requirements for capacitive c m t switching tests employing synthetic test circuits for circuit-breakers without shunt resisstors, EIecfra 87,1983.25 - 39 [6] G. Daigneault, G. St-Jean, M. Landry, “Comparing Direct and Synthetic Tests for Interruption of Line-Charging Capacitive Current”, IEEE Trans. on Power Del. PE-185-PWRDO-03-1997 [7] J.F. Reid, Y.K. Tong, M.A. Waldron, “Contmlled Switching hues and The National Grid Company’s Experiences of Switching Shunt Ca- pacitor Banks and Shunt Reactors”, CZGRE Conference. 1998,13-112

VI1 BIOGRAPHIES

R e d Peter Paul Smeets was bom in Venlo. the Netherlands in 1955. He received the M.Sc. degree in physics from the Eidhoven Univ. of Technology. He obtained a Ph.D. degree for research work on vacuum atcs. Until 1995, he was an assistant professor at Eindhovea Uni- versity. During 1991 he worked with Tas- hiba Corporation’s Heavy Apparatus En- gineering Lahatory in Japan. In 1995, he joined KJZMA High Power Lab. He is a “ber of CIGRE WG 13.04, the “Current Zero Club”. IEEE and CIGRE.

Andre G.A. Lathouwens received his M.Sc degree in Electrical Eng. from the bdhoven Univ. of Technology 1988. Rom 1988 to 1990 he

worked at “No’s physics and Electronics Laboratory on calibration procedures for EMP measurements. In 1990 he joined KEMA as a Test Engineer. As a Senior Test Engineer, he has gained extensive experience in performing type tests on all kind of components for electric power transmission and distributioa systems. He is member of the Short-circuit Testing Liaison (STL) Technical Committee.

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