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Page 1: [IEEE 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference - Stresa, Italy (2007.06.11-2007.06.12)] 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC)

Backside Wafer Damage Induced Wafer Front Side Defect and Yield Impact

Neng-Cheng Wang, Hui-An Chang, Chung-I Chang,

Tings Wang, /ProMOS Technologies Inc. Production Technology Division, ProMOS Technologies Ins., Hsinchu, Taiwan, R.O.C.

+886-35798308-5525 Fax:+886-35663300-5525

Abstract - The article describes the wafer yield loss due to wafer backside defect. The backside defect pattern will transfer to the next wafer surface during the following clean process and cause the process defect issue. These defects will impact the yield. Real root cause finding let prevent action work well. Keyword

Dark field inspection, e-beam inspection, backside inspection tool, dual beam review station, SEM, FIB, TEM, wafer backside damage,

INTRODUCTION

As design rule shrinkage, the defect size control gets tighter, especially the wafer backside defect starts to impact the front side pattern defined and cause yield loss recently. Most of the IC process mainly focuses on the wafer front side, but some defect or damage will be left on the wafer backside after process. Whether these backside particles impact the following process or not depends on the design rule and the process window. For example photo process, backside particle will cause the wafer flatness worse [1], and cause defocus defect. Or etching process, it may cause the wafer vacuum poor, cooling performance worse and impact the wafer front side etching performance. In this article, it will report a yield loss induced from the wafer backside particle and cause the front-side gap-filling deposition problem. From the electrical result, as shown in the figure.1, there is a repeated circle pattern with different location on the wafers. The marked wafer with different circle pattern location has an extra measured step. This provides a good starting point for analysis. In this study, we use the dark field inspection tool with wide-angle detectors to collect the signal of the scattering light from the defect. E-beam with small numerical aperture can detect the small defect in the high aspect ratio pattern. Macro inspection with backside inspection function helps to inspect the wafer backside particle. The focus ion beam (FIB) helps to do the defect cross section analysis and provide more information to identify the particle source.

Fig.1 Electric Test Result

EXPERIMENT

There are three designed experiments (DOE) to identify the circle-pattern source. Prior to all the analysis, it should provide an appropriate defect inspection recipe. The final recipe sensitivity is good to match the inline defect map and electric result as shown in the figure 2.

Fig.2 defect inspection result matching to electric test

DOE 1. Analyze the wafer backside damage First, we use the macro-inspection to check the suspected furnace step and find a circle defect pattern in the wafer backside center, as show in the figure 3.

Fig.3 Macro Inspection of Wafer Backside Damage

581-4244-0653-6/07/$20.00 ©2007 IEEE 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference

Page 2: [IEEE 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference - Stresa, Italy (2007.06.11-2007.06.12)] 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC)

DOE 2. Choose 2 lots in the following wet process with cross-lot arrangement, one lot with serious wafer backside particle, and the other not. Then uses the dark field tool inspect the next wafer surface. This kind of arrangement will let every clean wafer surface facing a wafer-backside with circle pattern particle, as shown in the figure 5 and 6. Figure 7 shows the next wafer front side defect inspection result after the wet clean process. The defect pattern seems to transfer from one wafer backside to the next wafer front-side surface after the wet clean process. DOE 3. Use the dummy wafer and lot with circle backside particle wafer clean together to verify DOE2 result. The wafer arrangement is same as the previous one. And find the dummy wafer with circle defect pattern after the clean process, but the production wafers were free of it.

Fig.5 2 lot with cross lot arrangement in the wet clean process

Fig.6 wafer disposition in wet tank

Fig.7 result of defect inspection after wet process

RESULT

The result of the experiment includes four parts 1. Result of backside defect review image and

EDX The figure 3 wafer backside circle ring is reviewed by SEM; it seems some particle adhered on the wafer surface, as shown in the figure.8 (a). The particle composition is SiOx, as shown in the figure 8 (b).

(a)

(b)

Fig. 8 (a) SEM image of the backside circle ring damage (b) EDX result

2. Result of wafer front-side defect inspection and review The dark field inspection tool detects the wafer surface; SEM reviews the circle defect pattern and most are surface particle, as shown in the figure 9. These particles may fall on or in the contact hole and will block the contact during the gap-filling process. The e-beam inspection detects the smaller physical defect inserted in the contact hole, as shown in the figure 10.

Fig.9 SEM review image of dark field inspection

Fig.10 SEM review image of E beam inspection 3. Result of the defect FIB x-section image The FIB x-section image indicated the defect block the contacts after the contact etch. The EDX shows the defect composition is the silicon and oxygen. Fig.11

Fig.11 FIB x-section and EDX

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BacksideFront sideBackside

BacksideFront side Backside

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Page 3: [IEEE 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference - Stresa, Italy (2007.06.11-2007.06.12)] 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC)

4. Result of the defect TEM image and EDX Trace the impact wafer post the gap-filling process and use TEM to verify the defect condition. As shown in the figure 12, the defect clearly blocked the contact hole and EDX shows the composition is SiOx.

Fig.12 TEM and EDX of the defect

DISCUSSION

From the analysis, it’s clear to show the particle block the contact gap-filling process and will cause the yield loss. The actual original particle source is the vacuum chuck of robot arm in the previous process step, as shown in figure13. These particles will adhere on the wafer backside and drop on the next wafer surface after the wet cleaning process, as imitates shown in the figure 14. The possible reason may be the polarity of the particles which cause them easily attracted on the wafer surface before they are cleaned away by the wet clean chemical solution.

Fig.13 robot arm

Fig.14 particle transferred to the wafer front side

CONCLUSION

Most of time, we will focus the backside big particle, due to it will affect the wafer front side process. It’s the first time to show the wafer backside tiny particle, the size smaller than 1um, which won’t affect itself process, but it will transfer to the other wafer surface during the wet cleaning process. The particle will drop during the wet cleaning process and adhere to the other wafer surface before removed. This impacts the following gap-filling process performance and causes the final yield loss. The reason of handler affected wafer backside particle and the removal efficiency of wet clean process has not been clarified yet, we temporarily fix this issue by (1) the wafer backside/dummy wafer arrangement or (2) wafer backside/backside arrangement as an alterative way. It clearly shows the backside defect monitor which becomes as an indispensable methodology in the shrinking process and the backside particle removal efficiency also as a critical task. The sensitivity requires for wafer backside inspection similar as the front side inspection in the future.

REFERENCE

[1]. Twan Bearda, Frank Holsteyns, Karine Kenis, Paul Mertens, Aschwin van Meer,Don Brayton, Lisa Cheung “The Influence of Backside Particle Contamination on Wafer Deformation during Chucking”, Yield Management Solutions, pp.40–45, Summer 2006.

BIOGRAPHY

Neng-Cheng Wang received a masters degree in department of Materials Science and Engineering from National Cheng Kung University in 2002. Mr. Wang has worked in semiconductor industry for two years in the defect management and control.

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