Synchronization Methods Applied on Active Power Filters – A Comparative Study

Lucas Scherer1, Robinson F. de Camargo1, Maurício de Campos2, Guilherme S. Silva3 e Andressa Feyh4

1 Universidade Federal de Santa Maria – UFSM CEP: 97105-900 – Santa Maria, RS – Brasil

2 Universidade Regional do Noroeste do Estado do Rio Grande do Sul – UNIJUÍ 3 Universidade Federal do Pampa – UNIPAMPA

4 Endesa Brasil

lgscherer@hotmail.com, robinsonfcamargo@hotmail.com

Abstract - This paper proposes an analysis of the impact of five

different synchronization methods on the performance of the compensation currents generated by shunt active filters. The discrete model of shunt active filter is presented considering its

implementation in a DSP. Furthermore, two control loops are used to perform the control, an external loop to regulate dc-ling voltage that uses a servo system control and an internal loop to

control the currents generated by active filter that employs deadbeat robust control. Finally, experimental results obtained from a 3.3kVA prototype are presented, demonstrating the

performance of the currents generated by three-phase shunt active filter.

I. INTRODUCTION

Shunt Active Power Filters (SAF) are devices used to increase power quality at utility or isolated grids when non linear load are present. Despite of the benefits of using non linear loads, these bring as consequence the increase of harmonic distortion, reactive power, power factor reduction, among others problems.

To solve specifically harmonic distortion problems, several methods to generate compensation currents for SAF

are presented in the literature. They are well-known load current [1], [2], line current [3] or voltage detection [4-6] methods.

Some of these methods use dq transformation to separate the fundamental component of the harmonic components, where these last ones are used to generate the compensation currents produced by the SAF.

Moreover, to synchronize the SAF with the utility grid and transform voltages and currents measurement in dq

coordinates is necessary to use a synchronization method to obtain the angle or synchronism signals (sine and cosine)used in these transformation. In case of these synchronization methods use the grid voltages to generate these synchronism signals, it is possible that, distortions present in the voltage grid, appear in the synchronism signals too. It is evident that, this hypothesis depends of the synchronization methods chosen too.

In case of the synchronism signals be distorted, it is possible that, consequently, the harmonic components

generated to be used in the compensation currents be not adequate.

Then, this paper proposes the comparative analysis of five different synchronization methods, in order to verify their impact on the performance of the compensation currents generated by SAF in power systems where grid voltages are distorted. The analysis factor used is the individual harmonic distortion rate in the compensation currents as the IEEE Std.519-1992.

Many synchronization methods are presented in the literature, which can be classified in open-loop [7, 10-12] and closed-loop [8, 9, 13], being the choice for which of them to be used a SAF designer criterium. In this paper the synchronization methods were chosen based in the grid voltages measurements to generate the synchronism signals, moreover, in the different structural complexity and the possible rejection of harmonics and unbalances in the grid voltages.

In terms of compensation currents the load current method was chosen for being the usual. In addition, the same algorithms to control the SAF is used in all synchronization method analyzed, that is, an external loop using servo system [6] design to regulated the dc-link voltage, and an internal loop to control the compensations currents based in the robust deadbeat technique [14].

In this way, the performance of compensation currents generated by SAF is compared based on Fast Fourier Transform (FFT) module for each significant harmonic, considering the application of five different synchronization methods on SAF.

Experimental results, from a 3.3 kVA prototype, demonstrating the performance of the currents generated by SAF on the impact of these synchronization methods are presented.

II. NORMALIZED DISCRETE MODEL OF THE SAF

The SAF considered here consists of a three-phase three-leg converter with dc-link capacitor (Ccc) and output filter Lf, as shown in Fig. 1. To derivate a model for the controllers design, the grid and dc-link voltages are assumed to be ideal

2010 9th IEEE/IAS International Conference on Industry Applications- INDUSCON 2010 -

978-1-4244-8010-4/10/$26.00 ©2010 IEEE

.base base baseZ V I=

0 0 1 0 1 0; ;

0 0 0 1 0 1base base

f f

Z Z

L L

−= = =

−A B F

( )( ) ( )f s pwm

di tL V t U t

dt= −

( ) ( ) ( ) ( ) ( )( )( ) ( ) ( ) ( ) ( )

_

6 3 6 6 2 2 6 6 2 2.

6 3 6 6 2 2 6 6 2 2abc dq

cos cos sin cos sin

sin sin cos sin sin

− + − +=

− + +T

_ _( ).dq ref dq dq dc= −i i i

voltage sources, in which the grid impedance and the output filter resistance are neglected. Therefore, the following normalized state space representation in αβ stationary coordinates is obtained:

( ) ( ) ( ) ( )t t t t= + +x Ax Bu Fw (1)

where, the matrices are given by:

(2)

and

(3)

From the state space equation (1) and (2), it is possible to obtained equivalent circuits in αβ coordinates as shown in Fig.2a. Note that, the α and β circuits are identical. Therefore, just one of them is considered for inner loop controller design which leads to circuits of Fig.2b. In the Fig.2b Vs=vα=vβ,Upwm=Uαpwm= Uβpwm and i=iα=iβ. Now, by applying Kirchhoff voltage law in the circuits of Fig.2b, the following equation is obtained:

(4)

In the discrete domain, this equation can be rewritten as:

(5)

Before defining the controllers used, the load current detection method applied to three-wire systems is approached to generate the compensation currents of the SAF.

III. LOAD CURRENT DETECTION METHOD

This method uses the nonlinear load currents [1] to generate the compensation currents necessary to reduce the harmonic distortion currents in the PCC as recommended by IEEE Std. 519-1992.

The grid currents in dq synchronous frame are obtained as follows:

(6)

where:

(7)

In (6) the continuous components, idq_dc of idq are the fundamental component of the load currents and the alternated components, idq_ac of idq are the harmonic components. Then, to separate these components it has been used, for example, a first order low pass filter (LPF) with cut off frequency of 13Hz and ζ=0.7 [6]. So, the reference currents in dq synchronous frame are obtained in vetorial form by:

(8)

This vector current obtained in (8), composed only by alternated components, can be converted in αβ components to match with the internal loop current control considered in this work which will be further discussed in section V. Previously, to obtain the vector idq in (6) it is necessary to generate the sine and cosine synchronization signals which can be obtained through the grid voltages.

IV. SYNCHRONIZATION METHODS

The normalized synchronization vector or more specifically the synchronization signals sine and cosine are obtained directly from the ac voltages. Five synchronization methods are analyzed considering different structural complexity and the possibility or not of rejection of harmonics and unbalances in the grid voltages, moreover, considering non frequency variation above the recommend by IEC 610002-2 and IEC 60034-3, i.e. above ±1 Hz for interconnected electrical systems and ±2 Hz for islanded generators.

( 1) ( ) ( ) ( )+ = − +ss pwm

f

Ti k V k U k i k

L

_ ,dq abc dq abc=i T i

+

+

DeadbeatCurrentControl

SVM

uαβu

SAF

[vab

; vbc

]

+_

PCC

[ia; i

b]

fL

TP

SynchronizationMethods

LPF

LPF

+

+

ucc

uccL

_

+

vdc2

Servo System

Control

DSP TMS320F2812

Three-phaseVoltage

Grid

[ia_load

; ib_load

]

Tabc

Tdq

iq_load

id_load

Tabc

Tαβ

-

-

iβ iα

vdc

vdc

vdc_ref

2

.

CompensationcurrentsThree-phase rectifier

iβ_ref

iα_ref

q_refi

d_refi

Tdq

Tαβ

+

_

_

+

.

.

Fig. 1. Power and control circuits of the SAF.

iα

vαuαpwm+

-

vLα+ -

I

iβ

vβ uβpwm+-

vLβ+ -

II

i

Vs +-

vL+ -

(a) (b)

Fig. 2. Equivalent circuits in αβ coordinates.

1 2

2 2 6 6 60 4 4 6 12 12,6 6 6 2 206 12 12 4 4

− − −= =

− −

M M

2 11

; 1 1 ; .3

1 2

a

ab

ph b ll ph ll

bc

c

vv

vv

v

−= = − =

− −

v T v

1 11 2 22; .

3 3 30 2 2

v

v

− −= =

−v T

2

n =v

vv

( ) ( )2 2

2 .v v= +v

( ) ( )cos and sin .n nv v= =

2 2( ) .

2 n n

sG s

s s=

+ +

2

.f

f

n f=

vv

v

++

+ 2

n =v

vv

A. Method I

For three-phase three-wire systems, a synchronization vector can be obtained from the measurement of only two ac line voltages [12]. The line voltages vector, vll, is transformed into a phase voltages vector, vph, as illustrated in Fig. 3. Considering that the sum of the phase voltages is zero for three-wire systems, then:

(9)

where:

(10)

Moreover, the αβ transformation is used, that is,

(11)

where:

(12)

A normalized vector can be obtained dividing vαβ by its norm, that is:

(13)

where, the Euclidian norm of the vector is given by:

(14)

The two components of the vector vαβn, obtained from (13), can be the cosine and sine signals used in (7), that is:

(15)

B. Method II

Grid voltages can present harmonics, which can distort the synchronization signals [13]. In order to avoid this distortion, the phase voltages vector (vph) is filtered by band-pass filters (BPF) tuned at the fundamental frequency, as shown in Fig. 4. The BPF block is constituted by two BPF filters with transfer function in s domain defined as:

(16)

Note that, the parameters of the filter must be selected so that:

(17)

where, ωn=2πf rad/s. To satisfy this condition, f=60 Hz and ζ=0.5.

The filtered phase voltages vector (vBPF) is transformed into filtered αβ voltages (vf

αβ), by using (11). A normalized synchronization vector v

fαβn is obtained

dividing vfαβ by its Euclidian norm (14), that is:

(18)

The components of the vector vfαβn are the cosine and sine

signals used in (7).

llv v

2v

1cos( )θ

sin( )θ

Tll-ph

Tαβ

phv

Fig. 3. Block diagram of the method I.

BPFllv

Tll-ph

Tαβ

cos( f )θ

sin( f )θ

2

fv

1

fv

phv BPFv

Fig. 4. Block diagram of the method II.

C. Method III

Unbalanced loads can produce unbalanced voltages at the PCC. In order to avoid the harmful impact the synchronization vector vαβ+ is lined up with the positive sequence voltage vector. This can be carried out by using all-pass filters (APF) [13] and M1 and M2 matrices, as shown in Fig. 5. The APF block is constituted by two APF filters with transfer function in s domain defined as:

(19)

The parameters of the filter must be selected so that:

(20)

where, ωn=2πf rad/s. To satisfy this condition, f=60 Hz.

Then, according to Fig. 5, the vector vαβ+ is computed by:

(21)

where matrices M1 and M2 are:

(22)

A normalized synchronization vector vαβ+n can be obtained dividing vαβ+, obtained from (21), by its Euclidian norm (14), that is:

(23)

ph ll ph ll−=v T v

2 1 _ph fil ph+ = +v M v M v

ph=v T v

( )=

1 0fs j

G s = ∠ °

( )( )1

( ) .1

n

n

sG s

s

−=

+

( )=

1 90 ;fs j

G s = ∠ °

2 _ 2 1 _ 1f f f

fil ph fil ph+ = − −v M v M v

( )2

2 22n

n n

G ss s

=+ +

++

+ 2

f

f

n f=

vv

v

Again, the components of the vector vαβ+n are the sine and cosine signals used in (7).

D. Method IV

Grid voltages can present unbalance and harmonics. Therefore, the synchronization method IV, illustrated in Fig. 6, can be used to obtain low-THD synchronization signals, even with these disturbances [12]. In this method the phase voltages vector is filtered by low-pass filters (LPF1 and LPF2). The LPF1 and LPF2 block are constituted by two LPF

filters with transfer function in s domain defined as:

(24)

The parameters of the filter must be selected so that:

(25)

where, ωn=2πf rad/s. To satisfy this condition, f=60 Hz and ζ=0.5. The synchronization vector (vαβ+) is lined up with the positive sequence vector of the filtered phase voltages. So, the synchronization vector vf

αβ+ can be expressed as:

(26)

A normalized synchronization vector can be obtained dividing vf

αβ+ by its Euclidian norm (14), that is:

(27)

The components of the normalized synchronization vector are the sine and cosine signals used in (7).

E. Method V

The fifth method analyzed is a closed loop method constituted by a phase-locked-loop (PLL) conventional circuit [8], as ilustrated in Fig. 7.

+ +

PI 1+

- S

ωn

ω θπ

−π

θref

Fig. 7. Block diagram of method V.

The angle θref is obtained from the grid voltages and the PI controllers gain are given by:

22 e ξω ω= =p n I nK K (28)

Where, ωn is the desired cut off frequency and ξ is the damping factor. The angle θ is used to synchronize the SAF to the grid voltages.

V. CURRENT AND VOLTAGE CONTROL TECHNIQUES

For the purpose of controlling the SAF, two control loops were used as shown in Fig. 1. The first is an external loop consisting of a servo system that regulates the dc-link voltage to a constant value [6]. The second is an internal loop to control the compensations currents generated by the SAF

based in the robust deadbeat technique used in [14]. The different synchronization methods are used to analyses the impact on the compensation currents generated by the SAF.

VI. SIMULATION RESULTS

This section presents the simulation results using software PSIM® considering a system composed by the main grid, a three-phase non-controlled diode rectifier feeding a 3.3 kVA load and a SAF, according Fig. 1. Table I shows the main parameters of SAF used in simulations as well as in experimental results section.

TABLE I MAIN PARAMETERS TO SAF DESIGN

Parameters Quantity

Power 5 kVA Voltages (rms) 127 V Current (rms) 10 A DC link voltage 450V Output filter inductance (L) 1 mH Current loop sampling frequency 10 kHz Voltage loop sampling frequency 1 kHz Switching frequency 10 kHz DSP TMS320F335

Fig. 8 presents the simulation results for load currents with THDi=62.54%. Fig. 9 shows the three-phase grid voltages in PCC, which presents THDv=5.88%. Fig. 10 shows the simulation results for compensation results generated by SAF using synchronization method IV. Table II presents the simulation results of main harmonic components of currents drained by a three-phase non-controlled diode rectifier considered as non-linear load in the system, from the analysis of Fast Fourier Transform (FFT) module.

( )=

1 90fs j

G s = ∠ − °

llv +

APF

+v

+

M1

M2+ 2

v

1cos( +)θ

sin( +)θ

Tll-ph

phv

_fil phv

Fig. 5. Block diagram of the method III.

LPF1

llv +LPF2

f

+v

+

-M1

-M2+ 2

fv

1cos( f+)θ

sin( f+)θ

Tll-ph

_ 2fil phv

_ 1fil phv

phv

Fig. 6. Block diagram of the method IV.

Fig. 8. Currents drained by a three-phase non-controlled diode rectifier.

Vertical current scale (A).

Fig. 9. Grid voltages in PCC of system considered in Fig. 1 with THD=5.8%.

Vertical voltage scale (V).

Fig. 10. Compensation currents generated by SAF using synchronization

method IV. Vertical current scale (A). (Currents in blue and green colors

with offset for better view purpose).

Furthermore, in the same table are present the main harmonic components of compensation currents generated by SAF, based on FFT module, using the five different synchronization methods. The grid frequency considered in Table II is 60 Hz, being this the same frequency considered in the project of filters of methods II, III and IV. It is possible to observe by these results a small difference for less in the results obtained using synchronization methods which do not contemplate harmonic compensation (method I, III and V). Table III presents the same simulation as before, but now considering a grid

frequency variation of 2 Hz, where it can be observed no significant changes in harmonic components generated by SAF, in comparison with Table II.

TABLE II SIMULATION RESULTS (GRID FREQUENCY 60 HZ)

INDIVIDUAL HARMONIC COMPONENTS

Harmonics Load

Current

Methods

I II III IV V

|FFT (5ª)| 2.234 2.068 2.102 2.071 2.149 1.986 |FFT (7ª)| 1.217 1.174 1.171 1.177 1.095 1.127

|FFT (11ª)| 0.343 0.185 0.227 0.192 0.238 0.248 |FFT (13ª)| 0.270 0.205 0.196 0.209 0.172 0.183 |FFT (17ª)| 0.157 0.047 0.065 0.052 0.069 0.073 |FFT (19ª)| 0.112 0.061 0.054 0.065 0.054 0.059

TABLE III SIMULATION RESULTS (GRID FREQUENCY 62 HZ)

INDIVIDUAL HARMONIC COMPONENTS

Harmonics Load

Current

Methods

I II III IV V

|FFT (5ª)| 2.234 2.072 2.105 2.075 2.148 2.074 |FFT (7ª)| 1.217 1.013 1.007 1.013 0.928 1.015

|FFT (11ª)| 0.343 0.183 0.213 0.188 0.228 0.184 |FFT (13ª)| 0.270 0.182 0.173 0.184 0.154 0.184 |FFT (17ª)| 0.157 0.026 0.042 0.029 0.044 0.027 |FFT (19ª)| 0.112 0.052 0.044 0.053 0.045 0.052

VII. EXPERIMENTAL RESULTS

This section presents experimental results of the SAF setup implemented. To implementation of the compensation currents, control and PWM algorithms a DSP is used, which was chosen due to their satisfactory CPU time execution and digital-analog conversion for this application. Fig. 7 present the experimental results for load currents with THDi=72.1 %, where the load is composed by a three-phase full-bridge diode rectifier. Fig. 8 present the experimental results for the compensation currents generate by the SAF using the synchronization method IV. The line grid voltages used in the experimental results present THDv = 5.8 % and unbalance voltage factor (UFv) equal to 0.32 %, that these will affect those synchronization methods that are sensitive to harmonic.

Table IV presents the experimental results of main harmonic components of currents drained by a three-phase non-controlled diode rectifier considered as non-linear load in the system, from the analysis of Fast Fourier Transform (FFT) module. Furthermore, in the same table are present the main harmonic components of compensation currents generated by SAF, based on FFT module, using the four different synchronization methods. The grid frequency considered in Table IV is 60 Hz, being this the same frequency considered in the project of filters of methods II, III and IV. It is possible to observe by these results a small difference for less in the results obtained using synchronization methods which do not contemplate harmonic compensation (method I and III).

TABLE IV EXPERIMENTAL RESULTS - INDIVIDUAL CURRENT HARMONICS

Harmonics Load

Current

Methods

I II III IV

5th 2.941 2.079 2.769 2.737 2.808 7th 1.367 0.848 0.979 1.027 1.109 11th 0.191 0.117 0.105 0.093 0.150 13th 0.322 0.083 0.117 0.101 0.268 17th 0.048 0.035 0.041 0.045 0.044 19th 0.104 0.042 0.009 0.034 0.034

VIII. CONCLUSION

The synchronization methods presented in this paper are different in complexity and performance. Method I is very simple, resulting in a reduced computation time, but the synchronization signals are distorted by unbalanced and harmonics grid voltages. Then, it is not possible to generate adequate compensation currents by the SAF using this method. On the other hand, method IV requires a higher computation time than those spent by the other methods presented here, but the synchronization signals are not distorted and generate more adequate compensation currents by the SAF. In the final version others synchronization methods in closed loop are investigated and included in this study.

Fig. 7. Load current of three-phase diode rectifier. Vertical scale: 5A/div.

Fig. 8. Compensation currents using method IV. Vertical scale: 5A/div.

REFERENCES

[1] H. Kawahira, T. Nakamura, S. Nakazawa, and M. Nomura, “Active power filter”, in Proc. IPEC’83, 1983, pp. 981-992.

[2] B. Zhang, “The method on a generalized dqk coordinate transform for current detection of an active power filter and power system”, in Proc. IEEE PESC’99, 1999, pp. 235-239.

[3] P. Mattavelli and S. Fasolo, “A closed-loop harmonic compensation for active filters”, in Proc. IEEE PESC’97, 1997, pp. 399-405.

[4] H. Akagi, H. Fujita and K. Wada, “A shunt active filter based on voltage detection for harmonic termination of a radial power distribution line”, IEEE Trans. on Industry. Applications, 1999, vol. 35, pp. 638-645.

[5] P.-C. Tan, R. E. Morrison and D. G. Holmes, “Voltage form factor control and reactive power compensation in a 25-kV electrified railway system using a shunt active filter based on voltage detection”, IEEE Trans. on Industry. Applications, (2), 2003, pp. 575-581.

[6] R. F. de Camargo, H. Pinheiro, “Three-phase four-wire shunt active filter to reduce voltage and current distortions in distribution systems”, in Proc. IEEE IECON’06, 2006, pp. 1884-1889.

[7] V. Soares, P. Verdelho and G. Marques, “Active power filter control circuit based on the instantaneous active and reactive current id-iq method”, in Proc. IEEE PESC’97, 1997, pp. 1096-1101.

[8] G.-C. Hsieh and J. C. Hung, “Phase-locked loop techniques – A survey,” IEEE Trans. on Industrial Electronics, vol. 43, pp. 609-615, Dec. 1996.

[9] M. Karimi-Ghartemani, M. R. Iravani, “A method for synchronization of power electronic converters in polluted and variable-frequency environments”, IEEE Trans. Power Systems, vol. 19, no. 3, pp. 1263-1270, Aug. 2004.

[10] J. Svensson, “Synchronization methods for grid-connected voltage source converters,” IEE Proc.-Gener. Transm. Distrib., vol. 148, no. 3, pp. 229-235, May 2001.

[11] J. L. Duarte, A. V. Zwam, C. Wijnands and A. Vandenput, “Reference frames fit for controlling PWM rectifiers,” IEEE Trans. on Industrial Electronics, vol. 46, pp. 628-630, Jun. 1999.

[12] R. F. de Camargo, H. Pinheiro, “Synchronization method for three-phase PWM converters under unbalanced and distorted grid”, IEE Proc.-Electr. Power Appl., vol. 153, no. 5, pp.763-772, Sep. 2006.

[13] S.-J. Lee, J.-K. Kang, S.-K. Sul, “A new phase detecting method for power conversion systems considering distorted conditions in power system”, in Proc. of IAS’99, vol. 4, pp. 2167-2172, 1999.

[14] L. Malesani, P. Mattavelli, and S. Buso, “Robust dead-beat current control for PWM rectifiers and active filters”, IEEE Trans. on Industry. Applications, 1999, pp. 613-620.