Voltage Boost to a Two-Phase Inverter by SVPWMJesmin Khan and Sharif BhuiyanDepartment of Electrical Engineering

Tuskegee university, Tuskegee, AL 36088Email: khanj@tuskegee.edu, sharif.bhuiyan@tuskegee.edu

Kazi RahmanDepartment of Electrical and Electronics Engineering

Bangladesh University of Engineering and TechnologyDhaka 1000, Bangladesh. Email: kmr@eee.buet.ac.bd

Abstract—In this paper, the application of space vector pulsewidth modulation (SVPWM) technique is proposed for a two-phase full bridge voltage source inverter (VSI) having reducednumber of switches. For the switching sequence, only symmetricSVPWM is considered in order to minimize the harmoniccontents of the output current. By using software, three levelswitching patterns are determined for the six power transistorsand the two-phase output voltages are applied to a balanced two-phase load. The experimental results are found good to apply inany type of practical two-phase load.

I. INTRODUCTION

The SVPWM technique has already prevailed over thetraditional sinusoidal pulsewidth modulation (PWM) techniquefor its digital implementation. But, the SVPWM techniquesfor the single-phase or two-phase induction motor drives havenot been used as widely as it has been used in the vectorcontrol of three-pase ac motors. Though, there are numerousapplications for small motors in households where three-phasesupply is not available. However, there are some problemsin working with single-phase induction motor. It operates asan asymmetrical two-phase induction motor at starting, andat running it operates as a single-phase induction motor. Ithas poor speed characteristics which makes it unsuitable foradjustable speed control. On the other hand, those problemscan easily be overcome with a two-phase induction motor.The two-phase induction motor has two symmetrical windingsin phase I and phase II with same number of windings butdisplaced by 900. It operates without a negative torque, if thesupply is a balanced voltage source without harmonics. How-ever, in spite of its simplicity of construction, reliability andhigh efficiency the two-phase induction motor can not attainmuch attention because of its constant-speed characteristics.Although some speed variation is possible by a frequencychange, however, such changes without any alteration of thesupply voltage would cause the motor to operate without aconstant flux per pole and therefore performance deteriorationcan be expected [1]. In this paper, PWM switching of the DCvoltage, a simple SVPWM method for two-phase inverter isproposed.

By using this new SVPWM strategy, dwelling time cal-culation and switching sequence selection are easily done.It is a different approach, which is based on the spacevector representation of the voltages in the complex planeand it refers to a special way of determining the switchingsequence [2], [3] of the power transistors of a two-phase VSI.

a b n

Vdc

a� b�n�

LOA

D

LOA

D

Q1

Q6 Q2

Q5Q3

Q4

A B N

van vbn

d1

d4 d6

d3 d5

d2

Fig. 1. Two-Phase Full Bridge Inverter

0 250 500 750 1000

Sector 1

vbn

van

V1 V2 V3 V4 V1

Reference

Sector 2 Sector 3 Sector 4

Fig. 2. Phase Voltages of Two-Phase System and Selection of Four BasicVoltage Vectors (V1-V4)

The desired two-phase output voltages are represented by areference voltage vector, which is used for modulation process.SVPWM technique generates less harmonic distortion in theoutput voltages and or currents in the windings of the motorload and provides more efficient use of DC supply voltage, incomparison to other PWM techniques [4]–[8].

II. MODEL DEVELOPMENT

A typical two-phase full bridge inverter can be obtainedby placing two single-phase full bridge inverters with eightpower transistors. It can also be designed by using four powertransistors with two separate DC voltage sources or two highvalued capacitors. In the proposed design of two-phase fullbridge VSI, there are six power transistors with single DCpower supply and no capacitor as shown in Fig. 1.

As shown in Fig. 1, Vdc is the DC supply voltage. Thetransistors Q1, Q4 are for phase A; Q3, Q6 for phase B andQ5, Q2 for neutral. van and vbn are the output phase voltages.PWM switching signals (i.e. a, a, b, b, n and n) supplied tothese six transistors control the output voltages. There are threedifferent levels of switching of these six transistors defined foreach leg: i) level one (i.e. only upper switch of a leg is ON)will be represented by 1, ii) level two (i.e. only lower switchof a leg is ON) will be represented by -1, and iii) level three(i.e. both switches of a leg are OFF) will be represented by 0.

For these three different levels of switching there are 33 =27 different switching combinations. But among these, onlyten arrangements can be accepted. As shown in Fig. 2 the

978-1-4244-9593-1/11/$26.00 ©2011 IEEE 104

V4

V3

V2

V1

Sector1

Sector4

Sector3

Sector2

V5�V10

Imaginary or q axis

Real or d axis

Non-linear Region, 707.0�M

Linear Region, 707.0�M

Fig. 3. Representation of the voltage space vectors and input referencevoltage vector in the complex d− q plane

two phase voltages across the two-phase windings are shiftedin phase from one another by 90o. One full cycle of these twophase voltages is divided into four different sectors with thehelp of four basic space vectors. Each sector covers 90o phaseof one full cycle (360o). Among the ten acceptable switchingarrangements four represent these four basic active voltagevectors V1(10 − 1), V2(01 − 1), V3(−101) and V4(0 − 11)and the rest six represent six zero voltage vectors V5(101),V6(011), V7(−10− 1), V8(0− 1− 1), V9(111) and V10(−1−1 − 1). The zero voltage vectors are used for freewheelingpurpose only in case of inductive loads. Here for an example,a switching assignment for V1 = 10− 1 means Q1 (i.e. upperswitch of phase A) and Q2 (i.e. lower switch of neutral) areON and all other switches are OFF. So at that condition thestates of PWM control signals for six switches are a = 1,a = 0, b = 0, b = 0, n = 0, n = 1 and the value of phasevoltages are van = Vdc and vbn = 0.

Referring to the VSI of Fig. 1, the resulting four nonzerophase voltage space vectors and six zero switching vectors areshown in the complex d − q plane in Fig. 3. Here d and qare the fixed horizontal and vertical axes in the plane of themotor phases. The basic voltage space vectors are placed inthe d − q plane in such a way that the space angles amongthese vectors are equal to the phase angles among the choseninstants corresponding to those vectors. Thus the four activeor nonzero voltage vectors (V1 − V4) form a square ABCDcentered at the origin O of d − q plane. The real or d axisand the imaginary or q axis divide the square into four sectors(Sector 1-Sector 4) each of 90o angular span. The length ofactive voltage space vectors OA, OB, OC and OD are Vdc

and the length of zero voltage space vectors is zero. So thesix zero voltage vectors (V5−V10) are located at the origin ofd− q plane as shown in Fig. 3.

For two-phase system, the reference phase voltages aredefined by

v∗an = Vm cos(ωt)v∗bn = Vm cos(ωt− π

2 )(1)

where, ω = 2πf is the angular frequency and f is fundamentalfrequency. Eq. 1 can be written in numerical form as,

v∗an(k) = Vm cos(2πkts)v∗bn(k) = Vm cos(2πkts − π

2 )(2)

where, k is the sample number and ts = 1f×n is the PWM

carrier time period or sampling interval. n is total number of

vy

�

vx

)(* kv

V2

V1

P

OV3

Fig. 4. Resolving the voltage vector v∗(k) having a magnitude OP=|v∗(k)on inverter vectors V1 and V2 having magnitudes of vx and vy

PWM carrier pulses in one fundamental period. The referencevoltage vector at the k-th sampling instant is,

v∗(k) = v∗an(k) + ejπ2 v∗bn(k) (3)

Taking v∗an(k) as the reference, the reference voltage vectorcan be resolved in direct and quadrature axes components asfollows:

v∗(k) = v∗an(k) + jv∗bn(k) (4)

The reference voltage vector v∗(k) is used for the mod-ulation process to determine the switching states and theirduration. OP is the magnitude of the desired input referencevoltage vector in Fig. 3.

III. MODULATION PROCESS

The phase voltages are sampled at a constant rate and aresynchronized to the reference voltage v∗(k). An appropriatereference voltage vector is calculated at each sampling instantas,

|v∗(k)| =√{v∗an(k)}2 + {v∗bn(k)}2 = Vm

� v∗(k) = tan−1 v∗bn(k)

v∗an(k)

(5)

The conduction time of inverter switches are modulatedaccording to the amplitude and phase angle of v∗(k). Thephase angle of reference voltage vector � v∗(k) or θ as shownin Fig. 3 can be determined by another simplified method andit has less computational complexity. θ starts from an angleθn if the sampling is started from k = 1, where, θn = 2π

n .As the value of k will be gradually increased from 1 to n, θ

will be accordingly increased from θn to k × θn. That meansif the starting position of the reference voltage vector is atSector 1 at an angle θn from V1, the phase angle of v∗(k)at the k-th PWM sample would be � v∗(k) = k × θn. Theangle of v∗(k) evaluated this way permits determination of thesector of the complex plane, where the reference vector v∗(k)lies. After determination of sector number, the appropriatetwo switching state vectors adjacent in space to the referencevector can be found. To compute the contribution of these twoinverter vectors in any sector, it is required to know the anglebetween the reference vector and the closest clockwise invertervector. This angular position of the rotating space vector maybe called the modulation angle as shown in Fig. 4. It can beevaluated by using the following formula:

� v∗(k) = (s− 1)π

2+ α or α = � v∗(k)− (s− 1)

π

2(6)

where, s is the sector number as identified in Fig. 3 andα is the modulation angle. The active voltage vectors andswitching states for modulation are determined from Table I.In this table the switching levels of the three inverter legs

105

Table I: Active voltage vectors and switching states of inverter legs in different sectors of the

complex planeSector Active

VoltagesSA SB SN van vbn

V1 1 0 -1 Vdc 01 V2 0 1 -1 0 VdcV2 0 1 -1 0 Vdc2 V3 -1 0 1 -Vdc 0V3 -1 0 1 -Vdc 03 V4 0 -1 1 0 -VdcV4 0 -1 1 0 -Vdc4 V1 1 0 -1 Vdc 0

for phase A, B and neutral are represented by SA, SB , SN ,respectively. The inverter switches are operated according totheir state assignments as shown in Table II. State 1 meansupper switch is conducting (i.e. a = 1, a = 0), state -1 meanslower switch is conducting (i.e. a = 0, a = 1) and state0 means neither upper nor lower switch is conducting (i.e.a = 0, a = 0).

Since the inverter can take one of the ten permitted con-duction states, pulse width modulation can be used to providethe voltage vector v∗(k). The vector has three componentsvx, vy and vz . Here vx, vy are due to the contribution ofthe two active inverter voltage vectors adjacent in space tothe reference vector and vz is due to the contribution of zerovoltage vector. The vx vector is applied for a duration of tx; thevy vector is applied for ty; and vz vector is applied for tz . vxand vy are calculated by drawing projection from the referencevector on the two active vectors adjacent to it. For an example,the calculation of vx, vy and thereby the determination of tx,ty and tz are shown in Fig. 4, assuming that the referencevector is located in the first 90o sector of the complex plane.By referring to Fig. 4,

vx = |v∗(k)| cosα and vy = |v∗(k)| sinα (7)

vx and vy can have a maximum magnitude of Vdc. Hence thetime duration of the states vx, vy and vz are given by

tx =vxVdc

ts, ty =vyVdc

ts, tz = ts − tx − ty (8)

With the condition ts = tx+ ty+ tz , the obtainable voltagevector resides inside the square formed by the four activevoltage vectors corresponding to the four active switchingstates of the inverter. So that the envelope of the square isthe locus of maximum magnitude of reference voltage vector|v∗(k)|. For the operation in the linear region, therefore, themagnitude of the reference voltage vector must be limited tothe shortest radius of the envelope when v∗(k) is a revolvingvector. So the maximum magnitude that the reference vectorcan have will be the radius of the largest possible circle thatcan be enclosed by the square. As shown in Fig. 3, it will bethe normal on the side of the square from the origin, which isdenoted by OL. If this maximum possible value is allowed forthe magnitude of the input reference vector, the zero vector’sON time is zero (tz = 0) at α = 45o. If the chosen referencevoltage magnitude exceeds OL, tz becomes negative.

Maximum possible magnitude of v∗(k) = Maximum pos-sible value of Vm = OL = Vdc√

2. Modulation index (M ) is the

term that relates the vector magnitude of the output voltage

Table II: State assignment of inverter legs for three level PWM at different sectors of the voltage vector and time

zonesSector Number Sector 1 Sector 2 Sector 3 Sector 4

SA 1 0 -1 0SB 0 1 0 -1SN -1 -1 1 1van Vdc 0 -Vdc 0

tx

vbn 0 Vdc 0 -VdcSA 0 -1 0 1SB 1 0 -1 0SN -1 1 1 -1van 0 -Vdc 0 Vdc

ty

vbn Vdc 0 -Vdc 0SA 0 -1 0 1SB 1 0 -1 0SN 1 -1 -1 1van 0 0 0 0

ts

tz

vbn 0 0 0 0

and DC supply voltage: M = |v∗(k)|Vdc

. In the linear regionof operation maximum value of modulation index that canbe applied to the designed inverter is, M = 1√

2= 0.707.

Therefore, M can be varied from 0.0 to 0.707. In a carrierperiod ts, there are two active states with durations tx andty and one freewheeling state with duration tz . In the free-wheeling state, when the two phase voltages are zero, if nozero voltage vector were applied, instead if all switches wereturned OFF during this period power would be feedback tothe DC supply. In SVPWM, no provision is made for powerfeedback to the DC bus because in that case the load currentwaveforms become much distorted by the current ripples. Sofor reduction of current ripples, a zero voltage vector mustbe applied during the tz period. The inverter active statetime lengths are directly calculated employing space-vectortheory, and zero-state partitioning (ZSP) is selected by theprogrammer [9], such that minimum number of switching inthe PWM pattern can be achieved.

The switches to be turned ON during tz period are selectedand the inverter switching for a particular voltage vector v∗(k)are assigned according to Table II. As an example, for thechosen switching states of Table II generated typical PWMpatterns in sectors 1 for phase A, phase B and neutral for theinverter of Fig. 1 are given in Fig. 5 (a).

IV. ASYMMETRIC AND SYMMETRIC SWITCHING

By applying switching states of Table III, the generatedPWM pattern will be asymmetric. That means the patterns arenot symmetric about the central point of carrier time period tsas shown in Fig. 5 (a). In the asymmetric SVPWM method,the numbers of switching points are minimized [10]. In thesymmetric technique, the PWM patterns are made symmetricabout the central point of carrier time period ts [11]. Thismethod increases the number of switching points, however,there is an advantage of increasing the switching frequency.The output PWM pattern has less harmonic contents comparedto asymmetric method. Though two different types of sym-metric SVPWM technique (five and seven segment switchingapproaches) are applied for the designed two-phase inverter,only the seven segment approach will be presented in thispaper.

In the seven-segment symmetric SVPWM technique thecarrier period is divided into seven segments. To generatethis symmetric SVPWM the duration for freewheeling statetz is divided into three parts within the PWM carrier period.The zero voltage vector is applied for tz

2 in the center and

106

Table III: State assignment of inverter legs and time states at different sectors for seven segment symmetric SVPWM

Sector Number Sector 1 Sector 2 Sector 3 Sector 4 SA 1 0 -1 0SB 0 1 0 -1tz/4SN 1 1 -1 -1SA 1 0 -1 0SB 0 1 0 -1tx/2SN -1 -1 1 1SA 0 -1 0 1SB 1 0 -1 0ty/2SN -1 1 1 -1SA 0 -1 0 1SB 1 0 -1 0tz/2SN 1 -1 -1 1SA 0 -1 0 1SB 1 0 -1 0ty/2SN -1 1 1 -1SA 1 0 -1 0SB 0 1 0 -1tx/2SN -1 -1 1 1SA 1 0 -1 0SB 0 1 0 -1

ts

tz/4SN 1 1 -1 -1

(a) (b)

1 1

1

(k+1)ts

ts

kts

Time

SA

SB

SN

1 0 0

0

-1 -1

tx ty tz

(k+1)tskts

Time

SA

SB

SN

tz/4 tx/2 ty/2 tz/2 tx/2 tz/4ty/2

ts

1 0001 1 1

0 1110 0 0

1-1

1-1-1 -1

1

Fig. 5. Typical SVPWM waveform pattern in Sector 1 during a carrier periodfor switching states of a) asymmetric SVPWM of Table II, and b) symmetricSVPWM of Table III.for durations of tz

4 at the beginning and also at the end. Thetiming sequence for this SVPWM is ( tz4 , tx

2 , ty2 , tz

2 , ty2 , tx

2 ,tz4 ). To obtain minimum switching frequency for this proposed

timing sequence the zero voltage vector V6 (011) is appliedfor tz at the center and V5 (101) both at the beginning andend for sector 1, V7 (-10-1) at the center and V6 (011) at thebeginning and end for sector 2, V8 (0-1-1) at the center andV7 (-10-1) at the beginning and end for sector 3, V5 (101) atthe center and V8 (0-1-1) at the beginning and end for sector4. The timing sequence and switching states for this sevensegment symmetric SVPWM are shown in Table III and as anexample, the generated typical PWM patterns in sector 1 forphase A, phase B and neutral for the switching states of thissymmetric SVPWM of Table III are given in Fig. 5 (b).

V. SIMULATION

The implementation process of the proposed SVPWM con-troller for two-phase VSI is shown in Fig. 6.

This controller takes the reference voltage vector magnitude|v∗(k) or modulation index M as an external input. The valueof DC supply Vdc, fundamental frequency f and total number

Determination of appropriate

sector

Computation of vxand vy using Eq. 7

Computation of tx, ty and tz using

Eq. 8

Calculationnkkv �� )(*

DC supply

TwophaseLoad

Selection of switching states SA, SB, SN using

Table III

Real time PWM pattern generator

kCounter

Twophase

inverter

Calculation of � using Eq. 6

ts

Incr

emen

tco

unte

r

n

f

Vdc )(* kv

Fig. 6. Logical block diagram of SVPWM controlled two-phase inverter

of PWM carrier pulses in a fundamental period n are alsoknown. The counter starts with a value k = 1 and ends atk = n. For each value of k the voltage vector position � v∗(k)and modulation angle α is computed as described above. Thenappropriate sector number is determined from the value of� v∗(k) and the projection of the voltage vector on its adjacentinverter vectors vx and vy , which are calculated using Eq.6. The time duration of active vectors and freewheeling state(tx, ty and tz) are determined from Eq. 7. After getting theappropriate time zones the switching states of the inverter areselected from Table III.

The proposed symmetric SVPWM technique is simulatedusing MATLAB software. For simulation the known quantitiesare fundamental frequency f , DC supply voltage Vdc, totalnumber of PWM carrier pulses in one fundamental periodn and the magnitude of desired reference voltage vector. Acertain number of samples jmax are considered for each carrierperiod, and for each sample, values of five quantities aredetermined:(1) switching level of phase A, (2) switching levelof phase B, (3) switching level of neutral, (4) voltage for phaseA and (5) voltage for phase B. For this proposed 3 level PWM,value of switching level for any leg of the inverter given inFig. 1 can be 1 (only upper switch of that leg is ON), -1 (onlylower switch is ON) or 0 (both switches are OFF). With thehelp of the switching level of any leg, the switching patterns ofthe two switches of that leg can be determined separately. Thesimulation is made for different values of M , n and jmax forboth five segment and seven segment approaches. Fundamentalfrequency is chosen as f = 50 Hz and two different values ofn are considered for simulation: for n = 18, carrier frequencyis 900 Hz and for n = 10, it is 500 Hz. For each n sevendifferent M such as 0.7, 0.6, 0.5, 0.4, 0.3, 0.2 and 0.1 and foreach M ten different values of jmax: 50, 100, 150, 200, 250,300, 400, 500, 600 and 700 are taken for simulation of phasevoltages, PWM patterns and switching signals.

A. Seven Segment Approach

As an example, the simulated phase voltages, spectrums,PWM patterns and switching signals for seven segment ap-proach are given in Fig. 7 to Fig. 9. With seven segmentsin one carrier period, n = 18, M = 0.7 and jmax = 700are used for the plots in Fig. 7 for two phase voltages andtheir spectrums. PWM patterns and switching signals are givenin Fig. 8 and Fig. 9, respectively. Fig. 7(a) is the phasevoltage van for phase A, Fig. 7(b) is its spectrum, Fig.7(c) is phase voltage vbn for phase B and Fig. 7(d) is itsspectrum. The phase voltages are 90o out of phase with eachother. The widths of pulses of the phase voltages in the mid-region are wider than that of at the two ends. The widths ofpulses are comparatively smaller and the number of pulsesin one cycle is higher than the five segment approach, buttotal harmonic contents are lower than five segment method.From the spectrums it is found that fundamental componentamplitude is about 70% of DC supply; lower order harmonicsare zero and significant harmonics are found near carrierfrequency, its side bands, multiples of carrier frequency and

107

Time in seconds (Frequency-1) � �f�0 0.005 0.010 0.015 0.020

- 1

-0.5

0

0.5

(a) (b)

Time in seconds (Frequency-1) � �f�(c) (d)

1

Am

plitu

de (p

.u.)

0 10 20 30 40 500

0.5

1

Am

plitu

de (p

.u.)

0 0.005 0.010 0.015 0.020

-1

-0.5

0

0.5

1

Am

plitu

de (p

.u.)

0 10 20 30 40 500

0.5

1

Am

plitu

de (p

.u.)

Fig. 7. Inverter voltages and corresponding spectrums for n = 18 (i.e.Carrier Frequency=900 Hz), jmax = 700 and M = 0.7 (a) Output phasevoltage van for phase A (b) Spectrum of van (c) Output phase voltage vbnfor phase B, (d) Spectrum of vbn .

0 0.005 0.010 0.015 0.020

-1

-0.5

0

0.5

1

Am

plitu

de

0 0.005 0.010 0.015 0.020

-1

-0.5

0

0.5

1

Am

plitu

de

0 0.005 0.010 0.015 0.020

-1

-0.5

0

0.5

1

Am

plitu

de

Times in seconds Times in seconds Times in seconds (a) (b) (c)

Fig. 8. PWM patterns of inverter legs for n = 18 (i.e. Carrier Frequency=900Hz), jmax = 100 and M = 0.7 (a) PWM pattern SA for inverter leg ofphase A, (b) PWM pattern SB for inverter leg of phase B, (c) PWM patternSN for inverter leg of neutral.their side bands. It has been found that for lower jmax withkeeping other parameters same the phase voltages and theirspectrums remain unchanged. But it is found that with areduced M both the pulse widths of the phase voltages andfundamental component amplitude are lower. For a lower n itis observed that number of pulses are reduced though pulsewidths are increased, harmonics move nearer to fundamentalcomponent in the spectrum but the fundamental componentamplitude remains same.

PWM patterns for the three legs are given in Fig. 8 forn = 18, M = 0.7 and jmax = 100. PWM pattern for leg A asshown in Fig. 8(a) looks like voltage of phase A and PWMpattern of leg B given in Fig. 8(b) is like voltage of phase B.These PWM patterns have more number of pulses than fivesegment approach. PWM pattern for neutral leg in Fig. 8(c)has two levels (1 and -1) and PWM patterns of the two phaselegs have three levels (1, 0 and -1). These PWM patterns arealso symmetric about the central point of each half cycle. It isfound that, for a lower value of n number of pulses in thesepatterns are reduced and pulse widths are increased.

Six switching signals are given in Fig. 9 for n = 18,M = 0.7 and jmax = 100. Switching signals for a reducedvalue of n with same M and jmax are examined and it isfound that switching frequencies are lower for the lower nand therefore, at the same time number of pulses are reducedand pulse widths are increased. Switching frequencies areindependent of jmax and M though pulse widths are reducedfor lower value of M .

B. Summary of Simulated Results

Fig. 7 to Fig. 9 are given for some selected values ofn, M and jmax. However, simulation has been made forvarious values of n, M and jmax. The data obtained foreach combination are used to show the effect of M and jmax

on the phase voltage amplitudes of fundamental and differentharmonic components for both five segment and seven segmentapproaches.

Fig. 10(a) shows relation between amplitude of funda-mental component of phase voltage and jmax for different

Times in seconds Times in seconds Times in seconds 0 0.010 0.020

0

0.5

1

Am

plitu

de

0 0.010 0.020

0

0.5

1

Am

plitu

de

0 0.010 0.020

0

0.5

1

Am

plitu

de

(a) (b) (c)

0 0.010 0.020

0

0.5

1

Am

plitu

de

0 0.010 0.020

0

0.5

1

Am

plitu

de

0 0.010 0.020

0

0.5

1

Am

plitu

de

Times in seconds Times in seconds Times in seconds (d) (e) (f)

Fig. 9. Switching signals of inverter switches for n = 18 (i.e. CarrierFrequency=900 Hz), jmax = 100 and M = 0.7 (a) S1 upper switch ofphase A (Switching frequency=950 Hz), (b) S4 lower switch of phase A(Switching frequency=1000 Hz), (c) S3 upper switch of phase B (Switchingfrequency=1000 Hz), (d) S6 lower switch of phase B (Switching fre-quency=950 Hz), (e) S5 upper switch of neutral (Switching frequency=4450Hz), (f) S2 lower switch of neutral (Switching frequency=4450 Hz).

0

0.2

0.4

0.6

0.8

0 175 350 525 700

No. of samples in one carrier period, jmax

Am

plitu

de o

f fun

dam

enta

l co

mpo

nent

(p.u

.)

M=0.7M=0.6M=0.5M=0.4M=0.3M=0.2M=0.1

0

0.2

0.4

0.6

0.8

0 175 350 525 700

No of samples in one carrier period, jmax

Am

plitu

de o

f fun

dam

enta

l co

mpo

nent

(p.u

.)

M=0.7M=0.6M=0.5M=0.4M=0.3M=0.2M=0.1

(a) (b)

-0.1

0.1

0.3

0.5

0.7

0 0.2 0.4 0.6 0.8

Modulation index, M

Fundamental3rd & 5thCarrier2xCarrier

Am

plitu

de (p

.u.)

-0.1

0.1

0.3

0.5

0.7

0 0.2 0.4 0.6 0.8

Modulation Index, M

Fundamental3rd & 5thCarrier2xCarrier

Am

plitu

de (p

.u.)

(c) (d)

-0.1

0.1

0.3

0.5

0.7

0 0.2 0.4 0.6 0.8

Modulation Index, M

Fundamental3rd & 5thCarrier2xCarrier

Am

plitu

de (p

.u.)

-0.1

0.1

0.3

0.5

0.7

0 0.2 0.4 0.6 0.8

Modulation Index, M

Fundamental3rd & 5thCarrier2xCarrier

Am

plitu

de (p

.u.)

(e) (f)

Fig. 10. Relation between amplitude of fundamental component of phasevoltage and jmax for different values of M for a) n = 18 and b) n =10. Relation between amplitude of fundamental and different harmonics ofphase voltage and M for c) jmax=700, n = 18; d) jmax=100, n = 18; e)jmax=700, n = 10; and f) jmax=100, n = 10.

values of M at n = 18. These curves are also straight linesand parallel to X-axis. Fundamental component amplitudeis 100M% of DC supply for all values of M irrespectiveof jmax. Fig. 10(c) is the relation between amplitude offundamental and different harmonic components and M forjmax=700. Fundamental component, 3-rd and 5-th harmonicsvary in the same way with M . Amplitude of harmonics atcarrier frequency increases with M and is lower than fivesegment approach whereas amplitude of harmonics at twicecarrier frequency is higher and total harmonic contents arelower. Fig. 10(e) is for jmax=100, which is similar to Fig.10(c). Fig. 10(b), (d) and (f) show dependence of phasevoltage on M and jmax for n = 10 and are similar as therelations for n = 18.

C. Analysis of Load Current

If an R-L load is connected in series to a voltage source(with supply voltage Vs) through switch (Sw) as shown inFig. 11, then Ri+L di

dt = Vs. In Laplace domain, with initialcondition: i(t = 0) = I0, it becomes, RI(s)+LsI(s)−LI0 =Vs

s Solving this for I(s) gives I(s) = Vs

R

(1s − 1

s+RL

)+ I0

s+RL

Taking inverse transform, i(t) = I0e−R

L t + Vs

R

(1− e−

RL t)

108

sdiRi L Vdt

Sw

Switch is closed at t=0

R

Vs

Fig. 11. An unit step applied to an R-L load.0.02

Time in seconds Time in seconds (Frequency-1) � �f� (a) (b) (c)

0 0.5 1 0.96 0.98 1-0.02

-0.01

0

0.01

0.02

Cur

rent

Am

plitu

de (p

.u.)0.015

-0.02

-0.01

0

0.01

.u.)

Cur

rent

Am

plitu

de(p

0 10 20 30 40 500

0.005)

.u.

0.01

Cur

rent

Am

plitu

de (p

Fig. 12. Phase current for seven segments, n = 18, f = 50 Hz and R/L=0.05(a) Waveform for 1st 50 cycles, (b) Waveform for 2 cycles at steady state,(c) Spectrum.

i(t) can be applied to a sampled R-L network. Currentflowing through phase A ia is considered as current referenceand this current is sampled at an interval of PWM carrier timeperiod ts. The network current at the j-th sample is Ia(j) andat the (j+1)-th sample is Ia(j + 1). An average voltage ofphase A having magnitude Van can force the load current iafrom Ia(j) to Ia(j+1) during the j-th sampling interval and inthis case the current at the (j+1)-th sample would be obtainedas

Ia(j + 1) = Ia(j)e−R

L t +Van(j)

R

(1− e−

RL t)

(9)

As an example, the waveform of the phase current for n = 18,f = 50 Hz and R/L=0.05 for seven segment approach is givenin Fig. 12.

VI. CONCLUSION

There are applications of two-phase voltage. However, two-phase supply is not readily available. So by using two-phaseinverter not only a two-phase supply be obtained but also asmooth, easy and wide control of voltage can be achieved.Two-phase inverter with three terminal DC source and fourpower transistors using sinusoidal pulse width modulation(SPWM) technique can give at best 50% of DC supply voltageas the amplitude of fundamental component. The objectiveof this work is to develop a scheme, which can give higheramplitude. In this work, by using SVPWM for two-phaseVSI with a single two terminal DC source and six powertransistors, 70% of the applied DC voltage is obtained acrossload as fundamental component. The phase current wave shapeis almost sinusoidal with negligible ripples and total harmoniccontents are also negligible. The distortion factor DF of theproposed scheme is very small that indicates its capability ofeliminating unwanted harmonics by using a simple filter. Infuture we would like to accomplish: 1) a higher voltage than70% of the DC voltage by operating the inverter in the non-linear region where M is greater than 0.707, and 2) a higherfundamental component amplitude and lower total harmoniccontents by generating five levels output voltage.

REFERENCES

[1] J. B. M.M.M. Negm and M. Shwehdi, “Speed control of a three-phaseinduction motor based on robust optimal preview control theory,” IEEETransaction on Energy Conversion, vol. 21, no. 1, pp. 77– 84, March2006.

[2] K. M. Rahman, Development of a new current controlled pulse widthmodulator for voltage source inverters. Ph.D Thesis, EEE, BUET, June2000.

[3] M. R. K. Kazi Mujibur Rahman and M. A. Choudhury, “Implementationof programmed modulated carrier hcc based on analytical solution foruniform switching of voltage source inverters,” IEEE Transaction onPower Electronics, vol. 18, no. 1, pp. 188–197, January 2003.

[4] M. J. D. Dujic, G. Grandi and E. Levi, “A space vector pwm schemefor multifrequency output voltage generation with multiphase voltage-source inverters,” IEEE Transaction on Industrial Electronics, vol. 55,no. 5, pp. 1943–1955, May 2008.

[5] J. D.-G. O. Lopez, J. Alvarez and F. D. Freijedo, “Multilevel multiphasespace vector pwm algorithm,” IEEE Transaction on Industrial Electron-ics, vol. 55, no. 5, pp. 1933–1942, May 2008.

[6] S. S. V. T. Somasekhar and K. K. Kumar, “Effect of zero-vectorplacement in a dual-inverter fed open-end winding induction-motor drivewith a decoupled space-vector pwm strategy,” IEEE Transaction onIndustrial Electronics, vol. 55, no. 6, pp. 2497–2505, June 2008.

[7] D. X. N. R. Z. Yun Wei Li, Bin Wu, “Space vector sequence investigationand synchronization methods for active front-end rectifiers in high-powercurrent-source drives,” IEEE Transaction on Industrial Electronics,vol. 55, no. 3, pp. 1022–1034, March 2008.

[8] A. K. Gupta and A. M. Khambadkone, “A simple space vector pwmscheme to operate a three-level npc inverter at high modulation indexincluding overmodulation region, with neutral point balancing,” IEEETransaction on Industry Applications, vol. 43, no. 3, pp. 751–760, May-June 2007.

[9] R. J. K. Ahmet M. Hava and T. A. Lipo, “Simple analytical and graphicalmethods for carrier based pwm-vsi drives,” IEEE Transaction on PowerElectronics, vol. 14, no. 1, pp. 49–61, January 1999.

[10] K. M. Rahman, “Analysis and implementation of pc based space vectorpwm controller for vsi inverters and ac drives,” in Int. Conf. OnComputer and Information Technology, NSU, Dhaka, January 2001.

[11] N. Mallinson, “Plug and play single chip controllers for variable speedinduction motor drivers in white goods and hvac systems,” in IEEEApplied Power Electronics Conference, 1998.

109