Space Vector based Spread Spectrum Modulation Scheme for Three-Level Inverters

Biji Jacob, M.R.Baiju

College of Engineering, Trivandrum, India biji @ece.cet.ac.in, mrbaiju@ece.cet.ac.in

Abstract- A Spread Spectrum Modulation scheme based on Space Vector for three level inverter is proposed in this paper. The scheme disperses the power spectrum of the inverter output voltage as a wide-spectrum noise. The vector space of inverter reference space vector region is divided into voronoi regions to find out switching vectors. A new method is presented to code these voronoi regions with Vector Quantization using instantaneous reference phase amplitudes without using lookup table. The space-vector diagram of three-level inverter is simplified to two-level space-vector diagram by the principle of mapping. The switching vectors are determined for two-level inverter using the proposed scheme and these switching vectors are then translated to the actual switching vectors of the three-level inverter by reverse mapping. The proposed scheme naturally selects the outer vectors in the over-modulation condition and hence results in a smooth transition from linear to over-modulation region. The scheme is implemented for 2-HP three phase induction motor driven by three-level cascaded inverter topology.

I. INTRODUCTION Three-level inverters are widely used in industrial medium-

voltage adjustable speed drives. In variable voltage, variable frequency drives, the dc link can be kept constant and voltage control is achieved by varying the duty ratio of inverter switches [1]–[3]. Three-inverters have improved total harmonic distortion and reduced stress on switching devices compared to two level inverters [2]–[6]. Commonly used modulation and control strategies in multilevel inverters are classified into carrier based sinusoidal Pulse Width Modulation (SPWM); selective harmonic elimination PWM (SHEPWM); and space vector PWM (SVPWM) [3]–[8]. The power spectrum of inverters using constant switching frequency PWM schemes tends to be concentrated around the switching frequency and its harmonics [9]-[12]. This results in the electromagnetic interference radiation from the inverter and acoustic noise generated by electric machines driven by these inverters [9]-[12].

To spread the harmonic energy over a large frequency range instead of being concentrated at few discrete frequencies variable frequency switching schemes can be used. Different variable frequency switching schemes used in two level inverters are frequency modulation of the system clock, random or quasi-random modulation of the system clock frequency, delta or sigma-delta modulation, chaotic control and hysteresis control [10]–[22]. Randomized switching time results in high frequency switching and narrow switching pulses. Spread spectrum scheme for multilevel inverters are

not yet investigated extensively. In this paper, a variable switching frequency scheme for

multilevel inverters using sigma delta modulation is proposed for spreading the power spectra. The motivation for adopting the principle of sigma delta modulation in the case of multilevel inverter is that the switching converters can be viewed as analog-to-digital converters [20]–[22]. Sigma delta modulators are used to reduce quantization noise in over sampling analog-to-digital converters [23]–[24]. The switching frequency in sigma delta modulator varies randomly under the constant sampling frequency, resulting in the spreading of the output spectra.

Sigma delta modulation with scalar quantizer is used for power control in 2-level voltage source inverters [14]–[19]. For efficient quantization in digital communication and data compression, the concept of Vector Quantization is used instead of scalar quantization [25]–[26]. Space Vector based Sigma Delta Modulator with Vector Quantization for two level inverter is proposed in [27]. The space-vector diagram of three-level inverter can be simplified to two-level space-vector diagram by the principle of mapping [28]–[29]. The present work proposes to extend the sigma delta modulation to three-level inverters and adopt the principle of Vector Quantization in the quantizer of sigma delta modulator.

This paper proposes a new approach to spread spectrum modulation for three-level voltage source inverter. The proposed scheme uses a space vector based sigma delta modulation. For quantizing reference space vector in the sigma delta modulator, the principle of Vector Quantization is used. In the present paper, sixty-degree coordinate system is used for the representation of space vector to eliminate fractional arithmetic and the computational overhead instead of conventional orthogonal coordinate system [37]–[39]. The proposed scheme is experimentally verified for three-level, four-level, five-level and six-level inverter topologies driving 2-HP three phase induction motor and experimental result are presented.

II. PRINCIPLE OF THE PROPOSED SCHEME

The Space-Vector diagram of a Three-Level Inverter is shown in Fig.1(a). This can be visualized as a hexagon formed by seven small subhexagons as shown in Fig. 1(b) [28]–[29]. The subhexagon at the centre (inner subhexagon) corresponds to the space-vector diagram of a two-level Inverter having the vector 000 as the center. There are six outer subhexagon

2011 IEEE Applied Power Electronics Colloquium (IAPEC)

978-1-4577-0008-8/11/$26.00 ©2011 IEEE 51

around the centre subhexagon. By placing the centers of outer six subhexagon on the vertex of inner subhexagon, space-vector diagram of a three-level inverter is obtained (Fig. 1). Depending on where the tip of the reference voltage space-vector lies, there are three regions of operations namely Two-level operation, Three-level operation, and over modulation region of operation. If the tip of the reference vector is confined to the inner subhexagon {│Vref│< √3/4 VDC}, it is Two-level operation mode. If the tip of the reference vector lies in the outer subhexagons {√3/4 VDC < │Vref│< √3/2 VDC}, it is Three-level operation mode. If the tip of the reference vector lies outside the hexagons {│Vref│> √3/2 VDC}, it will be in the over modulation region. If the outer subhexagons are shifted towards the inner subhexagon center, the space vector diagram of a three level inverter is simplified to that of a two-level inverter. The shifting of outer subhexagons in the space vector diagram of three-level inverter towards the zero vector 000 involves the mapping of sectors of outer subhexagons to sectors of inner subhexagon. This is done by subtracting the vector at the center of the outer subhexagon from its other vectors.

The position of the reference voltage space-vector located anywhere in the three-level space vector diagram can be mapped to inner subhexagon. Mapping of reference voltage space-vector to two-level space vector diagram is achieved by subtracting the subhexagon centre vector in which the reference voltage space-vector located from the reference voltage space-vector value. After mapping the reference voltage space-vector, the proposed scheme for two level inverter can be applied to find out the switching vectors corresponding to mapped reference voltage space-vector. The inner subhexagon can be reverse mapped to outer subhexagon by adding the voltage space-vector at the center of corresponding outer subhexagon to the vectors of the inner subhexagon. Generation of the actual switching vectors for three-level inverter is found out by reverse mapping, in which the value of selected subhexagon center’s vector is added to mapped switching vectors.

The four steps involved in the proposed Vector Quantized Space Vector Pulse Density Modulation scheme for three level inverters are (A) Identification of subhexagon center, (B) Mapping of Reference Space Vector Space Vector to inner-subhexagon, (C) Vector Quantized Space Vector Pulse Density Modulation in Two-level and (D) Reverse Mapping to original sbhexagon.

A. Identification of subhexagon center If the tip of the reference voltage space vector lies within the inner-subhexagon (│Vref│< √3/4 VDC), subhexagon center is 000. If the tip of the reference voltage space-vector is outside the inner-subhexagon, a simple algorithm is used to find the subhexagon center. The regions A to F as shown in Fig. 1 enclose each outer-subhexagon centers. The location of reference voltage space-vector in regions A to F is found out by comparing the instantaneous values of three phase control signal. Fig. 3 illustrates the scheme for finding the subhexagon center which encloses the tip of the reference voltage space-vector from the instantaneous value of three-phase reference sinusoid. Let Va, Vb and Vc represent the instantaneous magnitude of the three-phase reference sinusoid. If the magnitude of the sine wave is positive, it is represented as “1” and if the magnitude is negative, it is represented as “0”. During the time interval from ωt = 0 to ωt = 60, Va is positive, Vb is negative and Vc is positive. This corresponds to code vector 101 ( + − + ) corresponding to region A and subhexagon centre 101. Similarly, during ωt =60 to ωt =120, Va is positive, Vb and Vc are negative which implies code vector of 100 ( + − − ). That is, if the reference space vector lies within the region A, subhexagon centre is 100. Similar procedure can be used to find the remaining code vectors. Hence for regions B to F, subhexagon centers are 110, 010, 011, 001 and 101 respectively.

B. Mapping of Reference Voltage Vector Once the subhexagon containing the tip of the reference voltage space vector is identified, the reference voltage space vector is mapped to the two-level space vector diagram [28]–[29]. The mapping can be done by subtracting the vector

Fig. 1. Space Vectors diagram of a 3-Level Inverter and identification of the subhexagon center.

Fig. 2 . Mapping of 3-level to 2-level Space-Vector diagram

52

value of the selected subhexagon centre, containing the tip of the reference vector, from the original reference voltage space-vector. If (ai , bi , ci ) is the instantaneous reference voltage space-vector and (ac , bc , cc ) subhexagon centre containing the tip of the reference vector, then mapped reference vector is given by (am , bm , cm ) = (ai , bi , ci ) − (ac , bc , cc ).

The shifting of outer subhexagons in the space vector diagram of three-level inverter towards zero vector 000 results the mapping of sectors of outer subhexagons to the sectors of inner subhexagon Fig. 2. The mapping is arrived by subtracting the vector value at the centre of the outer-subhexagon from its other vertex vectors.

C. Proposed Vector Quantized Space Vector Pulse Density Modulation in Two-level

After mapping process, the three-level space vector plane is transformed to the two-level space vector plane. The proposed scheme for the Two-level inverter can be applied to find out the switching vectors corresponding to mapped reference vector. The scheme uses Sigma-Delta Modulator with Vector Quantizer. The space-vector diagram of Two-level inverter is divided into seven Voronoi regions for quantizing the mapped reference voltage space-vector.

Fig. 4 represents the proposed modulation scheme. The proposed scheme consists of two sigma-delta modulators each for the resolved m and n components of reference space vector. Each sigma-delta modulator consists of a difference node, a discrete time integrator, a space-vector quantizer and a DAC in the feedback path. The input to the integrator is the difference between the input signal V and the quantized output value S converted back to the predicted analog signal, Sa. This difference between the input signal V and the fed back signal Sa at the integrator input is equal to the quantization error. This error is summed up in the integrator to produce integrated error vector Ve.

Employing the principles of Vector Quantization (VQ), the integrated error space vector Ve is viewed as a random vector in a two dimensional vector space of two level voltage source inverter. This vector space can be divided into seven Voronoi regions, named A to F and O around each inverter voltage

vectors (Fig. 5). All vectors in a Voronoi region can be quantized to the corresponding inverter voltage vector by the principle of Vector Quantization. The eight inverter voltage vectors can be coded using 3 bits (000 to 111) which will become the code words in the vector quantizer. These code words are actual two level inverter voltage vectors.

Each Voronoi region in the vector space is quantized on to a fixed point as the code vector, which will be centroid of that region. The switching space vectors of inverter V1 to V6 and V0 respectively forms the code vectors of these Voronoi regions A to F and O. The Voronoi region and corresponding output code vector in which sampled reference input vector at any instant can be determined by comparing the instantaneous amplitude of the 3-phase input signal. The algorithm used to find out the subhexagonal center can be applied to find out Voronoi region and code vectors as illustrated in Fig. 3.

The set of available output vectors, V0 through V7, is a copy of inverter vectors. The mapping follows the principle of minimum Euclidean distance between the V and S vectors. So the constructed modulator is equivalent to one selecting at each sampling time, the output vector that minimizes the error vector.

Fig. 3. Proposed scheme to determine the Subhexagon Center.

Fig. 5 The Voronoi regions A to G corresponding to the Vector Quantizationregions of 3Φ input control signal.

Fig. 4. Proposed Two-level Space Vector Spread Spectrum Modulator

53

D. Reverse Mapping The switching vectors corresponding to mapped two-level

reference vector has to be translated back to actual switching vector corresponding to the three-level inverter. The translation can be achieved by reverse mapping the inner-subhexagon to the subhexagon containing the tip of reference space vector. This reverse mapping can be done by adding the vector value at the center of the selected subhexagon to the switching vectors of the two-level inverter [29].

If (as , bs , cs ) is the switching vectors of the two-level inverter and (ac , bc , cc ) subhexagon centre containing the tip of the reference vector, then reverse mapped reference vector is given by (as , bs , cs ) = (at , bt , ct ) + (ac , bc , cc )

II. EXPERIMENTAL RESULT AND DISCUSSION

The proposed scheme for three-level inverters can be

applied to any generalized inverter configurations like neutral point clamped, H-bridge configuration, capacitor clamped, Cascaded configuration and open end winding configuration. The proposed scheme is experimentally verified for a three-level cascaded inverter configuration by cascading conventional two two-level inverters as shown in Fig. 6 [5]. It is used to drive a 2 HP three phase induction motor with V/f control for different modulation indices covering different speed ranges. The proposed scheme is implemented using the dSPACE DS 1104 RTI platform. The logic for gating pulses for the two inverters in cascaded configuration are derived with Xilinx Virtex-II PRO XC2VP30 FPGA board.

Table-I shows the three-level cascaded inverter configuration switching strategy of the individual inverter top switches. The inverters are switched according to instantaneous two level Pulse Density Modulated (PDM) signal and corresponding subhexagon centre.

The three Pole Voltage waveforms (VA2O, VB2O, VC2O) obtained experimentally are shown in Fig. 7(a) and its time axis expanded view of marked area is shown in Fig. 7(b) for three level operation.

TABLE I. SWITCHING STRATEGY TO REALISE THREE LEVELS OF THE INDIVIDUAL INVERTERS

Sub Hexa-gon Center

Modulator signal

Status of Top Switch of Two-Level Inverters

Voltage Level

Switching level

INV-1 INV-2

0 0 ON/OFF OFF 0 0

0 1 OFF ON VDC / 2 1

1 0 OFF ON VDC / 2 1

1 1 ON ON VDC 2

Fig. 7(a)

Fig. 7(b)

From time scale expanded waveform of pole voltages shown in Fig. 7(b), it can be noted that the width of each pulse is constant which is equal to the sampling period. But the density of pulses varies depending on the reference space vector there by varying the effective width of pulses. In the proposed scheme switching frequency varies randomly as it is a pulse density modulation scheme. Since the width of each pulse is constant which is equal to the sampling time, minimum pulse width problem associated with PWM does not occur here. Fig. 8. shows experimental Pole Voltage (VAO), A-Phase voltage (VAN) and A-phase current (IA) waveforms of induction motor for the proposed scheme with modulation index 0.8 corresponding to three level mode of operation. Fig. 9 and 10 show the experimental pole voltage and phase voltage for modulation indices 0.4 and 1.1 respectively

Fig. 6. Three-level inverter configuration by cascading conventional two two-level inverters

Fig. 7(a). Experimental Three Pole Voltage (VA2O, VB2O, VC2O) waveforms for the proposed scheme with Three Level mode of operation (modulation index m= 0.8). Scale: X-axis: 4ms/div; Y-axis : 100 V/div. Fig. 7(b). Time scale expanded waveforms of the 3 pole voltages of the marked region in Fig. (a). X-axis: 400μs/div; Y-axis : 100 V/div

54

corresponding to two-level and overmodulation region. In 2-level operation, only bottom inverter-2 is switches and inverter-1 is clamped to zero level.

Fig. 11(a) and (b) shows frequency spectrum of A-phase pole voltage for the proposed scheme and SVPWM for a modulation index 0.8.

Harmonic spectral spreading property of proposed scheme can be noted without any large concentrations of power at discrete frequencies. At low frequency switching harmonics the peaks are 15 to 20 dB less in the proposed scheme compared to conventional SVPWM. Similarly Fig. 12(a) and (b) show the frequency spectrum for the modulation index 0.4 of the proposed scheme and SVPWM. Further it can be seen that noise level is 10 dB below in three-level mode (m = 0.8) compared to two-level mode (m = 0.4). Hence annoying acoustic noise emitted from ac motors operating with a carrier frequency in the audible range may be substantially reduced in an inexpensive manner by using the proposed scheme.

IV. CONCLUSION A Vector Quantized Space Vector based Spread Spectrum Modulation scheme is proposed and experimentally verified for three phase Three-Level Voltage Source Inverters. The scheme uses first order sigma delta modulator with two dimensional Vector Quantization. The Vector Space of inverter space vector region is divided into vornoi regions to find out switching vectors. A new Space Vector Quantization scheme is proposed to find out voronoi regions to derive switching vectors by comparing the instantaneous amplitude of three phase control input. The scheme does not use look up tables for sector identification and switching vector calculation. Instead of the Cartesian coordinate system, the

Fig. 8. Experimental Pole Voltage (VAO), A-Phase voltage (VAN) andA-phase current (IA) for the proposed scheme with Three-levelmode of operation (Modulation index 0.8). .Scale: Upper trace (VA2O) and Middle trace (VA2N): Y-axis :100V/div; Lower trace (IA) : Y-axis : 2A/div; X-axis: 10ms/div

Fig. 9. Upper trace: Pole Voltage (VAO) and Lower trace: Phasevoltage (VAN) for proposed scheme with modulation index m=0.4.Scale : X-axis: 20ms/div; Y-axis : 50 V/div

Fig. 10. Upper trace: Pole Voltage (VAO) and Lower trace: Phasevoltage (VAN) for proposed scheme with modulation index m=1.1.X-axis: 10ms/div; Y-axis : 100 V/div

Fig. 11(a). Frequency spectrum of A-phase Pole voltage (VAO) for the proposed scheme with modulation index m=0.8. Scale : Y-axis : 10 dB/div. X-axis : 2.5 KHz/div

Fig. 11(b). Frequency spectrum of A-phase Pole voltage (VAO) for SVPWM with modulation indexm=0.8. Scale : Y-axis : 10 dB/div X-axis : 2.5 KHz/div

Fig. 12(a). Frequency spectrum of A-phase Pole voltage (VAO) for the proposed scheme with modulation index m=0.4. Scale : Y-axis : 10 dB/div. X-axis : 2.5 KHz/div

Fig. 12(b). Frequency spectrum ofA-phase Pole voltage (VAO) forSVPWM with modulation indexm=0.4. Scale : Y-axis : 10 dB/divX-axis : 2.5 KHz/div

55

sixty degree coordinate system is used to represent the space vectors. Since only integer values are involved in sixty degree coordinate system it reduces the computational overheads compared to Cartesian coordinate system. The proposed modulator was implemented for three-level cascaded inverter configuration driving 2-HP induction motor. Experimental results are presented covering different speed ranges such as two-level, three-level and over modulation regions. In the proposed scheme density of pulses is varied instead of pulse width resulting in random variation in switching frequency. The experimental results show that harmonic spectrum of the proposed scheme disperses the switching harmonics as a wide-spectrum noise. Compared to SVPWM, the switching harmonics peaks are suppressed to the range of 15 to 20 dB. The noise level in three level mode of operation is still lesser compared to two level mode of operation in the scheme. The minimum switching pulse width in the proposed scheme is the sampling time, resulting in avoidance of minimum pulse width problem.

REFERENCES [1] L. M. Tolbert, F. Z. Peng, and T. G. Habetler, “Multilevel converters

for large electric drives,” IEEE Trans. Ind. Appl., vol. 35, no. 1, pp. 36–44, Jan./Feb. 1999.

[2] Jose Rodriguez, Jih-Sheng Lai and Fang Zheng Peng, " Multilevel Inverters: A Survey of Topologies, Controls and Applications ", IEEE Transactions on Industrial Electronics, vol.49, No.4, August 2002, pp 724-738.

[3] P. F. Seixas, M. A. Severo Mendes, P. D. Donoso-Garcia, and A. M. N. Lima, “A space vector PWM method for three-level voltage source inverters,” in Proc. IEEE APEC, 2000, vol. 1, pp. 549–555.

[4] K. Zhou and D. Wang, “Relationship between space-vector modulation and three-phase carrier-based PWM: A comprehensive analysis,” IEEE Trans. Ind. Electron., vol. 49, no. 1, pp. 186–196, Feb. 2002.

[5] W. Yao, H. Hu, and Z. Lu, “Comparisons of space-vector modulation and carrier based modulation of multilevel inverter,” IEEE Trans. Power Electron., vol. 23, no. 1, pp. 45–51, Jan. 2008.

[6] Hyo L. Liu, Gyu H. Cho and Sun S. Park, “Optimal PWM Design for High Power Three-Level Inverter Through Comparative Studies,” IEEE Trans. Power Electron., vol. 10, no. 1, pp. 38–47, Jan. 1995.

[7] J.W. Gray and F.J. Haydock, “Industrial power quality considerations when installing adjustable speed drive systems,” IEEE Trans. Indusry Applications, vol. 32, no. 3, pp. 646–652, May/June 1996.

[8] Samir Kouro, Mariusz Malinowski, K. Gopakumar, Josep Pou, Leopoldo G. Franquelo, BinWu, Jose Rodriguez, Marcelo A. Pérez, and Jose I. Leon, “Recent Advances and Industrial Applications of Multilevel Converters,” IEEE Transactions on Industrial Electronics, Volume 57, Issue 8, August 2010, pp. 2553 – 2580.

[9] K. K. Tse, H. S. Chung, S. Y. R. Hui, and H. C. So, “Analysis and spectral characteristics of a spread-spectrum techniques for conducted EMI suppression,” IEEE Trans. Power Electron, vol. 15, no. 2, pp. 399–410, Mar. 2000.

[10] J.T. Boys and P.G. Handley, “Spread spectrum switching: low noise modulation technique for PWM inverter drives,” IEE Proceedigs-B, Vol. 139, No. 3, May 1992, pp. 252-260.

[11] Andrzej M. Trzynadlowski, Frede Blaabjerg, Stanislaw Legowski, “ Random Pulse Width Modulation Techniques for Converter-Fed Drive System – A Review,” IEEE Trans. Indusry Applications, vol. 30, no. 5, pp. 1166–1175, Oct. 1994.

[12] Ki-Seon Kim; Young-Gook Jung; Young-Cheol Lim, “A New Hybrid Random PWM Scheme”, IEEE Transactions on Power Electronics Volume 24, Issue 1, Jan. 2009

[13] Hyo L. Liu and Gyu H. Cho, “ Three-Level Space Vector PWM in Low Index Modulation Region Avoiding Narrow Pulse Problem,” IEEE

Transactions on Power Electronics, Vol. 9, No.5, Sep. 1994, pp. 481 – 486 .

[14] Nieznanski J, “ Analytical Establishment of the Minimum Distortion Pulse Density Modulation,” Electrical Engineering 80(1997), pp 251-258.

[15] Nieznanski J, “Performance Characterization of Vector Sigma- Delta Modulation,” Proc. of Conference of the Industrial Electronics Society IECON '98, pp 531-536.

[16] Nieznanski J, Wojewodka A. and Chrzan P.J, “Comparison of Vector Sigma - Delta Modulation and Space- Vector PWM,” Conference of the Industrial Electronics Society IECON 2000 Volume 2, pp1322 - 1327.

[17] Atushi Hirota, Satoshi Nagai and Mutsuo Nakaoka, “ A Novel Delta-Sigma Modulated Space Vector Modulation Scheme using Scalar Delta-Sigma Modulator,” Proc. Power Electronics Specialists Conference, 2003, PESC ‘03, pp 485 – 489 vol.2.

[18] Atushi Hirota, Satoshi Nagai and Mutsuo Nakaoka, “A Simple Configuration Reducing Noise Level Three-Phase Sinewave Inverter Employing Delta-Sigma Modulation Scheme,” Proc. Applied Power Electronics Conference and Exposition, 2006, APEC'06. pp 1485- 1489.

[19] Atushi Hirota, Bishwajit Saha, Sang-Pil Mun and Mutsuo Nakaoka, “An Advanced Simple Configuration Delta-Sigma Modulation Three-Phase Inverter Implementing Space Voltage Vector Approach,” Proc. Power Electronics Specialists Conference, 2007, PESC 2007, pp 453 – 457.

[20] Glen Luckjiff Ian, Dobson and Deepak Diwan, “Interpolative Sigma Delta Modulators for High frequency Power Electronics Applications,” Proc. of Power Electronics Specialists Conference, PESC '95 , vol.1, pp 444 - 449.

[21] Glen Luckjiff and Ian Dobson, “Hexagonal Σ∆ modulators in Power Electronics,” IEEE Transactions on Power Electronics, Vol. 20, No.5 (Sep. 2005), pp1075 – 1083

[22] Glen Luckjiff and Ian Dobson, “Hexagonal Sigma Delta Modulation,” IEEE Transactions on Circuits and System I, Vol. 50, No.8 (Sep. 2003), pp991 – 1005.

[23] J. C. Candy and G. C. Temes, “Oversampling methods for A/D and D/A conversion in Oversampling Delta– Sigma Data Converters, Theory, Design and Simulation,” New York: IEEE Press, 1992.

[24] Pervez M. Aziz, Henrik V. Sorensen, and Jan Van der Spiegel, “An Overview of Sigma-Delta Converters,” IEEE Signal Processing Magazine, Volume 13, Issue 1, September 1996, pp 61-84.

[25] Robert M. Gray, “Vector Quantisation,” IEEE ASSP Magazine (April 1984), pp 4-28.

[26] Gersho A.,”On the Structure of Vector Quantisation,” IEEE Transactions on Information Theory, IT-28 (March1982), pp157 –166.

[27] Biji Jacob and M.R. Baiju, “ Spread Spectrum Scheme for Two-Level Inverters using Space Vector Sigma-Delta Modulation,” 5th IET International Power Electronics, Machines and Drives, PEMD 2010.

[28] Jae Hyeong Seo, Chang Ho Choi and Dong Seo Hyun, A New Simplified Space-Vector PWM Method for Three- Level Inverters, IEEE Transactions on Power Electronics, Vol. 16, No.4, July 2001, pp 545–550.

[29] Aneesh Mohammed A.S, Aneesh Gopinath and M.R. Baiju-“A Simple Space Vector PWM Generation Scheme for Any General n-Level Inverter,” IEEE Transactions on Industrial Electronics, Volume 56, Issue 5, May 2009, pp. 1649 – 1656.

[30] N. Celanovic, and D. Boroyevich, “A fast space vector modulation algorithm for multilevel three phase converters,” IEEE Trans on Industry Applications, Vol.37, No.2, 2001, pp637-641.

[31] Sanmin Wei, Bin Wu, Fahai Li and Congwei Liu, “ A General Space Vector PWM Control Algorithm for Multilevel Inverters,” Proc. Applied Power Electronics Conference and Exposition, 2003, APEC'03, pp. 562-568.

56