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The Time-Domain Analysis for Constant On-Time Critical Mode Boost-Type PFC Converters Yang-Lin Chen Yaow-Ming Chen Cheng-Nan Wu Electric Energy Processing Laboratory. (EEPro) Department of Electrical Engineering National Taiwan University, Taipei, Taiwan Abstract—This paper proposed a time-domain mathematical analysis for the constant on-time (COT) critical mode (CRM) boost-type power factor correction (PFC) converter with and without zero voltage switching (ZVS) or valley switching (VS). The mathematical expression for the unfiltered input current function is derived and used to calculate the total harmonic distortion (THD). Then, the input filter is considered to calculate the filtered THD. The derived mathematical equations will help users to understand the causes of the current distortion and to design an appropriate filter to reduce the THD. The accuracy of the proposed time-domain analysis is verified by different simulation software, Octave and SIMPLIS. The calculated THD values by the proposed mathematical expressions and by the circuit simulation software are found to be consistent. I. INTRODUCTION The need for DC power source has been increased rapidly because of the fast-developing 3C products and mobile devices. Usually, a DC power supply which converts the AC source from the utility line into the DC form is required. In order to maintain the good power quality on the ac mains, the function of power factor correction (PFC) is demanded for the DC power supply. Conventionally, the AC-DC power converter with the PFC function can be named as the PFC converter. Different circuit topologies, such as boost, buck, or flyback, can be adopted to implement the PFC converter. Among them, the boost is the most widely used circuit topology to fulfill the PFC converter due to its simplicity, low cost, low input current distortion and the ability to maintain input current through the low input voltage [1]-[2]. Usually, the continuous conduction mode (CCM) operation is desired for the boost-PFC converter to achieve low input current distortion [3]. Unfortunately, the significant reverse recovery losses on the boost diode will limit the efficiency, especially at the full load and low line condition. One technique to eliminate the reverse recovery loss of boost diode is to operate the boost converter in the critical mode (CRM) [4]. Many control methods has been proposed to achieve the CRM operation for the boost-PFC converter. The constant on-time (COT) control is the most commonly used strategy because its average input current can achieve a pure sinusoidal waveform with unity power factor. Because the COT-CRM boost-PFC converter has the inherent large ripple current and variable switching frequency, the input current usually has higher total harmonics distortion (THD) than expected. The THD is defined as: √∑ ( ) (1) where is the root-mean-square (RMS) value for the k th harmonic component of the input current, and is the RMS value of the fundamental component [5]-[7]. This equation implies that the THD can be calculated if the time domain function of input current is derived. Many mathematical methods had been proposed to analyze the boost-PFC converter [8]-[12]. Unfortunately, because the THD can be easily affected by the input filter, input capacitance, line voltage, output voltage, load demand, or operation modes (zero voltage switching, ZVS or valley switching, VS), those papers do not provide a way to estimate the THD for the boost-PFC converter with the input filter. It brings the motivation to further study the THD time-domain analysis for the COT-CRM boost-PFC converter. In this paper, a time-domain analysis is proposed to compute the THD of COT-CRM boost-PFC converter with the input filter. The results presented in this paper will be very helpful to understand the cause of the THD and to accomplish the input filter design. In this paper, the input current mathematical equations will be derived first and the expression for the current THD will be presented. The derived equations will be verified by different computer simulation softwares. The Octave, which is a high-level language primarily intended for numerical computations, is 978-1-4673-0803-8/12/$31.00 ©2012 IEEE 4643

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Page 1: [IEEE 2012 IEEE Energy Conversion Congress and Exposition (ECCE) - Raleigh, NC, USA (2012.09.15-2012.09.20)] 2012 IEEE Energy Conversion Congress and Exposition (ECCE) - The time-domain

The Time-Domain Analysis for Constant On-Time

Critical Mode Boost-Type PFC Converters

Yang-Lin Chen Yaow-Ming Chen Cheng-Nan Wu

Electric Energy Processing Laboratory. (EEPro)

Department of Electrical Engineering

National Taiwan University, Taipei, Taiwan

Abstract—This paper proposed a time-domain mathematical

analysis for the constant on-time (COT) critical mode (CRM)

boost-type power factor correction (PFC) converter with and

without zero voltage switching (ZVS) or valley switching (VS).

The mathematical expression for the unfiltered input current

function is derived and used to calculate the total harmonic

distortion (THD). Then, the input filter is considered to

calculate the filtered THD. The derived mathematical

equations will help users to understand the causes of the

current distortion and to design an appropriate filter to reduce

the THD. The accuracy of the proposed time-domain analysis

is verified by different simulation software, Octave and

SIMPLIS. The calculated THD values by the proposed

mathematical expressions and by the circuit simulation

software are found to be consistent.

I. INTRODUCTION

The need for DC power source has been increased

rapidly because of the fast-developing 3C products and

mobile devices. Usually, a DC power supply which converts

the AC source from the utility line into the DC form is

required. In order to maintain the good power quality on the

ac mains, the function of power factor correction (PFC) is

demanded for the DC power supply. Conventionally, the

AC-DC power converter with the PFC function can be

named as the PFC converter.

Different circuit topologies, such as boost, buck, or

flyback, can be adopted to implement the PFC converter.

Among them, the boost is the most widely used circuit

topology to fulfill the PFC converter due to its simplicity,

low cost, low input current distortion and the ability to

maintain input current through the low input voltage [1]-[2].

Usually, the continuous conduction mode (CCM) operation

is desired for the boost-PFC converter to achieve low input

current distortion [3]. Unfortunately, the significant reverse

recovery losses on the boost diode will limit the efficiency,

especially at the full load and low line condition. One

technique to eliminate the reverse recovery loss of boost

diode is to operate the boost converter in the critical mode

(CRM) [4].

Many control methods has been proposed to achieve the

CRM operation for the boost-PFC converter. The constant

on-time (COT) control is the most commonly used strategy

because its average input current can achieve a pure

sinusoidal waveform with unity power factor.

Because the COT-CRM boost-PFC converter has the

inherent large ripple current and variable switching

frequency, the input current usually has higher total

harmonics distortion (THD) than expected. The THD is

defined as:

√∑(

)

(1)

where is the root-mean-square (RMS) value for the

kth

harmonic component of the input current, and is

the RMS value of the fundamental component [5]-[7]. This

equation implies that the THD can be calculated if the time

domain function of input current is derived.

Many mathematical methods had been proposed to

analyze the boost-PFC converter [8]-[12]. Unfortunately,

because the THD can be easily affected by the input filter,

input capacitance, line voltage, output voltage, load demand,

or operation modes (zero voltage switching, ZVS or valley

switching, VS), those papers do not provide a way to

estimate the THD for the boost-PFC converter with the

input filter. It brings the motivation to further study the

THD time-domain analysis for the COT-CRM boost-PFC

converter.

In this paper, a time-domain analysis is proposed to

compute the THD of COT-CRM boost-PFC converter with

the input filter. The results presented in this paper will be

very helpful to understand the cause of the THD and to

accomplish the input filter design. In this paper, the input

current mathematical equations will be derived first and the

expression for the current THD will be presented. The

derived equations will be verified by different computer

simulation softwares. The Octave, which is a high-level

language primarily intended for numerical computations, is

978-1-4673-0803-8/12/$31.00 ©2012 IEEE 4643

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used to compute and plot the derived mathematical

equations. The SIMPLIS, which is circuit simulation tool, is

used to obtain the simulated waveforms of the actual COT-

CRM boost-PFC converter. Both of the results obtained by

different simulation approaches will be used to verify the

validity of the proposed time-domain analysis methods.

II. MATHEMATICAL ANALYSIS FOR THD

A. Ideal COT-CRM boost PFC converter

The COT-CRM boost-PFC converter with input LC filter is shown in Fig. 1 while its switching signal and the corresponding inductor current waveform are shown in Fig. 2.

In Fig. 2, when the switch is turned on, the inductor

current will increase linearly. On the contrary, the inductor

current will decrease to zero when the switch is turned off.

The inductor current ripple can be expressed as (2), where

is the RMS value of the input voltage, Ton is the turn-on

time, is the input inductance and is the line frequency in

rad/sec. By define the parameter √ ⁄ , the

switching period can be derived as (3).

√ ( )

(2)

( )

(3)

Assuming switching frequency is much higher than the

line frequency and the input voltage can be treated as a

constant during a switching cycle, (3) will become (4) where

is the nth switching period during one line-frequency

cycle. It is said that the switch is turned-on at the moment

∑ and turn-off at ∑

as shown in Fig. 2.

From (2) through (4), the nth

triangle waveform of input

current can be represented as the time domain function (5).

The parameters, , , , and ( ), are defined in (6),

where the ( ) is the unit step function.

( ∑ )

(4)

( ) ( ) ( )

( ) ( ) (5)

Eventually, the mathematical expression of the input

current can be derived and shown in (7), which is the

summation of the first to the last th triangle inductor current

waveforms within a half line-frequency cycle. The value of

value can be determined by (8).

By using the numerical computation software Octave, the

unfiltered input current waveforms expressed in (5) through

(7) can be plotted as shown in Fig. 3(a). A portion of Fig 3(a)

is expanded and shown in Fig. 3(b). It can be seen that Fig.

3(b) has the triangular current as the theoretical one shown in

Fig. 2. It verifies that the derived unfiltered input current

equations are the correct description of the input current of

the COT-CRM boost-PFC converter.

{

( ) ( ) ( )

√ ( )

(6)

( ) ∑ ( )

(7)

( )

(8)

It is understandable that if and are known,

the THD shown in (1) can be determined. From (5) to (7),

the mathematical expression of can be derived as (9).

Furthermore, the fundamental component of the input

current, , can be represented as (10) by using Fourier

Fig. 1. The COT-CRM boost-PFC converter.

Fig. 2. The inductor current waveform (top) and the switching signal (bottom).

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transform operation. From (1), (9), and (10), the unfiltered

input current THD, as shown in Fig. 3, is 57.7%, which is

very close to the results presented in reference [10].

∑(( )

( )

( )

)

(9)

∑( ( ( ))

)

(10)

However, equations (9) and (10) do not include the

information of the kth harmonics so they cannot be used to

evaluate the current THD with the input filter. Therefore, the

Fourier series of (7) is a solution, which can solve the

coefficient of kth harmonic and they can be used to evaluate

the THD with the input filter.

After many steps of derivation starting from (1), (5), and

(7), equations (11) to (13) can be derived. Equation (11) is

the Fourier series of (7), suppose the cosine portion of

Fourier series is zero, its coefficient is defined in (12). In

(12), the coefficient is defined in (6) and ( ) is

defined in (13). Equation (11) and (12) can be used to

estimate the RMS value of the kth

harmonic current.

Eventually, the input current THD can be expressed as

(14), where ( ) is the transfer function of the input filter.

In order to reduce the THD and improve the power quality,

the input filter should be designed carefully [13]-[14]. From

(14), the THD is calculated as 57.7% without input filter and

( ) is equal to the unity gain. This result is identical to

the result obtained from (9) and (10). It verifies the validity

of these derived equations.

On the other hand, the input filter as shown in Fig. 1 has

the transfer function indicated in (15) and parameters defined

in (16) where is the inductance, is the capacitance,

is the quality factor and is inductor resistance. By using

(11) to (16) with parameters =100μH, =1μF, =0.5Ω.

The filtered input current THD is calculated as 2.19%.

( ) ∑ ( )

∑ ( )

(11)

=∑

{ ( )

( )}

(12)

( ) ( ) ( ) (13)

√∑(| ( )| | ( )|

)

(14)

( )

( ) (15)

{

(16)

B. Non-ideal COT-CRM boost PFC converter with ZVS/VS

However, considering the parasitic capacitors on

MOSFET and diode, the inductor current has the negative

part when the converter has the ZVS or VS [15]-[17]. A PFC

boost converter with parasitic capacitors is shown in Fig. 4.

When is smaller than , converter is operated at ZVS

mode. Its switching signal and corresponding inductor

current and drain-source voltage are shown in Fig. 5(a). On

the other hand, when is larger than , converter is

operated at VS mode. Its switching signal and corresponding

inductor current and drain-source voltage are shown in Fig.

5(b).

(a) Current waveform of a half line-frequency cycle.

(b) An expanded portion of (a).

Fig. 3. The derived unfiltered input current plotted by Octave.

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For the purpose to simplify the analysis, ZVS mode is

discussed in this paper. In ZVS mode, equation (3) through

(5) is modified as (17) to (19). The parameter is defined in (6)

and (20), and is . The unfiltered input current

waveforms expressed in (19) and (7) can be plotted as shown

in Fig. 6(a). A portion of Fig. 6(a) is expanded and shown in

Fig. 6(b). It can be seen that Fig. 6(b) has the triangular

current with negative part as the theoretical one shown in Fig.

5(a). It verifies that the derived unfiltered input current

equations are the correct description of the input current of

the COT-CRM boost-PFC converter.

( )

√ ( ( ))

( )

√ (

( )

( ))

(17)

( )

√ ( ( ))

( )

√ (

( )

( ))

(18)

( )

(

( )) ( )

( ) ( )

√ (

√ ) ( )

(19)

{

( ( ))

(20)

However, in SIPLIS simulations, the unfiltered current is

shown in Fig. 7. Fig. 6(a) and Fig. 7 are different in dash-

circle region. This is because that the inductor current has

negative part, | | , and it become large while the input

voltage is small. The average inductor current will become

zero when the integration of (19) is zero.

Therefore, the voltage on the capacitor of input filter will

not follow the grid voltage which is a sinusoid wave. The

input current waveform and capacitor voltage waveform are

shown in Fig. 8. The average input current Iin is zero and

capacitor voltage Vcin will maintain in the cutoff region until

grid voltage is larger than capacitor voltage.

Finally, from the integration of (19), the cutoff region

will be determined. And from the same steps, (11) to (14),

equation (19) can be used to calculate THD with input filter.

Using the same parameters of input filter, =100μH,

=1μF, =0.5Ω, and parasitic capacitor =150pF. The

filtered input current THD is calculated as 9.86%.

III. THE COMPUTER SIMULATION

To further verify the validity and the accuracy of the derived mathematical equations, the electric circuit simulation software SIMPLIS is used to simulate the performance of the COT-CRM boost-PFC converter. The specifications of the simulated prototype circuit are listed as follows.

• Input voltage Vin = 110Vrms/60Hz

• Output voltage Vout = 400Vdc

Fig. 4. The COT-CRM boost PFC converter with parasitic capacitors and ZVS/VS function.

(a) ZVS mode,

(b) VS mode,

Fig. 5. The inductor current and drain-source voltage waveform (top) with the switching signal (bottom) at ZVS/VS mode.

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• Conduction time Ton = 8µs

• Boost inductor = 400μH

• Input filter = 100μH , = 1μF, RL = 0.5Ω

• Parasitic capacitor = = 150pF

From the derived mathematical equations, the unfiltered input current THD is 57.7% and the filtered one is 2.19% while the input filter is in front of bridge. For the SIMPLIS simulation, the unfiltered input current waveform is shown in Fig. 9 and the current THD calculated by the embedded tool is equal to 58.2% which is very close to the one obtained by the proposed mathematical equations. On the other hand, the filtered input current waveform using SIMPLIS, as shown in Fig. 10, has the current THD equals to 2.12%. This result is also very close to the one calculated by the proposed mathematical equations.

The THD becomes 2.10% while the input filter is behind the bridge and its input current waveform is shown in Fig. 11. The dash-circle shown in Fig.11 indicates the phenomenon shown in Fig. 8.

On the other hand, the filtered current waveform with ZVS is shown in Fig. 12 with THD equal to 9.97%. This result is also very close to 9.86% which is calculated by the proposed mathematical equations. The dash-circle region in Fig. 12 is the cutoff region mentioned in Fig. 8.

These simulation results are similar to the time-domain analysis proposed in this paper. The small difference between the calculated value and the simulated one may be caused by the non-idea switching behavior of the boost-PFC converter. The accuracy of these equations is verified by SIMPLIS in this paper.

IV. CONCLUSION

This paper proposed a time-domain mathematical analysis for the COT-CRM boost-PFC converter. The derived mathematical equations will help users to understand the cause of the current distortion and to design an appropriate filter in order to reduce the THD. The accuracy of the proposed time-domain analysis is verified by different simulation software. This analysis is not only used in single phase PFC boost converter, but also multi-phase PFC boost converter.

(a) Current waveform of a half line-frequency cycle.

(b) An expanded portion of (a).

Fig. 6. The derived unfiltered input current with ZVS function plotted by Octave.

Fig. 7. The simulation result of unfiltered input current waveform with ZVS.

Fig. 8. The waveforms of input filter capacitor voltage and average input current.

Fig. 9. SIMPLIS simulated unfiltered input current waveform with THD=58.2% calculated by its embedded tool.

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REFERENCES

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[2] O. Garcia, J.A. Cobos, R. Prieto, P. Alou, and J. Uceda, "Single phase power factor correction: a survey," IEEE Trans. Power Electron., vol.18, no.3, pp.749-755, May 2003.

[3] Zheren Lai, and K.M. Smedley, "A family of continuous-conduction-mode power-factor-correction controllers based on the general pulse-width modulator," IEEE Trans. Power Electron., vol.13, no.3, pp.501-510, May 1998.

[4] M.S. Elmore, "Input current ripple cancellation in synchronized, parallel connected critically continuous boost converters," APEC 1996, pp.152-158.

[5] D. Shmilovitz, "On the definition of total harmonic distortion and its effect on measurement interpretation," IEEE Trans. Power Delivery, vol.20, no.1, pp. 526- 528, Jan 2005.

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[7] I.V. Blagouchine, and E. Moreau, "Analytic method for the computation of the total harmonic distortion by the cauchy method of residues," IEEE Trans. Communications, vol.59, no.9, pp.2478-2491, Sep 2011.

[8] J. Zhang, J. Shao, P. Xu, F.C. Lee, and M.M. Jovanovic, "Evaluation of input current in the critical mode boost PFC converter for distributed power systems," APEC 2001, pp.130-136.

[9] A. Abramovitz, "Effect of the ripple current on power factor of CRM boost APFC," IPEMC 2006, pp.1-4.

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[13] V. Vlatkovic, D. Borojevic, and F.C. Lee, "Input filter design for power factor correction circuits," IEEE Trans. Power Electron., vol.11, no.1, pp.199-205, Jan 1996.

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[15] S.-H. Tang, D. Chen, C.-S. Huang, C.-Y. Liu, and K.-H. Liu, "A new on-time adjustment scheme for the reduction of input current distortion of critical-mode power factor correction boost converters," IPEC 2010, pp.1717-1724.

[16] L. Huber, B.T. Irving, and M.M. Jovanovic, "Effect of Valley Switching and Switching-Frequency Limitation on Line-Current Distortions of DCM/CCM Boundary Boost PFC Converters," IEEE Trans. Power Electron., vol.24, no.2, pp.339-347, Feb 2009.

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Fig. 10. Filtered input current waveform with input filter placed in front of the bridge.

Fig. 11. Filtered input current waveform with input filter placed behind the bridge.

Fig. 12. Filtered input current waveform with ZVS function.

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