ieee transactions on power electronics, vol. 30, no. 2

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015 985

Circuit-Oriented Treatment of NonlinearCapacitances in Switched-Mode Power Supplies

Daniel Costinett, Member, IEEE, Dragan Maksimovic, Senior Member, IEEE,and Regan Zane, Senior Member, IEEE

Abstract—Nonlinear, voltage-dependent capacitances of powersemiconductor devices are capable of having significant impact onthe operation of switched-mode power converters. Particularly athigh switching frequency, these nonlinearities play a significantrole in determining switching times, losses, and converter dynam-ics during switching transitions. In order to accommodate the well-established design and analysis techniques commonly used for lin-ear circuits, this paper examines the nonlinear voltage-dependenceof switching device capacitances and proposes a circuit-orientedanalysis technique that allows the parasitic capacitances to bereplaced with linear equivalents. The multitude of developedequivalents are verified through full nonlinear simulation in bothMATLAB/Simulink and SPICE, as well as through experimentalresults.

Index Terms—Equivalent circuits, linearization techniques, non-linear circuits, parasitic capacitance, power semiconductor devices.

I. INTRODUCTION

TRENDS in power converter design have led to increasedswitching frequencies, motivated by improvements in

achievable passive component size, control bandwidth, and elec-tromagnetic interference reduction. However, as switching fre-quencies approach the feasible limits of current devices, pre-viously negligible characteristics of switching transitions be-come crucial components of the converter design and analysis.These switching characteristics include, e.g., switching loss,time-duration of the switching transition, and converter dynam-ics during the switching transition, all of which depend heavilyon the intrinsic capacitances of the switching devices used inthe circuit.

The incorporation of nonlinear capacitances has been ad-dressed in various ways in prior studies. Most commonly, inpower converter analysis, the effect of device capacitanceson circuit operation is largely ignored, with switching losses

Manuscript received November 27, 2013; revised February 2, 2014; acceptedMarch 12, 2014. Date of publication March 25, 2014; date of current versionOctober 7, 2014. This work was supported by the Colorado Power ElectronicsCenter (CoPEC). This work was presented at the IEEE Workshop on Controland Modeling of Power Electronics in 2012 [1]. Recommended for publicationby Associate Editor Y. Xing.

D. Costinett is with the Department of Electrical Engineering and Com-puter Science, University of Tennessee, Knoxville, TN 37996 USA (e-mail:[email protected]).

D. Maksimovic is with the Department of Electrical, Computer, and En-ergy Engineering, University of Colorado, Boulder, CO 80309 USA (e-mail:[email protected]).

R. Zane is with the Department of Electrical and Computer Engineering, UtahState University, Logan, UT 84322 USA (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2014.2313611

calculated later for hard switched converters, or neglected inzero-voltage switching (ZVS) converters so long as the appro-priate device current polarity is present at the switching in-stant [2]–[4]. In either case, this leads to the assumption thatthe contribution of switching intervals to converter dynamics issufficiently small such that they may be approximated as instan-taneous. This leads to significant discrepancy at high switchingfrequency and low power, where the time required to dischargethe capacitor may be significant in comparison to the switchingperiod.

Works such as [5]–[8] have replaced the nonlinear capacitorwith a linear equivalent, but have rarely detailed or formalizedthe method by which the equivalent capacitance was chosen.Further, many studies have used a single equivalent linear ca-pacitance to model multiple characteristics of circuit behavior. Itis clear analytically and shown experimentally, e.g., in [9], thatthe nonlinearity cannot be modeled correctly in terms of time,energy, and charge simultaneously by a single linear capacitor.The voltage dependence of a nonlinear capacitor can be mod-eled in its entirety in circuit simulators [10], [11]. Often, suchsimulations have been carried out with a simplified empiricalfit to the MOSFET nonlinear capacitance Coss , either through asimple polynomial [12] or a curve fit of the form

Coss(vds) =C0(

1 + vd s

V0

)m (1)

commonly with m = 1/2. Equation (1) is sufficiently accu-rate for simple devices [13], [14], but errant for more complex,modern devices, including superjunction devices [15] as well asvarying structures of GaN [16]–[18] and SiC [19], [20] switch-ing devices. Furthermore, this analysis approach remains overlycumbersome for any hand analysis [11], [15], [21]. So longas the output capacitor remains nonlinear, the circuit analysismethods traditionally used in power electronics circuits cannotbe applied directly. Thus, it is useful to create a clear and con-sistent framework for treating nonlinear capacitors in switchingpower converters by replacing them with linear equivalents.Such an approach has been attempted previously for singularapplications [10], [22]–[24], but has not been generalized toaddress the various parameters on which a linear equivalentmay be based. Once an appropriate linear substitution has beenmade, traditional, well-developed linear circuit analysis tech-niques can be employed to solve the operating characteristics ofpower converters.

The nature of analysis including nonlinear capacitors is ad-dressed in Section II, with hand analysis presented in Section III.Techniques for the simulation of nonlinear capacitances are

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986 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015

Fig. 1. Origin of various parasitic capacitances shown in a cross section of avertical power MOSFET in cutoff. Hatched regions indicate metalized contactswhile shaded regions indicate electrically-insulating oxide layers.

reviewed in Section IV and experimental verification is pre-sented in Section V. Section VI concludes this paper.

II. CIRCUIT ANALYSIS WITH NONLINEAR CAPACITORS

Device capacitances are inherently present due to the un-derlying structure of semiconductor switching devices, and aregenerally deemed parasitic in nature. These include oxide ca-pacitances as well as P-N junction capacitances across the de-pletion regions generated when reverse biased. For concision,analysis will focus on the nonlinear MOSFET output capaci-tance, with straightforward applications to diode junction ca-pacitance or any other voltage-dependent capacitor. The phys-ical origin of the various parasitic capacitances is shown for ageneric vertical power MOSFET in Fig. 1. Of primary concernfor power converter design is the MOSFET output capacitanceCoss = Cds + Cgd , which must be charged or discharged bythe converter power stage with each switching action. Note thatboth Cgd and Cds span the depletion region, and therefore willvary accordingly with its width, which in turn increases withapplied voltage Vds [25], [26]. The varying width of the capac-itor formed between the drain and the equipotential gate andsource nodes gives rise to the nonlinear voltage dependence ofthe output capacitance Coss = Coss(Vds). Additional complex-ities are introduced when advanced topologies, such as trenchgate or superjunction devices are considered, as well as alternatematerials, e.g., as in wide bandgap devices.

In order to clarify equations throughout this paper, thevoltage-dependence will be expressed with notation

Coss(Vds) = Coss∣∣VD S

(2)

where the vertical bar indicates the value of the capacitanceevaluated at the specified voltage.

To further demonstrate the variation in Coss among a varietyof devices, materials, and fabrication processes, a number ofexample curves are shown in Fig. 2. This data is extracted fromdevice datasheets by visually fitting discrete points to the curve,then interpolating to a higher resolution. If datasheets do notcontain sufficient data, a simple impedance analyzer with thedc bias is capable of producing the Coss curves, though more

Fig. 2. Examples of differing Coss voltage dependences for three silicondevices, two GaN devices, and one SiC device.

precise methods exist [20], [27]–[30]. It is desired to developlinear equivalents directly based on this data, so that circuitdesigners may compare the merits of many different devicesprior to circuit construction and testing. Furthermore, becausethe shapes of the curves for differing devices vary widely, itis desired to avoid empirical fit formulas such as that of (1),and instead develop a method that remains valid for arbitrarilyshaped Coss–Vds data.

Given a curve containing Coss–Vds data, it must be understoodin what sense the plots of Coss model the behavior of the devicein a circuit. Coss can be understood as a small-signal equivalentcapacitance, such that

ic = Coss

∣∣∣Vd s

dvds

dt(3)

holds true at any dc-bias voltage VDS , assuming a small-signalperturbation vds � VDS . This definition is derived from themethod by which the Coss data in these plots is measured, whichoften consists of using an impedance analyzer or similar tomeasure the ids which results from an applied perturbation vds

on top of a dc bias VDS . This definition can also be integratedover a time interval dt to be viewed in terms of capacitor chargeqc as

dqC = Coss

∣∣∣Vd s

dvds (4)

which is distinct from the incorrect large-signal interpretation

qc �= Coss

∣∣∣VD S

VDS (5)

which neglects the voltage dependence of Coss in (3). The em-ployed Coss data, by definition, considers only the behavior ofthe capacitor in a small window surrounding a certain dc bias,and does not contain information on charge accumulation overthe entire range 0 ≤ Vds ≤ VDS .

It is further important to consider how the nonlinear analysisdiffers from the traditional knowledge base developed for linearcapacitors. Due to the presence of a nonlinear element, tradi-tional linear analysis techniques such as superposition will not


COSTINETT et al.: CIRCUIT-ORIENTED TREATMENT OF NONLINEAR CAPACITANCES IN SWITCHED-MODE POWER SUPPLIES 987

Fig. 3. Example circuit containing two identical nonlinear capacitors withvoltage-dependent capacitance Coss . Ceq is the ac-equivalent nonlinear capac-itor at the port defined by Vsw .

Fig. 4. Plot of the nonlinear capacitances associated with Fig. 3.

hold [31]. Charging and discharging behaviors of circuits con-taining nonlinear capacitances are not guaranteed to be identical,though fundamental laws such as energy and charge conserva-tion continue to hold.

Where series/parallel combinations of nonlinear capacitorsare present, care must be taken to include the full nonlinear volt-age dependence when simplifying. In particular, simplificationto ac-equivalent impedances, where dc bias is ignored, requirescareful consideration of the voltage present on each individualcapacitor. As an example, consider the circuit of Fig. 3. Whencalculating the equivalent impedance seen from the port definedby Vsw , it is useful to reduce to the ac-equivalent capacitanceCeq = (Coss |Vd s 1 )‖(Coss |Vd s 2 ). However, due to the voltage de-pendence, even if both capacitors are identical, they exhibit dif-ferent capacitances due to their differing dc voltage bias. Giventhat Vds2 = VA − Vds1 , the resulting nonlinear switched-nodecapacitance Ceq can be calculated as shown in Fig. 4. How-ever, as in the linear case, this simplification is an ac equivalentonly; the information contained in the dc bias is lost. Thus, thissimplification is useful for calculating impedances, but wouldnot contain the correct information for total energy or chargestorage in the two nonlinear capacitors.

The circuit of Fig. 3 appears often in power converter anal-ysis; the two nonlinear capacitors can be seen to represent aMOSFET half bridge, or if they are allowed to take differentvalues, may represent a diode and MOSFET bridge. In particu-lar for high-frequency power conversion, the characteristics ofthe transition of Vsw between 0 and VA are of critical importanceto converter design. In either case, the established solutions de-veloped under the assumption of purely linear circuits do notapply. In the following section, the general nature of nonlinearcapacitances is addressed directly, and linear equivalent capac-itors are developed for which the traditional analysis methods

Fig. 5. Nonlinear capacitor used in derivation of energy and charge equiva-lents, independent of application circuit.

and tools can once again be used to obtain correct predictionsof capacitor energy storage, hard switched loss, and resonanttransition time, among other parameters.

III. DEVELOPMENT OF LINEAR EQUIVALENT CAPACITANCES

In order to develop equivalent linear capacitors, analysis mustfocus on parameters of interest on which to base the equivalence.Because of their fundamental nonlinearity, a constant-valued,linear capacitance will generally only be able to correctly modela single parameter for a given voltage transition. First, inde-pendent of the application circuit, both the energy and chargerequired to move the capacitance between two voltages shouldbe addressed. Because both are conservative, only the definingcurve of the nonlinear capacitor voltage dependence is neededto obtain the storage at a given voltage. Thus, linear equivalentcapacitors which store the same amount of charge or energy ata given voltage can be developed for the nonlinear capacitor ofFig. 5, independent of application circuit.

Using the small-signal definition of Cx |Vcfrom (3), it has been

shown previously that the total energy in a nonlinear capacitor isgiven by integrating the product of Cx and Vc across the voltagerange, e.g., from 0 to VC [24]

Ec =∫ VC

0vCx

∣∣vdv. (6)

Note that this total energy Ec depends on dc-bias conditionsand can therefore not be calculated on an ac-equivalent non-linear capacitor. The energy can then be used to find a linearcapacitance value that contains the same amount of energy atVC by considering the solution to the energy stored in someequivalent capacitor Ceq,E , which is linear, constant-valued

Ec =12Ceq,E VC

2 . (7)

By combining (6) and (7), an expression for the energy-equivalent linear capacitor can be obtained

Ceq,E =2

VC2

∫ VC

0vCx

∣∣vdv (8)

where Ceq,E and Cx store the same amount of energy at a dcvoltage VC .

A similar process may be used to find the total charge

Qc =∫ VC

0Cx

∣∣vdv (9)

and charge-equivalent linear capacitance,

Ceq,Q =1

VC

∫ VC

0Cx

∣∣vdv (10)



Fig. 6. Generalized equivalent circuit to a voltage transition involving a non-linear capacitor. A charging transition is considered, where voltage dynamicsduring the transition depend on the impedance Z .

which will have the same amount of stored charge at VC as thenonlinear capacitor Cx . As seen from (10), this value is simplythe average of the Cx curve with respect to the voltage range.

Beyond these two, all other parameters of interest are specificto the application circuit. To remain as general as possible, thecircuit of Fig. 6 is used, and a transition is considered through-out this section which results in Vc moving from Vc = 0 toVc = VA . The capacitance Cx

∣∣Vx

is a generalized nonlinear ca-pacitance and may represent Coss or Csw , where appropriate, orany other capacitance-versus-voltage curve of interest. In thesevoltage transitions, the energy stored, supplied, or dissipated inthe remaining components of the circuit is also of interest, aswell as the time taken for the voltage transition, which informsoptimal dead time selection in a converter.

Next, consider the energy sourced by a supply in charging anonlinear capacitance. This energy can be solved independentlyof the series element impedance. The total energy supplied, Es ,from Vg is the integral of its instantaneous power over the timetaken to charge the capacitance, Cx

Es =∫

t

Vg ig (t)dt (11)

where ig = ic and therefore the definition from (3) can be usedto transfer the variable of integration and obtain

Es =∫ VA

0VgCx

∣∣vdv (12)

which, given the previous definition of Ceq,Q , can be reduced to

Es = VgCeq,QVA (13)

with VA the final value of Vc in the transition being considered.Comparing to the linear case, it is apparent that the charge-

equivalent capacitance is also the correct value to use whensolving for supplied energy. This follows intuition, as the energysupplied by the constant voltage source should be determinedentirely by the charge supplied to Cx and the voltage at whichit is deposited. Additionally, combining (13) and (7), the energyprocessed by the impedance Z can be found as

EZ = Es − Ec =(

Ceq,QVg

VA− 1

2Ceq,E

)VA

2 (14)

and an equivalent capacitance Ceq,Z can be given for the energyprocessed by the impedance

Ceq,Z = 2Ceq,QVg

VA− Ceq,E . (15)

This capacitance has slightly different meaning dependingon whether Z is inductive or resistive (if Z is capacitive, it canbe trivially combined as an offset in the nonlinear capacitance

definition). If a resonant transition is considered where Z ispurely inductive, Ceq,Z may be used to model the inductor be-havior during, for example, a zero-voltage switching transitionof a half-bridge. If the two devices constituting the half bridgeare paralleled as detailed in Fig. 4, Cx = Ceq and the result-ing Ceq,Z is a capacitor which results in the same change instored energy in the inductor during the transition from Vc = 0to Vc = VA . If instead a hard-switching transition is considered,Z is resistive, and Cx is the output capacitance of a single device,Coss . In this case, Ceq,Z is the linear capacitor which results inthe same amount of energy dissipated on the resistance duringthe voltage transition.

Finally, it desired to develop equivalent capacitors which canaccurately model the duration of the voltage transition in thecase of either resistive or inductive Z. Such a value is usefulin determining the optimal duration of half bridge dead timesfor hard-switched or resonant transitions, respectively. In theresistive case, under the assumption that Vg > VA so that thetransition can be completed in finite time, the rise-time of theR − C circuit containing a nonlinear capacitance is

tr,nlin = R

∫ VA

0

Cx

∣∣v

Vg − vdv (16)

which is compared to the well-known solution for the linearcapacitance case

tr,lin = RClin ln(

Vg

Vg − VA

)(17)

to obtain the equivalent linear capacitance for which rise timesare equal

Ceq,tr =1

ln(

Vg

Vg −VA

)∫ VA

0

Cx

∣∣v

Vg − vdv. (18)

Note that a similar approach is taken to determine a fall-timeequivalent, but the resulting value is not, in general, the same.

If Z is inductive, the time tzvs taken to move voltage Vc from 0to VA is fundamentally given through the solution to a system ofnonlinear differential equations. For Fig. 6, the two differentialequations describing circuit operation are

ig = Cx

∣∣Vc

dVc

dt(19a)

Vg − Vc = Ldigdt

. (19b)

These equations can be combined, taking care to rememberthat Cx is now time-varying, and thus cannot be pulled out ofthe time derivative. Instead, the chain rule for derivatives is usedto obtain

LCx

∣∣Vc

d2Vc

dt2+ L

(dVc

dt

)2d

dVc

(Cx

∣∣Vc

)+ Vc = Vg . (20)

The numerical solution for the ZVS interval duration is then,for the nonlinear circuit

tZVS =∫ VA

0

Cx

∣∣vdv√

I2L0 + 2

L

∫ v

0 Cx

∣∣vy

(Vg − vy ) dvy

(21)



where vy is a dummy notational variable used for integrationwithin the nested integral that occurs due to the second-ordernature of the circuit. This equation may be applied to obtainnumerical solutions in a program such as MATLAB. As anexample, if cx is an array of capacitances with correspondinglyindexed voltage array vx, and r is an array with the indexesinto both which correspond to the range 0 <vx< VA , (21) canbe solved by a single command

The value of tzvs can then be combined back into the solutionof Fig. 6 with a time-equivalent linear capacitance Ceq,tzvs ; forthe circuit at hand with inductive impedance, this solution isgiven by the integral

tZVS = Ceq,tzvs

∫ VA

0

dv√I2L0 + C e q , t z v s

L (2Vgv − v2). (22)

By plugging in the value for tZVS solved previously, a numericalsolution for Ceq,tzvs can be obtained through iterative analysis.

Comparing (21) and (22), one can note that at L → ∞,Ceq,tzvs → Ceq,Q . This follows intuition; in the case of a con-stant current source, the time taken to traverse any voltage rangewill be determined only by the total charge. With finite valuesof L considered, Ceq,tzvs may differ somewhat from Ceq,Q . Par-ticularly in the case of converters employing small-valued, ac,resonant or soft-switching inductors, or in converters operatingat or near their ZVS boundary where the change in inductorcurrent during the ZVS interval is large. Otherwise, Ceq,Q willoften remain a good approximation in situations where it is notfeasible to calculate Ceq,tzvs .

With these developed linear capacitors, all parameters of in-terest in a power converter can be solved for. Slight modifica-tions of integral limits and defining functions of Cx are needed toaccommodate different circuit configurations or transition types(e.g., partial soft-switching), but the process of solving linearequivalents remains the same. In the following section, the pro-cesses of simulating nonlinear capacitors in both MATLAB/Simulink and LTSpice are detailed. Simulation results are usedto compare the dynamics of the LC circuit of Fig. 6 containinga nonlinear device capacitance as well as each of the four linearequivalents developed in this section.

IV. NONLINEAR DEVICE SIMULATION

To confirm the analysis of the previous section, simulationsof circuits containing a nonlinear capacitance are carried out inMathWorks Simulink and LTSpice. Results are included here forboth tools to illustrate how nonlinear capacitors can be incorpo-rated into both mathematical and circuit-based simulation tools.It is again assumed that the defining voltage-versus-capacitancecurves are known, and the numerical data is available with ap-propriate resolution.

A. Simulation in LTSpice

Within the SPICE environment, the effective behavior of anonlinear, voltage-dependent capacitor may be implemented as

Fig. 7. Circuits showing (a) an example implementation of a nonlinear ca-pacitor as a subcircuit and (b) implementation in a schematic. Note that thetable has been truncated to show only the first two datapoints of a nonlinearcapacitance with, e.g., 850 pF value at 0 V bias in (a). For increased utility,the time-varying capacitance value is output as a voltage proportional to thecapacitance (in pF) through the CapVal port. The resulting subcircuit is givena symbol and implemented in the red dashed box in (b).

shown in Fig. 7. A nonlinear capacitor subcircuit is shown inFig. 7(a) using a behavioral current source whose value is deter-mined by the time-derivative of the capacitor voltage, multipliedby the capacitance value at the current capacitor voltage. In or-der to determine the capacitor voltage at any time instant, thetable function is used with a .func directive and the com-plete array of coma-delimited (vds ,Coss) pairs is pasted into thenetlist, or LTspice GUI. A behavioral voltage source then out-puts a voltage equal to the capacitance value associated with thecurrent operating conditions, which is both used by the previ-ously described current source, and selected as an output portto allow observation of the capacitance value. This subcircuitcan then be given a symbol and used in the same manner as anynormal, linear capacitor in circuit simulations. Fig. 7(b) showsthis element, X1 , in a circuit simulation designed to comparethe rise times of the nonlinear capacitor and its linear equivalent,Ceq,tr .

B. Simulation in Simulink

The implementation of an identical circuit simulation whichcompares the resistively charged rise times of nonlinear and alinear equivalent capacitors is given for Simulink in Fig. 8(a).www.IranSwitching.ir


Fig. 8. (a) Example Simulink implementations of nonlinear capacitors in anR − C circuit and a (b) time-varying state space description of a switchingpower converter.

A one-dimensional lookup table is used in the nonlinear case tosupply the capacitance based on the current terminal voltage ofthe device.

As circuit complexity increases, and additional circuit statesare included, it is often useful to develop state space descriptionsof the circuit behavior of the form Kx = Ax + Bu. In the caseof switching power converters, the matrix A and vector B are po-tentially time-varying within a switching period due to the vari-ation in switch states, while K is the diagonal matrix containingonly inductances, mutual inductances, and capacitances. Of-ten, the matrix K is eliminated to yield x = A′x + B′u, where

A′ = K−1A and B′ = K−1B. However, such an approach re-sults in state space equations in which A′ and B′ are potentiallyfunctions of the nonlinear capacitance. It is crucial to the speedof the simulation that the matrices are not recalculated at eachtimestep [10]. In order to facilitate the incorporation of a non-linear capacitance without forcing the recalculation of matricesA and B at each timestep, K is retained in the state space def-inition and the integration of x is carried out explicitly so thatthe effective K multiplication can be implemented with a num-ber of gains for the linear reactive elements and look-up tablemultiplications for the nonlinear.

An example switching converter with one voltage-dependentcapacitor and one linear inductor is shown in Fig. 8(b); aMATLAB function is used to perform the Ax + Bu calcula-tion to easily allow the matrices to be varied between multiple(precalculated) values according to the current time-determinedswitch state of the circuit. The matrix K is implemented as asingle 1/L gain and a 1-D lookup table for Coss

∣∣Vd s

C. Simulation Results

Among the developed linear equivalents, only Ceq,tr andCeq,tzvs are mutually exclusive. Thus, the rise time equivalentcapacitance is evaluated independently. Simulations are carriedout for a single IPB60R385CP 600 V Infineon CoolMOS de-vice [32], starting from Vds = 0 and charged by a series Vg =600-V source and 100-kΩ resistor. The linear equivalent Ceq,tr

is based as normal on the rise time as Vds moves from 0 to 80%VDSS , which is VA = 480 V.

In order to simulate the device output capacitance, datasheetplots of the full nonlinear Coss characteristic are used to visuallyextract the data of Table I, which is then logarithmically inter-preted to obtain Coss − Vds data at 10-mV resolution which isused in the simulation. To verify proper extraction and interpo-lation, this data is plotted on top of the datasheet plots for Cossand Eoss in Fig. 9, showing good agreement.

The IPB60R385CP device was chosen here because InfineonCoolMOS devices commonly contain more extensive datasheetreporting of nonlinear capacitance characteristics. This includesthe additional Eoss plot shown in Fig. 9(b) which is used as a sec-ond point of verification for data extraction and two datasheet-reported values for linear equivalents, Co(er) and Co(tr) , whichare the energy- and time-related “effective output capacitances”for VDS from 0 to VA = 480 V, which are reported to be 36and 96 pF, respectively. Based on the extracted data, Ceq,E andCeq,tr are calculated as in (8) and (18) as 36.35 and 96.99 pF,respectively.

However, this agreement is not always consistent among de-vices from different manufacturers. Most often, when includedin the datasheet, Co(tr) is defined as “. . . a fixed capacitancethat gives the same charging time as Coss while VDS is ris-ing from 0% to 80% VDSS” [32]. However, this definition doesnot take into account the method by which the capacitance ischarged. If charged by constant current, constant resistance, orresonantly, the equivalent capacitance will differ, and the valuereported in the device datasheet therefore depends on the testsetup used to determine it. For example, among 600 V devices,



TABLE IEXTRACTED IPB60R385CP NONLINEAR CAPACITANCE DATAPOINTS

Fig. 9. Overlays of visually-extracted data for the nonlinear capacitance (red,dashed) on screenshots of datasheet plots of a IPB60R385CP device. The samedata is compared to both the Coss and Eoss plots.

the Infineon IPx60R450E6 and Vishay SiHU7N60E datasheetslist values for Co(tr) which are the charge-equivalent capaci-tance, rather than Co,tr , indicating either implicitly or explicitlythat a constant-current charging setup was used. While thesevalues are not incorrect, the varying definitions of equivalentcapacitances among device datasheets indicates caution shouldbe used whenever these values are used in analysis.

Simulations of the nonlinear capacitance and the linear equiv-alent, Ceq,tr , are shown in Fig. 10, in both LTSpice andSimulink. In each case, the voltage across the capacitors risesfrom 0 to 480 V in tr = 15.6 μsec. However, the waveformsof the linear and nonlinear capacitors are radically different intheir dynamics while approaching this point.

To simulate the remaining equivalent capacitances in a reso-nant transition, a 200-V FDMC2610 silicon MOSFET is used as

Fig. 10. Simulation results in (a) LTSpice and (b) Simulink showing thecomparison between the voltage waveform of a IPB60R385CP as it is chargedby a series 600-V source and 100-kΩ resistor. Waveform labels indicate whetherthe full nonlinear relationship or its linear equivalent is simulated in each case.

an example device with curves for Coss∣∣Vd s

measured explicitlyup to 40 V using an Agilent 4284A Precision LCR Meter, andextrapolated from the datasheet thereafter. The resulting datafor Coss is given in Table II. Again, logarithmic interpolation isused to obtain increased resolution for simulation and analysis.

The circuit simulated is that of Fig. 6 with Z implementedas an inductor of magnitude L = 12.5 μH and initial currentIl0 = 0 A. The circuit is allowed to resonate with vds1 starting atan initial voltage of zero volts and resonating until reaching Vg =VA = 200 V. The calculated values for the linear equivalents inthis circuit are

Ceq,Q = 70.5 pF Ceq,E = 56.4 pF

Ceq,tzvs = 64.1 pF Ceq,Z = 84.5 pF

Though not relevant to the resonant circuit, Ceq,tr = 65.7 pFis calculated for the same voltage range if resistive chargingwere instead employed. None of these values approach the nom-inal value for Coss quoted in the datasheet, which is 41 pF atVds = 100 V, and only Ceq,E is near the maximum listed as55 pF. This is, however, purely coincidental; a single Coss − Vds

datapoint cannot possibly capture the full behavior of thewww.IranSwitching.ir


TABLE IIMEASURED AND EXTRACTED FDMC2610 NONLINEAR CAPACITANCE DATAPOINTS

Fig. 11. Simulations of the nonlinear capacitance, Coss and the four linear equivalents developed here. The horizontal or vertical dashed black line indicates thecorrect value of the respective simulation parameter which a linear equivalent should match. In each case, only the single, appropriate linear equivalent leads to acorrect approximation, i.e., (a) Ceq ,tzvs , (b) Ceq ,Z , (c) Ceq ,E , and (d) Ceq ,Q .

nonlinear characteristic. In general, a single value of Coss∣∣VD S

from a table in a device datasheet is not intended to model anybehavior other than the small-signal capacitance at dc bias VDS .

Simultaneously, the four appropriate equivalent linear capac-itances are simulated under identical conditions. Simulation re-sults are shown in Fig. 11. The voltage vds , current il , capacitorenergy Etot , and capacitor charge Qtot are shown with respectto time in individual plots. Each circuit is allowed to resonatefor precisely the amount of time required to reach vds = VA . In

each plot, a horizontal or vertical dashed black line shows thecorrect value of the parameter being plotted, as determined bysimulation of the full nonlinear characteristic. There is a clearnecessity to choose the appropriate capacitance when solvingfor a certain aspect of the resonant circuit: Ceq,tzvs for resonanttime, Ceq,Z for final inductor current, Ceq,E for energy storedin the capacitor, and Ceq,Q for its charge; also, no one valueof capacitance is capable of simultaneously modeling all of thecharacteristics of interest in the circuit.



Fig. 12. (a) Schematic of DAB converter and (b) operating waveforms.MOSFET equivalent capacitances, Coss are shown explicitly.

V. APPLICATION AND EXPERIMENTAL VERIFICATION

It is desired to use the developed linear-equivalent capac-itors to aid in the analysis of the phase-shifted dual activebridge (DAB) converter, whose schematic and typical oper-ating waveforms are shown in Fig. 12. A previously devel-oped silicon-transistor prototype is used; operation is testedup to 110 W with a 150-to-12 V step-down conversion ratioand matched transformer turns ratio nt = 0.08 [33]. Primarydevices Q1 − Q4 are implemented with Fairchild FDMC2610MOSFETs, while secondary switches Q5 − Q8 consist of TexasInstruments CSD16325Q5 NexFETs in parallel with RohmRSX501LA Schottky barrier diodes. All devices are switchedat fs = 1 MHz to emphasize the impact of resonant intervals.To begin, it is of interest to know the amount of losses incurredif the high-voltage primary side devices are not zero-voltageswitched. For this, the inductor Ll is disconnected, and theprimary devices are switched separately, with dead times to pre-vent shoot-through current. Because the tank is disconnected,il(t) = 0, and the losses in the system are dominated by thecapacitive switching losses of the four primary side devices.The expected losses from hard switching are divided into twocategories for each half bridge transition: losses from shortingout device capacitances, and losses from the RC-type chargingof the opposite device in each half-bridge. With this in mind,both Ceq,E and Ceq,Z are calculated for an individual device toobtain the total losses due to hard switching of device capaci-tances; considering all four devices and switching frequency fs

this is

Ploss = 4(

12Ceq,E Vg

2fs

)+ 4

(12Ceq,Z Vg

2fs

)(23)

which can be reduced via (15) to

Ploss = 4Ceq,QVg2fs. (24)

Interestingly, the total hard-switched loss depends only on thecharge-equivalent capacitance of the individual switches, andnot the energy equivalent as intuition may suggest. The sameanalysis can be applied to obtain the losses due to the hard-switching of the secondary switches

P ′loss = 4C ′

eq,QVo2fs (25)

where the prime (′) indicates parameters referred the secondaryside; C ′

eq,Q is the charge-equivalent capacitance of the IRF6713and RSX501LA in parallel. The voltage dependence of the non-linear capacitance of these two devices in parallel is taken di-rectly from plots in their respective datasheets and given inTable III.

Next, the ZVS boundary and soft-switching time of the pri-mary devices are evaluated by reducing the output power of theconverter until ZVS of primary side devices is achieved just asthe inductor current reaches 0 A. A single bulk capacitance isconsidered between nodes a and b in Fig. 12 which consists ofthe series/parallel combination of all four nonlinear capacitanceson the primary full bridge. During the switching transition, thevoltage on this equivalent capacitance is moved from −150 V to+150 V. From the previous state plane analysis, it is known thatthe ZVS condition on the normalized inductor current Jpk at thestart of the resonance, and normalized total primary resonanttime α, are given by

Jpk > 2 (26)

α =π

2− cos−1

(2

Jpk

). (27)

Here, one can observethat standard state-plane analysis bene-fits from the development of linear capacitors, i.e., because thecapacitance involved is used to perform normalization, its non-linearity is not present in the normalized equations. Traditionalstate plane analysis can be used without modification to solvecharacteristics of circuit operation; one only needs to select thecorrect linear equivalent capacitor to denormalize the results.Because (26) is a condition on inductor energy, Ceq,Z is used,while Ceq,tzvs is used to denormalize time in (27) to obtain theactual values for peak current at the start of the resonance, Ipk

and resonant interval duration tα

Ipk > 2Vg

√Ceq,Z

Ll(28)

tα =√

LlCeq,tzvs

[π

2− cos−1

(2Vg

Ipk

√Ll

Ceq,tzvs

)](29)

where a transition between zero and VA = Vg = 150 V is con-sidered for each of the half-bridge capacitances, as in Fig. 4.The linear-equivalent predictions for hard-switching loss, ZVScondition, and resonant time of the primary-side FDMC2610 de-vices are compared to experimental results in Table IV, showinggood agreement. Also included as reference are the analyticalestimates one would obtain if the same calculations were made



TABLE IIIEXTRACTED NONLINEAR CAPACITANCE DATAPOINTS FOR CSD16325 AND RSX501LA IN PARALLEL

TABLE IVEXPERIMENTAL RESULTS FOR DUAL ACTIVE BRIDGE PRIMARY

Fig. 13. Low-voltage secondary switch losses under hard-switching condi-tions. Experimental (circles) results are compared to predictions using the pro-posed analysis [from (25)] and to two references. Reference curve 1 assumesa constant capacitance equal to the value of Coss listed in the datasheet ofCSD16325 (at 12.5 V) and the capacitance of the RSX501LA evaluated at thesame voltage; reference 2 assumes a linear capacitance taken from the datasheetplots evaluated at Vo .

using the approximation that Coss is linear, with magnitudeequal to that quoted on the datasheet for the device (41 pF at100 V), and with magnitude extrapolated from the datasheetplot for Coss at Vg (25 pF at 150 V). These approximations areshown to be highly inaccurate, indicating a clear need for theuse of appropriate linear equivalents.

Finally, the hard switching loss of the low-voltage, high cur-rent secondary is tested experimentally, again with the inductorand transformer disconnected to isolate capacitive losses. Thedc output voltage is set from an external supply and is variedacross the range 0 < Vo < 12 V. Capacitive switching loss ispredicted using (25), with Ceq,Q evaluated at each output volt-age. Results are given in Fig. 13, showing excellent accuracy ofthe proposed analysis at a variety of voltages. References curvesare again included for comparison, to illustrate how assuminga fixed Coss based on the value provided for a specific voltageyields erroneous switching loss estimates.

VI. CONCLUSION

The examination of in-circuit effects of nonlinearities in theoutput capacitance, Coss , of switching devices in power elec-tronic circuits is often neglected or treated in a simplified butpotentially inaccurate manner. Use of a linear substitution toCoss based on a datasheet value at a specific voltage can result

in significant errors in circuit calculations. The nonlinearity can-not be modeled correctly in terms of time, energy, and chargesimultaneously by a single linear capacitor. Instead, this papershows how an appropriate linear equivalent must be determinedto correctly model a specific characteristic of circuit operation.In particular, as the boundaries of frequency, efficiency, andpower density are pushed, this significant nonlinearity needs tobe carefully addressed.

To achieve both simplicity and accuracy of circuit analysis,linear equivalent capacitances to the nonlinear Coss can be usedto remove the need for cumbersome nonlinear analysis throughan algorithmic approach. After linearization, traditional circuitanalysis techniques can be applied, and the analysis remainsaccurate for the parameter used as the basis for determiningthe linear equivalent capacitance. Simulations and experimentsshow how the process results in highly accurate predictions forpower electronic circuits under both hard-switched and soft-switched conditions.

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efficiency in high step-down dual active bridge converters operating athigh switching frequency,” IEEE Trans. Power Electron., vol. 28, no. 8,pp. 3931–3940, 2013.

Daniel Costinett (S’10–M’13) received the B.S.,M.S., and Ph.D. degrees in electrical engineeringfrom the University of Colorado, Boulder, CO, USA,concluding in 2013.

In 2012, he assisted with research and coursedevelopment as an Instructor at Utah State Univer-sity, Logan, UT, USA. He is currently an AssistantProfessor in the Department of Electrical Engineer-ing and Computer Science, University of Tennessee,Knoxville, TN, USA. His research interests includeresonant and soft-switching power converter design,

high-efficiency power supplies, mixed-signal integrated circuit design, im-plantable devices, and electric vehicles. He is the Co-Director of Education andDiversity for the National Science Foundation/Department of Energy ResearchCenter for Ultra-wide-area Resilient Electric Energy Transmission Networks(CURENT). He is also a Research Engineer with the Power Electronics andElectric Machinery Research Center, Oak Ridge National Laboratory.

Dr. Costinett currently serves as an Associate Editor for the IEEE TRANSAC-TIONS ON INDUSTRIAL APPLICATIONS.

Dragan Maksimovic (M’89–SM’04) received theB.S. and M.S. degrees in electrical engineering fromthe University of Belgrade, Belgrade, Serbia, in 1984and 1986, respectively, and the Ph.D. degree fromthe California Institute of Technology, Pasadena, CA,USA, in 1989.

From 1989 to 1992, he was with the Universityof Belgrade. Since 1992, he has been with the De-partment of Electrical, Computer, and Energy Engi-neering, University of Colorado, Boulder, CO, USA,where he is currently a Professor and Director of the

Colorado Power Electronics Center (CoPEC). His current research interests in-clude mixed-signal integrated circuit design for control of power electronics,digital control techniques, as well as energy efficiency and renewable energyapplications of power electronics. He has co-authored over 250 publicationsand the textbook “Fundamentals of Power Electronics” (New York, NY, USA:Springer). He currently serves as an Associate Editor for the IEEE TRANSAC-TIONS ON POWER ELECTRONICS and as an Editor for the IEEE JOURNAL OF

EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS.Dr. Maksimovic has received the 1997 NSF CAREER Award, the IEEE PELS

Transactions Prize Paper Award in 1997, the IEEE PELS Prize Letter Awardsin 2009 and 2010, the University of Colorado Inventor of the Year Award in2006, the IEEE PELS Modeling and Control Technical Achievement Award for2012, the Holland Excellence in Teaching Awards in 2004 and 2011, the CharlesHutchinson Memorial Teaching Award for 2012, and the 2013 Boulder FacultyAssembly Excellence in Teaching Award.

Regan Zane (SM’07) received the Ph.D. degree inelectrical engineering from the University of Col-orado, Boulder, CO, USA, in 1999.

He is currently a USTAR Professor in the Depart-ment of Electrical and Computer Engineering, UtahState University, Logan, UT, USA. Prior to joiningUSU, he was a Faculty Member at the University ofColorado-Boulder, Colorado Power Electronics Cen-ter, CoPEC, from 2001 to 2012, and a Research Engi-neer at GE Global Research Center, Niskayuna, NY,USA, from 1999 to 2001. He has recent and ongoing

projects in bidirectional converters for dc and ac microgrids, high step-downpower converters for dc distribution systems such as high-efficiency data cen-ters, improved battery management systems for electric vehicles, LED driversfor lighting systems, and low-power energy harvesting for wireless sensors. Hecurrently serves as an Associate Editor for the IEEE TRANSACTIONS ON POWER

ELECTRONICS, LETTERS, and as the Publicity Chair for the IEEE Power Elec-tronics Society.

Dr. Zane received the NSF Career Award in 2004 for his work in energyefficient lighting systems, the 2005 IEEE Microwave Best Paper Prize for hiswork on recycling microwave energy, the 2007 and 2009 IEEE Power Elec-tronics Society Transactions Prize Letter Awards for his work on modeling ofdigital control of power converters, and the 2008 IEEE Power Electronics So-ciety Richard M. Bass Outstanding Young Power Electronics Engineer Award.He received the 2006 Inventor of the Year, 2006 Provost Faculty Achievement,2008 John and Mercedes Peebles Innovation in Teaching, and the 2011 HollandTeaching Awards from the University of Colorado.


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