IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 31, NO. 8, AUGUST 2016 5797

Galvanic Isolation for High-Frequency ApplicationsUsing an Integrated Dielectric Structure

Adrian Zsombor Amanci, Member, IEEE, Harry E. Ruda, and Francis P. Dawson, Fellow, IEEE

Abstract—This paper presents a new design for an integrated,multilayer dielectric ceramic device that is suitable for isolated highfrequency (>100 kHz) power transfer. The multilayer capacitiveisolation device (MLCID) is a four terminal multilayer ceramicstructure consisting of barium strontium titanate and alumina lay-ers. Some key advantages of the MLCID are a reduction in thelosses achieved in comparison with conventional decoupling tech-niques and the ease of manufacturing due to the planar design. Thepaper focuses on the MLCID design details, its characterization,and its performance.

Index Terms—Capacitance measurement, ceramics,dielectric devices, dielectric materials, power transformers,power transmission.

I. INTRODUCTION

Increasing the operating frequency of power converters leadsto a reduction in the converter footprint and mass [1]. However,switching losses in conventional hard-switched power suppliesincrease with switching frequency, leading to an increased tem-perature difference between the device and the ambient environ-ment. A reduction in the temperature rise without increasing theheat sink surface area can be realized by reducing the switchinglosses [2].

Soft switched converters are employed in the 100 kHz–10 MHz range to reduce semiconductor switching losses [3].The variety of soft-switched converters available is quite ex-tensive; however, for the purposes of this paper, the discus-sion focuses on load commutated soft-switched converters. Thestructure of the load-commutated soft switching converter canbe divided into two main blocks: the switching network, com-prised of semiconductor devices, and the resonant tank. Thechoice of switching network and resonant tank is applicationdependant.

In many cases, converters require galvanic isolation betweenthe input source and the load, as well as source-load matching.Galvanic isolation can be achieved using magnetic coupling,piezoelectric coupling, and dielectric coupling. Load sourcematching is only possible using magnetic and piezoelectriccoupling. Details regarding each coupling method is describednext.

Manuscript received June 22, 2015; revised August 26, 2015; acceptedOctober 15, 2015. Date of publication October 29, 2015; date of currentversion March 2, 2016. Recommended for publication by Associate EditorM. A. E. Andersen.

The authors are with the 10 Kings College Road, Toronto, Ontario M5S 3G4,Canada (e-mail: zsa.amanci@mail.utoronto.ca; Canada harry.ruda@utoronto.ca; dawson@ece.utoronto.ca).

Digital Object Identifier 10.1109/TPEL.2015.2496354

A. Magnetic Coupling Principle

Magnetic coupling is the most common method used for gal-vanic isolation, and it is based on the classical magnetic trans-former. Magnetic transformers operate based on Faraday’s Lawof magnetic induction, which is a two-step process. Time vary-ing current injected in a primary winding creates a time varyingmagnetic field, which is coupled via a magnetic medium to asecondary winding and induces a time varying voltage acrossthe output of the secondary winding. Good magnetic couplingis usually achieved by wrapping windings around a materialwith a high relative permeability. Iron-based materials are typ-ically used at lower operating frequencies whereas ferrites areused at very high operating frequencies. Source-load matchingis achieved by selecting an appropriate turns ratio between theprimary and secondary winding.

Unfortunately, within a circuit environment, it is necessaryto ensure that the transformer does not saturate. Typically, thecircuit includes dc blocking capacitors in the primary and/orsecondary circuit, or the current in the windings is controlled toprevent an uncontrolled dc current from flowing. Transformersize scales inversely with operating frequency. However, a re-duction in the transformer footprint beyond a certain size isimpossible because the winding losses (skin and proximity ef-fects) and core losses (eddy currents and hysteresis) increasewith operating frequency while the ability to extract heat de-creases with decreasing exterior surface area [4], [5]. Typically,at frequencies around and above 1 MHz, for a given voltageand power rating, the transformer dimensions can no longerdecrease due to the thermal constraints [6].

Lastly, at higher operating frequencies, the effects of inter-winding parasitic capacitance begin to dominate and the op-erational characteristics of the transformer change—one canno longer speak about load matching or an equivalent turnsratio as design goals in the conventional sense. Furthermore,the interwinding parasitic capacitance of magnetic transform-ers becomes a design issue because it provides an unwantedparasitic coupling path between the primary and secondaryside at high operating frequencies, increasing common modenoise and necessitating expensive shields and common modefilters [7].

Different transformer design topologies, such as integratedon-chip magnetics [8] or flat-core high-frequency transformers[9], and different ferromagnetic materials [10] have been de-veloped to reduce magnetic transformer losses and the devicefootprint. However, the issue of magnetic transformer perfor-mance at high frequencies still remains a limitation which trans-lates into reduced efficiencies (when compared to low-frequencytransformers) and more costly magnetic devices.

0885-8993 © 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See http://www.ieee.org/publications standards/publications/rights/index.html for more information.

5798 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 31, NO. 8, AUGUST 2016

Fig. 1. Two individual capacitors providing dielectric isolation between a loadand a source.

B. Piezoelectric Coupling Principle

Piezoelectric transformers (PTs) can be used to provide gal-vanic isolation and load-source matching [11]. PTs are elec-tromechanical devices that operate based on a two-step energyconversion process: converting electrical to mechanical energyusing the piezoelectric effect on the primary side, and convertingthe mechanical energy back to electrical energy on the secondaryside using the inverse piezoelectric effect.

The effective turns ratio of PTs can be adjusted throughchanges in geometry (cross-sectional area, width, and lengthof each region) and construction (length and number of layers)to allow designers to achieve load-source matching at a speci-fied operating frequency. PTs also offer several advantages overmagnetic transformers such as high voltage isolation betweenthe primary and secondary sides, as well as no electromag-netic noise. The disadvantages presented by PTs are their loaddependent input–output transfer function because of their reso-nant type of operation, their limited power transfer because ofthe internal heat generated by the mechanical hysteresis asso-ciated with acoustic waves in solid-state materials, as well astheir lower efficiency when compared to magnetic transformers(90% to 98% max) [12], [13].

C. Dielectric Coupling Principle

Galvanic isolation between a source and a load using thedielectric coupling principle is conventionally achieved by con-necting two capacitors in series with the active and return currentpath, as shown in Fig. 1. The advantages of using dielectric cou-pling over magnetic coupling are reduction in cost and reductionin losses at high frequencies of operation [14]. Due to these ad-vantages, dielectric coupled systems have been developed andtested for power and data transfer in integrated circuits [15], forgalvanic isolation between source and load [16], for biosignalinstrumentation isolation [17], and for isolated light-emittingdiode drivers [18].

The main disadvantages of using individual capacitors toachieve isolation are the inability to design the system for load-source matching, the need for two discrete individual capacitorsand the breakdown voltage strength each capacitor can provide.Moreover, employing two discrete capacitors introduces two ad-ditional concerns: one of footprint and unwanted parasitics, andone of capacitance mismatching. The mismatch in capacitancevalues of discrete capacitors (typical tolerances of 10–20% fornF range capacitors) will result in an unbalanced circuit whichcreates common-mode currents and electromagnetic interfer-ence. Hence, common-mode filters and/or shielding need to

be added so that the electromagnetic compatibility standardsare complied with [19]. Nevertheless, dielectric isolation wouldbe an attractive option in some instances, if the disadvantagescan be addressed.

The objective of this paper is to propose a new four-port inte-grated dielectric isolation device denoted as a multilayer capaci-tive isolation device (MLCID), that is suited for high-frequency,low to medium power level applications (100’s of kHz to lowMHz and 10’s–100’s of Watts). The MLCID provides the fol-lowing improvements over the two-individual capacitor dielec-tric isolation approach: a reduction in the capacitance mismatchfor the active and return path, a smaller footprint compared to anequivalent design incorporating discrete capacitors, a reductionin the magnitude of unwanted parasitics by integrating the iso-lation network into a single device, and a higher efficiency. Theadvantages offered by the proposed device over the other isola-tion methods (magnetic, piezoelectric) are lower manufacturingcosts due to the planar design and low material costs, no skinand proximity effects design issues, no dc saturation, and higherefficiency in the low MHz frequency range. The disadvantagesof the MLCID is that it cannot provide load-source matchingand requires separate optimization for different applications ordifferent operating parameters, such as frequency range, powerrating, and footprint. The load-source matching deficiency canbe corrected using an additional passive component as discussedin a separate paper [20].

This paper focuses on the modeling, manufacturing, and test-ing of a stand-alone MLCID unit. The contents of the paperare organized as follows: Section II presents the principles ofoperation of the MLCID along with an equivalent circuit model,Section III presents the manufacturing details for the MLCID,Section IV provides the experimental results, and Section Vpresents the conclusions.

II. OPERATING PRINCIPLES

A cross-section of the structural unit of the integrated dielec-tric device is presented in Fig. 2(a). The purpose of the spacersshown in Fig. 2(a) is to allow for a different percentage overlapbetween the input and output electrode plates. The basic designmakes use of a set of electrode plates and two dielectric mate-rials with different relative permittivity values. This device isessentially a four-port passive device.

The behavior of a four-port passive device can be specifiedby the following four parameters: the input–output voltages andinput–output currents. The relationship between the voltagesand currents and the electric and displacement fields can bespecified with the assistance of (1)–(4), assuming no fringingfields, perfect conducting electrodes, and isotropic dielectrics.�Dij and �Eij shown in Fig. 2(b) represent the displacement andelectric fields between electrodes i and j, respectively

Vin = −∫ 2

1

�E12d�l −∫ 3

2

�E23d�l (1)

Vout = −∫ 3

2

�E23d�l −∫ 4

3

�E34d�l (2)

AMANCI et al.: GALVANIC ISOLATION FOR HIGH-FREQUENCY APPLICATIONS USING AN INTEGRATED DIELECTRIC STRUCTURE 5799

Fig. 2. (a) Construction of a primitive structural unit of the MLCID and (b)Relevant voltages, currents and electric fields for a primitive MLCID structuralunit.

Iout =∫∫

S

∂ �D12

∂td�S (3)

Iin =∫∫

S

∂ �D12

∂td�S +

∫∫S

∂ �D23

∂td�S +

∫∫S

∂ �D13

∂td�S.

(4)

The relative permittivity ratio between the two dielectric ma-terials shown in Fig. 2(a) has to be large (ε(1)

r /ε(2)r ≥ 100) in

order to provide good power coupling between the input andoutput terminals. Fig. 3(a) and (b) shows the simulation resultsfor the electric and displacement field, obtained with the finite-element software program COMSOL 4.0. The device modeledhad two different dielectric layers with relative dielectric per-mittivities of ε

(1)r = 1300 and ε

(2)r = 9, respectively.

The electric field profile shown in Fig. 3(a) is highest inthe region of low permittivity where the conditions | �E12 | �| �E23 | and | �E34 | � | �E23 | are satisfied. These two relationships,together with (1)–(2) ensure that

Vin ≈ −∫ 3

2

�E23d�l ≈ Vout. (5)

The �D field is concentrated in the high-permittivity re-gions as seen in Fig. 3(b). The conditions | �D13 | � | �D12 | and| �D23 | � | �D12 | are satisfied for a high relative permittivity ratio.A consequence of these two inequalities is that most of the cur-rent flows between the top two and bottom two plates. Togetherwith (3) and (4), it can be concluded that

Iin =∫∫

S

∂ �D12

∂td�S ≈ Iout. (6)

Fig. 3. COMSOL simulation for the distribution of (a) Electric field and (b)Displacement field for a primitive MLCID structural unit.

Since Vin ≈ Vout and Iin ≈ Iout (5),(6), the MLCID four-layerprimitive unit behaves analogously to a magnetic-based isolationtransformer with an equivalent turns ratio of unity.

Fig. 3(a) and (b) also highlights the fringing fields that need tobe taken into account when designing such a device. The largestfringing electric fields appear at the edge of the electrode plates2 and 3, and are approximately twice as large as the electric fieldmagnitude at the center of the two electrodes. The displacementfield magnitude is largest at the edge of the electrode platesand within the high relative permittivity dielectric material. Themagnitude of the fringing displacement fields is approximately2.5 times as large as the fields developed at the center of theplates.

The fringing fields developed at the edge of the plates andat the interface between the different dielectrics are confinedto small volumes when compared to the overall dimensionsof the four-layer primitive unit. It can thus be concluded thatfringing fields will not have a significant effect on the electrical

5800 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 31, NO. 8, AUGUST 2016

Fig. 4. Circuit network for one and two stack configurations.

behavior of the MLCID, specifically in terms of efficiency, ortransfer functions (voltage ratio, current ratio, impedance) of thefour-port passive network. However, the electric fringing fieldswill place a bound on the maximum allowable input and outputvoltage (electric field breakdown).

An experimental MLCID device was created by “stacking”five primitive structural units, as shown in Fig. 2(a), on top ofeach other. For illustrative purposes, the circuit representation(ignoring fringing fields) of the MLCID for a one stack and atwo stack configuration is shown in Fig. 4. Assuming a refer-ence ground terminal, the input–output relationship between theterminal voltages and currents for an n-stack MLCID is givenby the following equation:

Mn

[V1 , V2 , V3

]T =[I1 , I2 , I3

]T(7)

where Mn is the parameter matrix describing the behavior ofthe system. The parameter matrix for a device consisting of “n”stacks is presented in (8), where Zij represents the impedanceseen between terminals i and j for the single stack configuration.Nonidealities are introduced into the circuit model by modify-ing the Zij impedances to include parasitic resistive (ESR) andparasitic inductive terms (ESL). The resistive terms are usedto model the dielectric loss appearing in the dielectric layersand the conduction losses in the lead wires and the electrodes.Parasitic inductors are used to model the loops of current cre-ated around and within the device. Simulations of the systemperformed with parasitic inductance terms (the value of the par-asitic inductance was obtained based on the area of the currentloops within the device) reveal that inductance parasitics do notplay a significant role in the operation of the device. This will

be confirmed in the results and discussion section of the papersee (8) as shown at the bottom of the page.

III. EXPERIMENTAL CHARACTERIZATION

Two MLCIDs comprised of five multilayer ceramic stackswere manufactured by TRS Technologies Inc. 150 μm BariumStrontium Titanate (BST) and 500 μm Alumina layers wereused as the two different dielectric layers. The purpose of havingtwo devices was to see the variation of parameter values betweenone batch and the next and the impact of these variations ondevice performance. The individual BST layers had a measuredrelative permittivity of approximately 1300 and a loss tangentof 0.68% at 25◦C, with a 15% permittivity variation from 0–70◦C. The individual alumina layers had εr = 9, a loss tangentof 0.15% and negligible permittivity temperature variation. Thedielectric layers were sintered individually and bonded togetherwith epoxy resin. Cr/Au (500A/2000A) layers were used for theelectrode plates. Please refer to Table I for a summary of theMLCID parameters.

A ceramic multilayer implementation was chosen over othertypes of capacitor technologies such as electrolytic, alumina, orthin-foil polymer implementations for the following two rea-sons: availability of a wide range of relative permittivity valuesfor ceramics, and ease of integration into a multilayer structurewhich leads to an improvement in the tolerances of the capaci-tance values. BST was chosen as the high-permittivity materialbecause it is one of the least expensive type 2 ceramic materi-als, because it has a high electric field breakdown strength andbecause it has a low loss tangent [21].

For the current MLCID design, the maximum dc and ac volt-age (before breakdown occurs) are different. The maximum acelectric field is based on the dielectric breakdown strength ofthe alumina layer due to the fact that the voltage drop will bemuch larger across the alumina layer than the BST layer. Thebreakdown field for alumina layers is approximately 25 kV/mm.Since the dielectric thickness of the alumina layers is 500 μm,the breakdown voltage across the alumina layer will be equal toapproximately 12.5 kV.

When applying a dc voltage to the MLCID, the voltagedrop will appear mostly across the BST layers. The breakdownstrength of the BST layers is dependent on the sintering temper-ature. Reference [21] reports that the lowest breakdown strengthof BST is 20 kV/mm, which is used to predict the approximatebreakdown voltage. Thus, given a BST thickness of 150 μm,the breakdown voltage is equal to approximately 3 kV. Ac-counting for fringing field effects (using the field strength factorof 2.5 obtained from the COMSOL simulations) results in a dc

Mn =

⎡⎢⎢⎢⎢⎣

(2n − 1)Z−11g + nZ−1

12 + (n − 1)Z−12g −nZ−1

12 −(n − 1)Z−12g

−nZ−112 nZ−1

12 + nZ−12g + (2n − 1)Z−1

23 + Z−1L −(2n − 1)Z−1

23 − Z−1L

−(n − 1)Z−12g −(2n − 1)Z−1

23 − Z−1L (n − 1)Z−1

2g + nZ−112 + (2n − 1)Z−1

23 + Z−1L

⎤⎥⎥⎥⎥⎦(8)

AMANCI et al.: GALVANIC ISOLATION FOR HIGH-FREQUENCY APPLICATIONS USING AN INTEGRATED DIELECTRIC STRUCTURE 5801

Fig. 5. Two identical manufactured MLCID devices, with five stacks (20dielectric layers).

voltage breakdown strength that is no lower than 1.2 kV. Thevoltage breakdown rating (Vbreak) of the MLCID is set to 1.2 kVsince the dc voltage breakdown across the BST layers is muchlower than the 12.5 kV breakdown voltage across the aluminalayer. The voltage breakdown strength can be customized forfuture MLCID designs by varying the thickness of the dielectriclayers.

The two constructed devices with identical specifications arepresented in Fig. 5; one terminal of the device has two connect-ing red leads, while the other terminal has two connecting blackleads. The rated current is relatively low for the constructed de-vices (2 A) due to the thin connections between the plates andthe leads (as can be seen in Fig. 5); higher current ratings canbe achieved with better lead connections to the electrodes.

The MLCID can be mass-produced at a low cost due to theplanar design of the structure, and the inexpensive dielectric ma-terials. Since multilayer ceramic devices, such as capacitors andplanar microwave components, are already mass-produced, asimilar manufacturing procedure could be used for the MLCID.The main issue with mass-production of the MLCID is the use oftwo different dielectric materials. Since both ceramic materialsneed to be sintered, cofiring of the two ceramics will be requiredfor mass production. Cofiring could lead to serious manufactur-ing issues if the annealing temperatures and thermal expansioncoefficients of the two ceramics are significantly different.

The thermal expansion coefficient is a measure of how mucha material contracts or expands as a function of temperature. Ifthe two materials have significantly different thermal expansioncoefficients (i.e., an order of magnitude), then cofiring couldlead to large mechanical stresses and/or cracking. The thermalexpansion coefficients for alumina and BST at room tempera-ture are 7.2·10−6/◦C and 7.4·10−6/◦C, respectively [22]. Theannealing temperature for both materials has to be relativelyclose, otherwise the two materials cannot be cofired. This isnot an issue for the BTS/Alumina pair, since their annealingtemperatures are in the 600–800◦C range [23], [24].

IV. RESULTS AND DISCUSSION

The voltage transfer function obtained with the 4395A Net-work/Spectrum/Impedance Analyzer is in agreement with the

Fig. 6. Input–output voltage transfer function of MLCID.

TABLE IMLCID PARAMETERS

Footprint (mm) 10×10×6.5 Lead radius 2 mm

Electr. (Cr/Au) 50/200 nm # of plates 20tan δ (Alum) 0.15% Alum - ε low 9tan δ (BST) 0.68% BST - εhigh 1300Thickness (BST) 150 μm Rated voltage 300 VThickness (Alum) 500 μm Rated current 2 AΔεhigh0–70◦C 15% Vbreak 1.2 kV

TABLE IIMLCID MEASUREMENTS

Ports C ESR tanδ

1–2 161.7 pF 90 Ω 0.09%1–3 47.75 nF 3.45 Ω 1.03%1–4 163.0 pF 75 Ω 0.08%2–3 162.8 pF 80 Ω 0.08%2–4 47.80 nF 3.4 Ω 1.02%3–4 162.6 pF 80 Ω 0.08%

simulation results for the frequency range of interest (1 kHz–10 MHz) as can be seen in Fig. 6.

The roll-off in phase and magnitude observed in Fig. 6 forfrequencies larger than 10 MHz is caused by transmission lineeffects on the coaxial cables used to connect the MLCID tothe network analyzer, and by the MLCID leads. The transmis-sion line effects are identified in Fig. 6 by the roll-off in phaseobserved in the MHz region. These results confirm that the be-havior of the device can be accurately described by the circuitmodel presented in Section II below frequencies at which trans-mission line effects predominate.

The impedance values between all two-port combinationsextracted with the help of a 4275A LCR meter are within 1% ofthe simulation results, and the two constructed devices yieldednear identical impedance measurements. The capacitance valuesand resistive loss measured between every two-port combinationis presented inTable II. The measurements and results presentedwere performed at 10 kHz. The measured capacitance associatedwith the active (47.75 nF) and return (47.80 nF) paths are veryclose in magnitude which suggests that the two paths are veryclose to being balanced.

5802 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 31, NO. 8, AUGUST 2016

Fig. 7. Power ratio transfer function for a frequency and output load sweep.

Fig. 8. Comparison of simulated and experimental efficiency of a MLCIDdevice at 1 MHz for several different loads—simulated results ignore resistancesof leads and connections to plates; 10 mW–5 W range.

The circuit model shown in Fig. 4 is used to compute theefficiency of the MLCID devices for a range of input signalfrequencies and output resistances. The simulated efficiency re-sults are presented in Fig. 7, as a function of both frequencyand output load. At 1 MHz, the efficiency is above 99% for loadresistances in the 10 Ω–10 kΩ range. The efficiency drops forlow or high output loads, similar to the behavior of magnetictransformers or other transformerless isolation devices such ascoupling capacitors. The efficiency results presented in Fig. 7have been experimentally validated at 1 MHz for several differ-ent output loads, as presented in Fig. 8.

As can be seen with reference to Fig. 8, the efficiency obtainedfrom the experimental results is slightly lower than the com-puted efficiency values. This small discrepancy appears mainlybecause of the loss associated with the connection between theleads and the stack electrodes. The ac resistance of an individuallead was measured to be approximately 20 mΩ at 1 MHz, whichexplains why there is a larger difference between the simulatedand experimental efficiency for larger output loads (lower resis-tance values—see Fig. 8). Note that this additional conductionloss introduced by the leads can be significantly reduced if theMLCID structure is surface mounted to a copper trace.

Fig. 9. Input voltage of 1 MHz with 5 V DC offset.

Fig. 10. Resonant converter diagram.

TABLE IIIRESONANT CONVERTER COMPONENTS

Comp. Type Manuf. Part No.

MOSFET N-Channel IRF530NPBFHalf Gate Driver LM5100BMAController Altera DE2 Dev. BoardPower Inductor 2-CDMC6D28NP-R20MC

Fig. 9 displays the dc blocking capabilities of the MLCID. Forthis test, a 33220A function generator was connected to the ML-CID input leads, and a 100 Ω load was connected to the MLCIDoutput leads. The input and output waveforms of the MLCID at1 MHz are shown in Fig. 9; note that the input has a dc bias of5 V which does not show up at the output.

The MLCIDs were also tested using a full-bridge resonantconverter implementation shown in Fig. 10. The two legs ofthe full bridge were controlled with phase-shifted gating signalsgenerated at 1 MHz with an Altera DE2 board. The MLCIDdevice together with a 200 nH surface mount inductance repre-sent a series L–C resonant tank for the converter. The purposeof the MLCID in this circuit configuration is to isolate the inputand output terminals of the device and provide the capacitiveelement required for the series L–C resonant tank. Table IIIshows the relevant components used for building the L–C seriesresonant converter.

Fig. 11(a) shows the MOSFET gate to source voltages, whileFig. 11(b) and (c) shows the sinusoidal output voltage waveformfrom the resonant converter for an output load of (b) 50 Ω and,

AMANCI et al.: GALVANIC ISOLATION FOR HIGH-FREQUENCY APPLICATIONS USING AN INTEGRATED DIELECTRIC STRUCTURE 5803

Fig. 11. (a) MOSFET gate voltages, (b) Resonant converter 50 Ω load outputand (c) Resonant converter 10 Ω load output.

TABLE IVCOMMERCIAL X1 CAPACITORS

Capacitor Vol.(mm3 ) C Tol(% ) tanδ

KHB103KP87 1089 10 nF ±10 ≤ 2.5%W1X223S 942 22 nF ±20 ≤ 2.5%PMR210 4800 100 nF ±20 15.6%AC103M140 883 10 nF ±20 ≤ 5.0%440LD55-R 2125 10 nF ±20 ≤ 2%

(c) 10 Ω, respectively. The results in Fig. 11 highlight the ML-CID operation as part of a resonant converter structure at 1 MHzswitching frequency, for different output loads.

V. MLCID PERFORMANCE COMPARISON

The MLCID provides improved efficiency (97–99%) whencompared to high-frequency PTs (90–98% efficiency at 95 kHz[25]) or high-frequency magnetic transformers (95.5% peak ef-ficiency at 1 MHz operation [26], or 95% peak efficiency at 2.6MHz [27]). However, the comparison is not entirely “fair” fortwo reasons. First, the quoted efficiencies are peak efficiencies,the light load efficiency for both piezoelectric and magnetichigh-frequency transformers drops significantly, which is notthe case for the MLCID. Second, the MLCID requires an addi-tional component to provide load-source matching [20], and theefficiency and footprint of this component needs to be taken intoconsideration when performing comparisons. A better compar-ison for assessing the MLCID performance is to compare theMLCID with other dielectric isolation components.

Table IV presents the footprint, capacitance, tolerance, andloss tangent of several X1 capacitors that have been designedfor line-to-line isolation applications. These capacitors are ableto operate at a rated voltage of 250 VAC and withstand voltagesas high as 1500 VAC and impulse voltages in the 2500–4000 Vrange. The capacitors shown in Table IV are close in value to thecapacitances of the MLCID associated with the active and return

current path (nF range), and can thus be directly compared interms of 1) efficiency, 2) tolerance, and 3) footprint.

1) Since two individual capacitors are required to achievedielectric isolation, the decoupling network would have dou-ble the volume shown in Table IV (disregarding the separationdistance between the two capacitors which would add to thetotal footprint). The MLCID volume (≈ 650mm3) is alreadyless than any one individual capacitor presented in Table IV,which highlights the lower MLCID footprint.

2) The tolerance level of individual capacitors can be as lowas ±1–5%, but this is usually the case for capacitors in the pFrange. For X1 capacitors in the nF range, the standard tolerancesfor commercial devices are ±10% and ±20%. This suggeststhat there might be a maximum difference in capacitance of20–40% if two individual capacitors are used for decoupling.On the other hand, the MLCID impedance measurements showthat the relative capacitance difference between the active andreturn path is 0.2–0.3%. This highlights the fact that using theMLCID instead of individual isolation capacitors leads to amore balanced circuit. Note that this relative capacitance differ-ence could go up if the alumina and BST layers are cofired.

3) The last column of Table IV presents the loss tangentfor each listed capacitor. Most reported tests were performed at1 kHz with a 1 V RMS input voltage. With reference to Table IV,the MLCID’s loss tangent in comparison with the loss tangentof the other capacitors is lower. Hence, the efficiency of theMLCID is expected to be better in comparison to the overallefficiency of individual discrete coupling capacitors.

VI. CONCLUSION

The MLCID presented in this paper is a suitable alternativeto the magnetic transformer for high-frequency applications be-cause of the good power coupling between the input and outputports (97%–99% range). A higher efficiency is possible due tothe absence of magnetic core losses and reduced copper losses.COMSOL 4.0, a commercial finite-element software package,was used to investigate the MLCID electric and displacementfield distributions, and to perform initial validations of an equiv-alent electric circuit model. The voltage transfer function andequivalent impedance values between different terminal combi-nations obtained using this circuit model were experimentallyvalidated. The reproducibility of the modeling parameters forthe two manufactured devices was also shown to be excellent.Finally, the MLCID was integrated within a series L–C resonantconverter where it provided load-source isolation, and the capac-itive element in the L–C resonant tank. The resonant converterexperimental results have shown that the MLCID can providegood power coupling (97%–99% range) and galvanic isolationwithin a high-frequency resonant power converter structure, fora range of output loads.

The MLCID is able to provide galvanic isolation, but it doesnot provide load-source matching. This limitation can be ad-dressed by designing a special type of passive component, whichis described in a companion paper [20]. The MLCID providesbetter performance over conventional dielectric isolation tech-niques, because of a reduction in the overall size of the isolationnetwork, lower overall losses (see Table IV for loss tangent

5804 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 31, NO. 8, AUGUST 2016

data), and better matching between the impedances associatedwith the active and return path.

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Adrian Zsombor Amanci (S’08–M’14) received theB.A.Sc., M.A.Sc., and Ph.D. degrees in electrical en-gineering in 2007, 2009, and 2014, respectively, fromthe University of Toronto, Toronto, ON, Canada.

During the Ph.D. degree, he has worked on twodifferent industry sponsored research projects underthe supervision of Professor Francis P. Dawson. Hisresearch interests are piezoelectric power generation,the development of monitoring and control devicesfor large scale power systems, and high-frequencypassive power devices.

Harry E. Ruda received the Ph.D. degree from Mas-sachusetts Institute of Technology, Cambridge, MA,USA, in 1982.

He is the Director of the Centre for AdvancedNanotechnology, the Stanley Meek Chair in Nan-otechnology, and the Professor of Applied Scienceand Engineering, University of Toronto, Toronto, ON,Canada. From 1979 to 1982, he worked on optical andtransport properties of II-VI-based infrared detectormaterials.. From 1982 to 1984, he developed one ofthe first theories for electron transport in selectively

doped 2-D electron gas heterostructures while working as an IBM PostdoctoralFellow. From 1984 to 1989, he was a Senior Scientist at 3M Corporation, de-veloping some of the first models for electronic transport and optical propertiesof wide bandgap II-VI semiconductors, while being a key member of the bluelaser team. He has published more than 260 publications in international refer-eed journals (with over 4684 citations), has coauthored four books and has 14patents.

Prof. Ruda is one of the Founders of a Canadian National Centre of Excel-lence in Photonics. He is a Fellow of the Royal Society of Canada, Fellow ofInstitute of Physics, and Fellow of the Institute of Nanotechnology.

Francis P. Dawson (S’86–M’87–F’09) received theB.Sc. degree in physics and the B.ASc., M.A.Sc., andPh.D. degrees in electrical engineering from the Uni-versity of Toronto, Toronto, ON, Canada, in 1978,1982, 1985, and 1988, respectively.

He worked as a Process Control Engineer in thepulp and paper, rubber and textile industries duringthe period 1978–1980. From 1982 to 1984, he actedas a Consultant on various projects. His developmentareas included high-frequency link power supplies,power supplies for specialized applications, and high-

current protection circuits. Since 1988, he has been with the Department ofElectrical and Computer Engineering, University of Toronto, where he is en-gaged in teaching and research. His areas of research interest include staticpower converters and their applications, signal processing in power engineeringapplications, energy storage systems, and device or process modeling. He hasalso participated as a Consultant or Project Leader in several industrial projects.

Dr. Dawson is a Member of the Association of Professional Engineers ofOntario.