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    Full Terms & Conditions of access and use can be found athttp://www.tandfonline.com/action/journalInformation?journalCode=tetn20

    Download by:[1.39.62.56] Date:09 June 2016, At: 09:51

    International Journal of Electronics

    ISSN: 0020-7217 (Print) 1362-3060 (Online) Journal homepage: http://www.tandfonline.com/loi/tetn20

    Development of High Performance SolarPhotovoltaic Inverter with Reduced HarmonicDistortions

    Albert Alexander

    To cite this article:Albert Alexander (2016): Development of High Performance Solar

    Photovoltaic Inverter with Reduced Harmonic Distortions, International Journal of Electronics,DOI: 10.1080/00207217.2016.1196746

    To link to this article: http://dx.doi.org/10.1080/00207217.2016.1196746

    Accepted author version posted online: 08Jun 2016.Published online: 08 Jun 2016.

    Submit your article to this journal

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    Publisher: Taylor & Francis

    Journal:International Journal of Electronics

    DOI: 10.1080/00207217.2016.1196746

    Development of High Performance SolarPhotovoltaic Inverter with Reduced Harmonic

    Distortions

    1Abstract In addition to the focus towards growing demand on electrical energy due to the increase in population,

    industries, consumer loads etc., the need for improving the quality of electrical power also need to be considered. The design

    and development of solar Photo Voltaic (PV) inverter with reduced harmonic distortions is proposed. Unlike the

    conventional solar PV inverters, the proposed inverter provides the advantages of reduced harmonic distortions thereby

    intend towards the improvement in power quality. This inverter comprises of multiple stages which provides the required

    230VRMS, 50Hz inspite of variations in solar PV due to temperature and irradiance. The reduction of harmonics is governed

    by applying proper switching sequences required for the inverter switches. The detailed analysis is carried out by employing

    different switching techniques and observing its performance. With a separate mathematical model for a solar PV

    simulations are performed in MATLAB software. To show the advantage of the system proposed, a 3kWp photovoltaic plant

    coupled with multilevel inverter is demonstrated in hardware. The novelty resides in the design of a single chip controller

    which can provide the switching sequence based on the requirement and application. As per the results obtained, the solar

    fed multi stage inverter improves the quality of power which makes this inverter suitable for both standalone and grid

    connected systems.

    Key words- Harmonics, Multilevel systems, Modulation strategy, Photovoltaic systems, Power Quality.

    I.

    INTRODUCTION

    In the present scenario, development of an individual and society is basically depends on the

    availability of electrical energy. In India, providing electrical power to all the consumers without

    interruption is a major issue. To overcome this, many power plants are installed and proposed in

    meeting the demand. For the construction of a power plant it requires thousands of crores as the

    investment and also consumes more number of years for its debut power generation. Inspite of this, the

    power demand is not met for the growing population.

    In the conventional power generation system, it causes problems in terms of fossil fuel

    1This work was supported in part by the Department of Science and Technology, Government of India under Technology System Development SchemeGrant (Ref. No.DST/TSG/NTS/2009/98).

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    exhaustion and drastic effects in environment. To overcome these problems, renewable energy sources

    are in high demand. It has been estimated by Cecati, Ciancetta, and Siano (2010) that the energy

    generated by non conventional energy sources is estimated to quantify 50% of the total power demand

    in 2050. But quality of power from these sources has to be improved to protect the loads connected in

    the system and also to enable the continuity of supply to the consumers without any disturbances. Power

    quality refers to maintaining near sinusoidal voltage to a bus at rated voltage and frequency. In addition

    to the focus towards growing demand on electrical energy due to the increase in population, industries

    and consumer loads, the need for improving the quality of electrical power also to be considered

    seriously.

    There are major considerations over the deviation of voltage, current and frequency in an

    electrical system when connected to the load and also to the grid. This affects the entire system and

    possesses major problems in connecting the non conventional energy sources towards the common grid.

    It is not only the technical problem, it also exhibits financial problem. In USA, poor quality of power

    results in economic loss of $120 billion/year as estimated by Electric Power Research Institute (EPRI,

    2004). Hence the combination of power quality and power quantity will certainly result in providing

    clean power from green energy sources. The discrimination of POWER QUANTITY or POWER

    QUALITY results in acceptance of both the parameters. In Indian sub continent, power quality is a

    major issue which needs to be addressed in creating a healthy and reliable power grid and utility

    enhancing productivity and Gross Domestic Product (GDP) growth.

    The proposed work enlists both the extremes such that the solar Photo Voltaic (PV) postulated

    towards quantity and the inverter design with switching sequence controller approximated with quality.

    To meet the objective, a power electronic interface with harmonic reduction capability needs to be

    connected between the source and load. Unlike conventional inverters, the Multi Level Inverter (MLI)

    is recommended by Rahim, Mohamed Elias, and Hew (2013) as the high quality outputs obtained from

    the multilevel inverter overcomes the system size and filter requirements. The proposed inverter

    provides the advantage of reduced harmonic distortions which intend towards the improvement in

    power quality. This inverter comprises of multiple stages which provides the required 230VRMS, 50Hz

    inspite of variations in solar PV due to temperature and irradiance. The switching sequence for the MLI

    is controlled by single chip controller which enables the power quality. The input source considered is

    solar PV which intends the power quantity. It is much convenient to both power quality and power

    generation in the same system as mulled by Cavalcanti, Farias, Oliveira, Neves, and Afonsa (2012).

    Pertaining to power quality, harmonics appear as the waveform distortion of the voltage or

    current. The presence of harmonics in inverter output will lead to power supply failure and other system

    components. Hence MLIs when compared to conventional two level inverters can be used in diverseapplications which require the quality of electrical power needs to be improved as claimed by Zambra,

    Rech, and Pinheiro (2010).

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    Alexander and Manigandan (2014) compared the various structures of MLI and found Cascaded

    Multilevel Inverters (CMLI) utilizes minimum number of switching devices in ahead of other types of

    MLIs. In CMLI, each DC link can be fed by an isolated sources hence it does not possess a voltage

    unbalance problem as pointed by Kouro et al. (2010). Due to these merits the CMLI based structure can

    be used as power conversion unit in renewable energy sources like solar PV as considered by Rahim

    and Selvaraj (2010) and fuel cell by Babaei, Alilu, and Laali (2014).

    This paper vindicates the performance improvement in CMLI and also addresses the challenges

    of it. By eliminating harmonics, utilizing suitable control algorithms and adopting new multilevel

    structures the performance can be improved as experimented by Abu-Rub, Holtz, Rodriguez, and

    Baoming (2010). Reducing switching frequency and improving quality of power are the challenges of

    MLIas pointed byGovindaraju and Baskaran (2011). For eliminating harmonics, the step modulation

    proposed by Liu, Hong, and Huang (2009) computes the gating signals but this method cannot be used

    for solar PV applications as this method intend towards equal DC sources. Newton Raphson (NR) based

    iterative methods depend on the guess value and possess certain discrepancy when the inverter levels

    are increased which was analysed by Fei, Du, and Wu (2010). Chiasson, Tolbert, McKenzie, and Du

    (2005) found that resultant theory is much complicated and consumes more time which is capable to

    calculate only three switching angles for asymmetrical DC and six switching angles for symmetrical DC

    sources. For increasing the inverter levels it requires a new expression.

    In this paper, a detailed analysis is carried out by employing different switching techniques and

    observing its performance. MATLAB/Simulink is used to perform the simulation studies.The paper is

    organised as: Section II formulates the problem design considerations and Section III describes the

    various modulation strategies. Section IV describes simulation and its corresponding results. Section V

    illustrates experimental outcome and some final discussions.

    II. PROBLEMFORMULATION

    In CMLI H Bridge each cells are referred as stages. The increase in the number of stages

    increases the number of levels at the inverter output whose shape approximates near sinusoidal

    waveform. It is henceforth considered that the increase in levels intend towards the reduction in Total

    Harmonic Distortion (THD) which is the measure that quantifies how close the waveform is to pure

    sine. Figure 1 shows the power circuit of a solar PV fed seven stage inverter to achieve a fifteen level

    output.

    Figure 1 Solar PV fed fifteen level inverter

    Figure 1 also shows the phase voltage waveform of a cascaded fifteen level inverter with seven

    PV array inputs. The phase voltage is synthesized by the sum of seven inverter outputs given by the

    relation: van = va1+va2+va3+va4+va5+va6+va7. Each inverter level can generate three different voltage

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    outputs, +Vdc, 0 and Vdc by connecting the PV array source to the AC output side by different

    combinations of the four switches in the individual inverter stage. As a case, in the first stage of the

    inverter, turning switches 1 and 4 ON yields the output +Vdcand turning switches 2 and 3 ON yields the

    output Vdc. Turning OFF all the switches provides the output 0. Similarly, the AC output at each level

    can be obtained in the same manner. If Nsis the number of input PV sources, the output phase voltage

    level is m= 2Ns+1. Thus, a fifteen level cascaded inverter needs seven separate DC sources and seven

    full bridges. Controlling the switching angles at different inverter stages can minimize the harmonic

    distortion of the output voltage which in turn improves the power quality.

    In India, the consumer loads operate at the input supply of 230VRMS (Root Mean Square) with

    frequency 50Hz. To achieve this, the design procedure is started from the solar cell modelling. The

    system considered is single phase standalone PV system with battery storage which enables it to operate

    even during weak weather conditions. The proposed system is application specific especially intended

    towards rural areas where there is less concentration of utility grid. Each solar cell of specification

    Voc=0.5V, Isc=7A is chosen based on the data sheet of the commercial solar PV specifications. Solar

    cells of 24 numbers are connected in series/parallel combinations at standard test conditions (1000W/m2

    and 250C) to develop a 12V, 7A which constitutes a single solar module. Solar modules are connected

    appropriately to achieve 48V, 7A solar PV array or panel. The series connection of the module is the

    same as that of cell. This 48V, 7A solar PV serves as the input source for the single inverter stage. In

    the proposed work, seven numbers of such input sources are utilized to power the seven inverter stages,

    thereby a fifteen level output waveform is obtained. The following relations given in Equations (1) and

    (2) hold for the desired design requirement:

    V3367V48Vpeak == (1)

    V59.2372

    336VRMS == (2)

    In order to extend the system for making it suitable for grid connected system, the condition

    given in Equation (3) has to meet as indicated by Rahim, Chaniago, and Selvaraj (2011).

    dc gridV > 2V (3)

    In the proposed design, the total Vdc=336V is greater than the square root of the grid voltage

    (230VRMS) as per the condition given in the Equation (3). As the design made for Standard Test

    Conditions (STC), it produces the fixed DC output from solar panel without any variations. Most of the

    models in various literature deals with the fixed output supply panels. Hence the PV panel model which

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    exhibits the variations occurring due to temperature and irradiance is required to adhere the real time

    specifications. In order to achieve this, a detailed analytical study on temperature and irradiance

    variations is undertaken throughout the year by solar PV observatory for the geographic location where

    the experiment is conducted. The radiation measurements used are beam and diffuse horizontal surface

    radiation gathered with a PV pyranometer. Figures 2 and 3 shows the analysis which depicts the

    irradiation and temperature levels measured for the months of January and November. Based on the

    analysis it is found that the irradiance varies from 0W/m2to nearly 900W/m2.

    The Solectric 9000 model is taken into consideration for modelling which provides 115W of

    nominal maximum power and it has 24 numbers of series connected polycrystalline silicon cells for a

    single module. It consists of two bypass diodes each of which is connected in antiparallel with 12 series

    connected PV cells to protect them against hot spots. For providing a PV array input, 96 series

    connected cells are used for modelling. Figure 4 shows the characteristics of modelled solar PV array

    which serves as the inverter input.

    Figure 2 Solar data for the month of January (Min: 0W/m2, Max: 892W/m2)Figure 3 Solar data for the month of November (Min: 0W/m2, Max: 887W/m2)

    Figure 4 (a) V-I and (b) V-P characteristics of solar PV array

    III.

    MODULATIONSTRATEGIESIn order to improve the modular characteristics and performance of MLIs, unique modulation

    techniques, control and protection features are required. A high number of power electronic devices and

    switching redundancies bring a higher level of complexity compared with the two level inverters. This

    complexity could be used to add additional capabilities to the modulation techniques by reducing the

    switching frequency (fs), minimizing the Common Mode Voltage (CMV) and balancing the DC

    voltages as studied by Malinowski, Gopakumar, Rodriguez, and Prez (2010).

    By using Sinusoidal Pulse Width Modulation (SPWM) techniques, the inverters fundamental

    voltage can be controlled and the harmonics will be attenuated. In this method, a carrier signal at the

    desired frequency is generated and compared with the modulating voltage signal to generate gating

    signals for the switching devices. When the modulating signal is above the carrier, the upper switch is

    ON and when below the carrier, the lower switch is ON. Unlike the single carrier used in the SPWM

    approach for the two level inverters, multiple carriers PWM with various sequence modifications are

    proposed to improve power quality in solar PV fed CMLI. Multiple carrier based PWM has several

    triangle carrier signals which can be modified in phase and/or vertical position in order to reduce the

    output voltage harmonic content. The frequency of the triangular signal establishes the switching

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    frequency of the switches and the frequency of the modulating signal determines the inverter output

    frequency.

    The multiple carrier modulation is classified into vertical and horizontal distribution; in which

    vertical distribution of carriers does not increase the equivalent carrier frequency. This technique is

    further classified into Alternate Phase Opposition Disposition (APOD), Phase Opposition Disposition

    (POD) and Phase Disposition (PD). Mei, Xiao, Shen, Tolbert, and Zheng (2013) found that PD PWM

    has voltage balance capability and better output voltage harmonic profile than phase shift PWM.Cougo,

    Gateau, Meynard, Rafal, and Cousineau (2012) shown POD is better in terms of differential mode of

    phase currents. Figure 5 shows the carrier arrangements for PD, POD and APOD considering a five

    level inverter in normal case with equal distribution of carriers without any modification in frequency or

    amplitude. The novelty of the work is in achieving all these modulations in a single chip with

    movement of carriers above and below the zero reference for solar PV applications.

    Figure 5 Carrier arrangements of (a) PD (b) POD and (c) APOD

    For an m level inverter, these level shifted modulation schemes require (m-1) triangle carriers,

    all having the same frequency and peak to peak amplitude. The (m-1) carriers are vertically disposed

    such that the bands they occupy are contiguous. The frequency modulation index (m f) and amplitude

    modulation index (ma) are given in Equations (4) and (5).

    m

    crf

    f

    f

    m = (4)

    )1m(V

    V2m

    cr

    ma

    = (5)

    where fcr and fmare the frequencies of the carrier and modulating signals respectively. Vcr is the peak

    amplitude of the modulating signal and Vm is the peak amplitude of each carrier signal.The value of ma

    is between 0 to 1, beyond which it is termed as over modulation region which has to be avoided to

    achieve better results.

    IV.

    PROBLEMSTATEMENT

    The paper aims at design and implementation of a solar PV fed cascaded fifteen level inverter

    with various modulation strategies in order to reduce the harmonic distortions. This includes the

    multiple carrier PWM techniques such as APOD, PD and POD along with the SPWM techniques. The

    modifications were made in both carrier and reference arrangements to provide the best suited strategy

    for solar PV applications in spite of variations in the solar PV input. Appropriate modulation technique

    with the choice of various parameters such as modulation index, switching frequency and signal

    arrangement will certainly improve the power quality by reducing the harmonics in the system. The

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    methods considered for each of the multicarrier PWM topologies and analysed from single stage three

    level inverter to seven stage fifteen level inverter are: a) Multiple carrier with sinusoidal reference,

    b) Multiple carrier of variable frequency, c) Multiple carrier of variable amplitude, d) Multiple carrier

    with modified sinusoidal reference, e) Multiple carrier with Trapezoidal Amalgamated Reference

    (TAR), f) Phase Shifted Carrier (PSC) and g) Unipolar and bipolar modulations.

    SIMULATION AND RESULTS

    MATLAB/Simulink software R2010b is used for simulation of all the modulation strategies. The

    modelled solar PV panel with the input 48V, 7A depicts as the input for the separate inverter stages of

    CMLI. For simulations, parameters used are, amplitude modulation index ma=1, switching frequency

    fs=1000Hz as considered by Kouro, Roboelledo, and Rodriguez (2010), inverter output frequency=

    50Hz and frequency modulation index mf=20. Zhang, Jouanne, Dai, Wallace, and Wang (2000) have

    prescribed that the switching frequency of 1 kHz will be much appropriate for PWM inverters to reduce

    the losses which was also analysed by Zhang, Jouanne, Dai, Wallace, and Wang (2000). The load

    considered is RL whose values are R=100and L=10mH. For a fifteen level inverter, 14 carrier signals

    are required to generate the switching pulses in which seven carriers each are placed above the zero

    reference and the remaining seven carriers are positioned below the zero reference. Figure 6 shows the

    multi carrier arrangements for APOD, POD, PD, PSC (each carrier signals are phase shifted by 25.71 0),

    unipolar modulation (with bias at 3.2V) and inverted sine reference with TAR. Figure 7 shows the

    carrier arrangements for APOD in which the modifications are made in frequency and amplitude. The

    similar modifications are also considered for POD and PD whose results are given in Figure 8.

    Figure 6 Multi carrier arrangements for solar PV fed fifteen level inverter

    Figure 7 Modified multi carrier arrangements for solar PV fed fifteen level inverter

    The comparisons given in Figure 8 (a) to (h) illustrates the resultant THD obtained from solarPV fed single stage inverter to seven stage inverter with aid of various approaches such as normal,

    variable amplitude, variable frequency and modified reference. Based on the results it infers that by

    increasing the levels, the harmonic distortions are summarily reduced to a great extent.

    Figure 8 Comparison of THD for various modulation strategies

    A minimum THD is achieved when the inverter output level reaches fifteen. Further increase in

    levels can also be made, but as the design procedures suitable for Indian sub continent is developed for

    the fifteen levels, it gets limited with this level. While comparing the THD for the multiple carrier PWM

    methods, the lesser THD values are obtained at APOD, PD and POD in variable frequency modes and

    PSC in unipolar mode.

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    V. EXPERIMENTALRESULTS

    A 3kWpsolar PV power supply unit is designed and implemented for the seven stage fifteen level

    solar fed CMLI with multiple carrier PWM generation in a single chip. Table 1 shows the rating of the

    individual solar PV module. Solar panels are connected to the loads in any of three divisions: direct,

    standalone and grid connected. For application oriented, the first one is not applicable. In the proposed

    set up, stand alone type is used which can also be extended to grid connected systems.

    Table 2 reveals the specifications of the entire hardware setup. Figure 9 shows the 3kWp solar

    PV plant and Figure 10 shows the complete hardware setup of the proposed CMLI. Here the notation

    INV specifies the individual inverter stage. Gu et al. (2013) postulated the necessary to utilize

    MOSFETs as a switching device.

    The DSP controller is utilized for the generation of switching pulses for the MOSFET switches

    based on POD, APOD and PD schemes. The carrier signals are generated and level shifted above and

    and below the zero reference to produce the desired pulses. A change over switch is included which will

    subsequently make the choice for any of the three schemes.

    Table 1 Solar PV panel specifications Table 2 Specifications of experimental set up

    Figure 9 Solar PV plant of 3kWp with 28 modules

    Figure 10 Experimental setup of the proposed solar fed fifteen level inverter

    These carrier signals are level shifted above and below the zero reference as per the program to

    achieve PD, POD and APOD signals. Figures 11 to 13 show the carrier arrangements generated by the

    controller pertaining to APOD, PD and POD modulation schemes. A DSP based processor for PV

    system with tuning parameters for filter design is given by Zhang, Tang, and Yae (2015). Unlike DSP,

    an analogue based circuit design for switching function generation in boost converters is investigated by

    Cho, Kwak, and Lee (2015). Figure 14 shows output voltage waveform of the proposed solar inverter.

    Figure 11 APOD based carrier arrangement

    Figure 12 POD based carrier arrangement

    Figure 13 PD based carrier arrangementFigure 14 Fifteen level inverter output voltage waveform

    Table 3 shows the harmonic analysis conducted for each modulation strategies using Power

    Quality Analyser (PQA) WT3000 which depicts both voltage and current THD values. WT3000 is a

    high precision analyser which can display 20 parameters along with the THD and the magnitude of

    harmonic orders. Based on the results it is found that inspite of variations in solar PV, by using CMLI

    the required output of 230VRMS, 50Hz is achieved.

    Table 3 Harmonic analysis for APOD, POD and PD

    The experimental setup developed for a 3kWp solar PV inverter comprising 28 panels of each

    115Wp in a standalone mode, the harmonic measurements are undertaken. The different modulations

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    given in Figures 11 to 13 are thus obtained based on the shifting mechanism of carrier waveforms above

    and below the zero reference with an aid of DSP processor. High care should be ensured that the carrier

    shifting remain same for all the stages in both its amplitude and frequency. Deviations if any will results

    in the abnormal waveforms across the inverter output. This is due to the consideration that the

    comparison of carrier and reference signals will not be the same for all the three methodologies which

    can be clearly viewed for the lower modulation index. The detailed information on harmonic analysis

    for the proposed inverter is shown in Table 4.

    Table 4. Detailed information on harmonic analysis

    Voltage regulation is the process of obtaining the required output voltage in closed loop system.

    The actual voltage obtained at the CMLI output in aid of solar PV variations is compared with the

    required 230V. The error thus obtained is utilized as modulating signal for POD and compared with its

    respective carriers. By adopting this technique, the THD is also reduced and adhere to the IEEE

    standard 519-1992.

    Table 5 shows the comparison of results .Table 6 shows the comparison of results obtained

    from other methods in literature with the aid of resultant THD and the number of levels considered.

    Table 5 Comparison between simulation and experimental results

    Table 6 Comparison with the other methods

    The results thus obtained thus indicate that by the appropriate choice of switching schemes will

    eventually improves the power quality by reducing the value of THD. Of the three schemes investigates,

    POD provides the lesser THD when compared to its counterparts APOD and PD. When comparing withother methods listed in various literatures, much of the methods are proposed for lesser number of

    inverter levels and the implementation is not considered for solar PV applications. For the method

    proposed, higher number of levels with reduced harmonic distortion is achieved and a single chip

    controller for all the modulating strategies for level shifting makes the method unique when compared

    to other methods listed in Table 5.

    VI. CONCLUSION

    A solar fed cascaded fifteen level inverter for power quality improvement is developed. The

    multiple carrier PWM techniques are eminently suggested for the reduction of THD in a solar fed

    CMLI. In the multiple carriers, the variations are made in both carrier and reference signals and their

    performance is analysed from three level to fifteen level solar PV fed inverters. Based on the results, it

    is found that POD method provides the least THD when compared to its counterparts. All the methods

    considered for comparison deal with low power systems and uses DC power supply as its input source.

    An experimental investigation is carried out for a 3kWp solar PV system with DSP based controller ingenerating the switching signals to the MLI. As per the results obtained, the solar fed multi stage

    inverter improves the quality of power which makes it inverter suitable for all the systems.

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    ACKNOWLEDGEMENT

    The authors acknowledge and thank the Department of Science and Technology (Government of

    India) for sanctioning the research grant for the project titled, DESIGN AND DEVELOPMENT OF

    MULTILEVEL INVERTERS FOR POWER QUALITY IMPROVEMENT IN RENEWABLE

    ENERGY SOURCES (Ref.No.DST/TSG/NTS/2009/98) under Technology Systems Development

    Scheme for completing this work.

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    Figure 1 Solar PV fed fifteen level inverter

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    Figure 2 Solar data for the month of January (Min: 0W/m2, Max: 892W/m2)

    Figure 3 Solar data for the month of November (Min: 0W/m2, Max: 887W/m2)

    (a) (b)

    Figure 4 (a) V-I and (b) V-P characteristics of solar PV array

    .

    (a) (b) (c)

    Figure 5 Carrier arrangements of (a) PD (b) POD and (c) APOD

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    (a) APOD (b) POD

    (c) PD (d) PSC

    (e) Unipolar with bias (f) TAR

    Figure 6 Multi carrier arrangements for solar PV fed fifteen level inverter

    (a) Variable amplitude (b) Variable frequency

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    (a) Modified reference

    Figure 7 Modified multi carrier arrangements for solar PV fed fifteen level inverter

    (a) APOD: Comparison for voltage THD (b) APOD: Comparison for current THD

    (c) POD: Comparison for voltage THD (d) POD: Comparison for current THD

    (e) PD: Comparison for voltage THD (f) PD: Comparison for current THD

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    (g) PSC: Comparion of voltage and current THD (h) Dual reference and TAR: Comparison

    Figure 8 Comparison of THD for various modulation strategies

    Figure 9 Solar PV plant of 3kWp with 28 modules

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    Figure 11 APOD based carrier arrangement

    Figure 12 POD based carrier arrangement

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    Figure 13 PD based carrier arrangement

    Figure 14 Fifteen level inverter output voltage waveform

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    Table 1 Solar PV panel specifications Table 2 Specifications of experimental set up

    Table 2 Specifications of experimental set up

    Parameter Value

    Model Solectric 9000

    Pmpp 115Wp

    Voc 21.2V

    Isc 7.4A

    Vpm 16.5V

    Ipm 6.95A

    Max system voltage 540V

    Tolerance at peak power 5%

    Number of panels 28

    Total power 3220Wp

    Parameter Rating

    Charge Controllers (CC)

    Make Sukaam

    V-I Rating 48V,10A

    Number of CC 7

    Battery bank

    Make & Model EXIDE 6LMS100L

    Rating 12V, 100Ah

    Number of batteries 28

    Power circuit

    Semiconductor devices MOSFET IRF 840

    Number of devices 28

    Switching sequences APOD, POD, PD

    Control circuit

    Controller DSP - TMS320F2812

    Measuring Instruments

    Power quality analyser Yokogawa WT3000

    Oscilloscope Tektronix

    Logic Analyser 0+ LOGIC CUBE 32128

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    Table 3. Harmonic analysis for APOD, POD and PD

    Method VRMS IRMS P1 S1 Q1 VTHD ITHD PTHD

    APOD 229.05 2.140 439.419 439.429 0.873 8.813 7.740 2.168

    POD 229.45 2.294 439.524 439.534 0.871 7.955 7.851 2.206

    PD 229.95 2.619 495.398 415.391 0.713 9.514 9.526 2.400

    Table 4.Detailed information on harmonic analysis

    Or. U1 [V] hdf[%] I1 [A] hdf [%]

    Tot. 230.611 2.843

    dc --------------- ----------------- ---------------- -----------------

    1 228.488 99.079 1.247 99.092

    2 0.127 0.055 0.136 0.079

    3 27.670 1.999 0.606 1.922

    4 0.207 0.090 0.145 0.084

    5 10.994 0.767 8.153 0.717

    6 0.176 0.076 0.136 0.0797 7.289 0.161 5.422 0.137

    8 0.369 0.160 0.238 0.137

    9 1.433 0.621 1.063 0.615

    10 0.120 0.052 0.087 0.050

    11 3.566 1.546 2.649 1.533

    12 0.410 0.178 0.292 0.169

    13 1.795 0.779 1.316 0.761

    14 0.917 0.398 0.673 0.389

    15 0.536 0.232 0.369 0.213

    16 0.395 0.171 0.294 0.170

    17 0.877 0.380 0.648 0.375

    18 0.176 0.076 0.141 0.081

    19 1.556 0.675 1.152 0.66620 0.360 0.156 0.240 0.139

    Table 5 Comparison between simulation and experimental results

    S.No. ModulationSimulation Experimental

    VTHD (%) ITHD (%) VTHD (%) ITHD (%)

    1. APOD 8.98 7.23 8.813 7.740

    2. POD 7.84 5.63 7.955 7.851

    3. PD 8.04 5.96 9.514 9.526

    Table 6 Comparison with the other methodsAuthors Levels Methodology THD (%) Application to solar PV

    Zhao, He, and Zhao (2010). 5 PD 38.73

    Malinowski, Gopakumar,

    Rodriguez, and Prez (2010)

    5

    5

    7

    PSC

    Bipolar

    Bipolar

    30.2

    29.9

    21.8

    Gupta, Ghosh, and Joshi (2010) 5 Multiband 27.0

    Zambra, Rech, and Pinheiro

    (2010)

    9 PD 8.29

    Proposed 15 POD 7.9

    PLL U1

    Freq 49.667 Hz

    U1 230.611 V

    I1 2.843 A

    P1 639.8497W

    S1 639.8548 VA

    Q1 -0.6372 var

    1 0.99987

    1 D 0.916Uthd1 3.539%

    Ithd1 3.445%

    Pthd1 1.805%