imec’s silicon photonics platform enabling 100gb/s … · imec’ssilicon photonics platform...
TRANSCRIPT
IMEC’S SILICON PHOTONICS PLATFORM ENABLING
100Gb/s OOK OPTICAL LINKS
SEMICON EUROPA MUNICH, NOVEMBER 16TH 2017
PHILIPPE ABSIL
TECHNOLOGY ROADMAP AND TRENDS
2
TRANSITION
ROADMAP (IMEC)
Link distance
Optical Interconnects
replacing Copper at
increasingly Shorter Reach
Datacenter [5m-10km+]
100G-400G-1.6T+
Backplane [0.5-3m]
8-16-32+ x 50G-100G
Board [5-50cm]
200Gbps+/mm
Package [1cm-10cm]
1Tbps+/mm
Interposer/Chip [1mm-2cm]
10Tbps+/mm Copper
Optical
?1Tbps/mm
100Gbps/mm
10Tbps/mm
I/O Density
100Tbps/mm
10Gbps/mm
Package/ChipLogic Core-Core,
Logic-DRAM
[1mm-5cm]
1cm
Link
bandwidthMMF
SMF
BackplaneBoard-to-board
[0.5m-3m]
Source: LightCounting
10G
50G
25G
1 Mbps
1 Gbps
1 Tbps
1 Pbps
10G
40G
100G
400G
800G
200G
1.6T
3.2T
1G
2.5G
Intra-DatacenterRack-to-Rack
[5m-500m+] Inter-Datacenter[10km+]
Source: LightCounting
BoardLogic Package-to-Package
Logic-DRAM array
[5cm-0.5m]
Source: Intel
6.4T
100G
400G
800G
200G
1.6T
3.2T
6.4T
100G
400G
800G
200G
1.6T
3.2T
6.4T
OPTICAL I/O: LANDSCAPE
DATA CENTER TRAFFIC GROWTHZETTABYTE DATA VOLUMES
Cisco Global Cloud Index (2013-2018)
Zettabyte/year since 2013
Average CAGR = 32%, some reporting 50% CAGR
>75% of this data traffic stays inside the datacenter
CLOUD DATA CENTER NETWORKBUILDING-WIDE FIBER NETWORK
TODAY
40G
EMERGING
(2016)
100G
NEAR
FUTURE
(2019E)
400G
FUTURE
(2022E)
1T+
Building-wide rack-to-rack connectivity
Redundancy 100,000s fiber optic
links
Up to 500m reach single-mode
optics
Fiber cost is substantial CAPEX
Re-use fiber plant, upgrade optical
ports
Data center network topology (Facebook)
Chip I/O Bandwidth Requirements in Advanced FinFet CMOS nodes
6
10Tb/s is needed today!
https://devblogs.nvidia.com/parallelforall/inside-volta/
NVIDIA TESLA V100 (Data Center GPU)
Technology 12nm FinFet
Die size 815 mm2
Performance Single-Precision 15 TF/s
Memory (HBM2)
CapacityBandwidth
16900
GBGB/s
Interconnect Bandwidth 300 GB/s
Total I/O Bandwidth 9.6 Tb/s
Power 300 W
BROADCOM Tomahawk II (Ethernet Switch)
Technology 16nm FinFet
Performance # Transceivers 256x25 Gb/s
Interconnect Bandwidth 6.4 Tb/s
INP PHOTONIC INTEGRATIONINTEGRATION OF DIVERSE OPTICAL FUNCTIONS
Source: Infinera
Complete toolbox of active and passive optical
functionality
High performance optical devices and circuits
InP Photonic Integration =
7
Source: Jeppix
OPTICAL TRANSCEIVER MARKET GROWTH
III-V based transceivers
cover 90% of the market
Integrated solutions have
the strongest growth
8
Today’s transceiver market is
10x the SiPh market
SiP Market 25% CAGR
InP Integrated
GaAs Integrated
Reference: LightCounting
OFC2016 Dinner Seminar
INP PHOTONIC INTEGRATION
9
FOR TELECOM AND DATACOM LINKS
InP PICs
Infinera’s Roadmap for InP PIC scaling
InP PICs for...
Telecom
Roadmap for Telecom InP PICs to
multi-Tb/s
Datacom
InP solutions for 100G, 200G
? Scalability beyond 400G?
Chip-to-Chip I/O?
Cost and volume scalability?
Tight integration with advanced
CMOS logic?(Thermal and packaging constraints)
Oclaro’s 4x25G NRZ LISEL Datacom Transmitter
Silicon Photonic Integration
Silicon Photonic Integrated Circuits
Fabrication in CMOS fabs [200mm/300mm wafer size]
Large Si/SiO2 refractive index contrast of ~2 [scalable PIC density]
Advanced Si patterning capability [193(i), nanometer scale accuracy]
(Si)Ge epitaxy [photodetectors/modulators]
Low resistance contacts to Si [high-speed optical devices]
Volume scalability [>1M units/year] & Efficiencies of scale [cost]
Wafer-scale 3-D packaging, assembly and test [TSVs, micro-bumps]
No monolithic integrated optical gain/lasing [need for hybrid or heterogeneous
solution]
BENEFITS AND DRAWBACKS
Silicon Photonics = Leverage existing CMOS infrastructure for
Photonic Integration10
MAJOR SEMI PLAYERS HAVE / WILL HAVE A SIP TECHNOLOGY
Press Announcement
GlobalFoundries presentation at Semicon West 2016, San Francisco
Press Announcement
Integration of Silicon Photonics Into DRAM
Process Samsung technical session at OFC 2013, Anaheim
CMOS node 28nm 20nm 14nm 10nm 7nm 5nm
Max Chip I/O BW 1.6Tb/s 3.2Tb/s 6.4Tb/s 12.8Tb/s 25.6Tb/s 51.2Tb/s
Max Baud Rate 25G 35G 50G 70G? 100G? 140G?
Year of Introduction Interconnect 2016 2018 2020 2022 2024 2026
Datacenter
Network
5-500m+
InP PIC
SiPh PIC
100Gb/s/SMF
InP PIC
SiPh PIC
200Gb/s/SMF
InP PIC
SiPh PIC
400Gb/s/SMF
SiPh PIC
800Gb/s/SMF
SiPh PIC
1.6Tb/s/SMF
SiPh PIC
3.2Tb/s/SMF
Backplane
0.5-3m Cu Cu
Cu/VCSEL
SiPh PIC
64x50G
Cu/VCSEL
SiPh PIC
128x50G
SiPh PIC
128x100G
SiPh PIC
256x100G
Board
5cm-50cmCu Cu Cu
Cu/VCSEL/SiPh
>100Gb/s/mm
SiPh PIC
>200Gb/s/mm
SiPh PIC
>400Gb/s/mm
Interposer/Chip
1mm-5cm Cu Cu Cu CuCu/SiPh PIC
>5Tb/s/mm
SiPh PIC
>10Tb/s/mm
1cm
IMEC’S OPTICAL INTERCONNECT ROADMAPOPTICAL INTERCEPTION POINTS AT SHORT REACH
Si Photonic Integrated Circuits (PICs) for Short-Reach High-Density Optical Interconnects12
TRANSCEIVER PERFORMANCE SCALING
13
OPTICAL TRANSCEIVER SCALING
14
Faster Channels
More Channels• Parallel (Single-Mode) Fiber [PSM]
• Multi-Core Fiber, Spatial Division Multiplexing [SDM]
• Wavelength Division Multiplexing [WDM]
More Bits per Symbol• Amplitude: PAM-X
• Phase and Amplitude: DP-QPSK, QAM-X, ...
25G
50G
100G
4l8l
16l1core
8core
16core
1-bit 1l
2-bit
4-bitPAM-16 (LightWire/Luxtera)
10G
J. Sakaguchi, et al, "19-core fiber transmission of 19x100x172-Gb/s SDM-
WDM-PDM-QPSK signals at 305Tb/s," OFC2012, PDP5C.1.
Focus for very-short reach
interconnects:
Faster and More Channels
MULTIPLE AXES
PSM/PAM4
CWDM
DWDM SDM
Low Loss Edge OR Surface Couplers
Mach-Zehnder, MicroRing OR GeSi
EAM
Ge Detectors
PLATFORM DIVERSITY SUPPORTING ARCHITECTURE
DIFFERENTIATION
WDM Filters (Si OR SiN)
O-Band OR C-Band
IMEC SILICON PHOTONICS - iSiPP
17
IMEC’S 50G SILICON PHOTONICS OPEN PLATFORMFully Integrated 50Gb/s NRZ, WDM Si Photonics Technology
Co-integration of the 50Gb/s building blocks in a single platform based on CMOS090
Supports all dominant Si Photonics transceiver concepts pursued in industry & academia
Available on 200mm [iSiPP200], under development on 300mm [iSiPP300]
Based on 220nm Silicon / 2000nm BoX SOI wafers
56G GeSi Electro-Absorption Modulator
56Gb/s eye diagram
56G Silicon Ring Modulator
56Gb/s eye diagram
8+1-channel DWDM (De-)Multiplexing Filter
Fiber Edge Coupler
Fiber Grating Coupler
50G Ge Photodetector 50Gb/s eye
diagram
56G Silicon Mach-Zehnder Modulator
IMEC’S SILICON PHOTONICS OFFERING
Accessing imec’s 200mm Si Photonics Platform (iSiPP200)
Both MPW (iSiPP50G) and Fully Dedicated Runs
Users design their own devices and circuits
Silicon Validated PDK ISIPP50G v2.2.0 is available (Handbooks, tech files, DRC,
device library)
Supported by various EDA tools
Interested? Get in touch! MPW http://www.europractice-ic.com/, Dedicated: [email protected]
BUILD YOUR OWN PROTOTYPE IN IMEC’S OPEN PLATFORM TECHNOLOGY!New 50G PDK
released in Q4-
2016
GeSi MODULATORS FOR HIGH DENSITY
100Gb/s SINGLE-l DATA LINKS
21
50GHz+ GeSi Electro-Absorption Modulator
Simulated E-field at 0V Simulated E-field at -2V
Reverse bias p-i-n GeSi diode 11kV/cm at ON state 60kV/cm at OFF state
Si
GeSi
n i p
N+ Si
contactP+ Si
contact
Device cross section, perpendicular to light propagation
Doping Profile
FOM = 𝑬𝑹
𝑰𝑳Optical absorption ER, IL
Franz-Keldysh effectAbsorption coefficient increases with applied field (C-band)
Sub-picosecond effect
56Gb/s NRZ Eye
>50GHz E/O Bandwidth
50GHz+ GeSi Photodetector
23
Similar GeSi structure can be used as
photodetector (PD)
Responsivity: 0.85A/W at -1V at 1565nm
O/E 3dB BW > 50GHz
Dark current: 10nA at -2V
56Gb/s, -2V, 1565nm OE S21 response
S2
1 [d
B]
Responsivity
Ultra-Compact 16x 56Gb/s (896Gb/s) GeSi EAM-PD Array
24
16x 56Gb/s
GeSi EAM
array
16x 56Gb/s
GeSi PD array
1x16 MMI splitter tree
1 input,
16 TX output
16 RX input
100𝜇m pitch
0.7mm
3mm
61-channel Pitch-Reducing Optical Fiber
Array (PROFA, Chiral Photonics)
37um100um
100x50um
GeSi EAM and
PD
Diode: 600nm
wide, 40um
long
50um
37-channel grid of fiber
grating couplers, 37um
pitchInput
Packaging
25
Pitch-Reducing Optical Fiber Array (PROFA)
PROFA and Packaging by Chiral Photonics
0.7mm
3.0
mm
GeSi EAM to GeSi PD Loopback Transmission Test
26
16 channel link uniformity analysis at 56Gb/s NRZ
GeSi EAM optical transmission GeSi EAM to GeSi PD Loopback
GeSi EAM driving voltage (peak to peak): 2.5V, 56Gb/s (PRBS31)
Bias GeSi PD: -2.5V
GeSi EAM array Dynamic extinction ratio (ER) in the range of 2.7-3.3dB
GeSi EAM to GeSi PD array SNR in the range of 3.05-3.92
GeSi EAM-PD at 100Gb/s
27
First single-wavelength 100Gb/s NRZ-OOK modulation demo in Silicon Photonics
Collaboration with100Gb/s Eye Diagrams
(III-V discrete PD)
B2B
500m
SM
F
BER below threshold for FEC
2km
DS
MF 100Gb/s Eye Diagram
for GeSi EAM-to-GeSi PD
112Gb/s PAM-4 GeSi EAM TRANSMITTER
28
DAC-less and DSP-free PAM-4 TX at 112 Gb/s using 2 parallel GeSi EAMs
SUMMARY
imec Silicon Photonics (iSiPP) is ideally positioned for dense, short-reach optical
interconnects prototyping
100G NRZ optical modulation and detection rates have been achieved
112Gb/s PAM-4 transmission has been achieved
896Gb/s aggregated bandwidth over 1 fiber attach
SiPh active devices can be directly driven by advanced CMOS
low capacitance and low drive voltages
Low die cost and volume scalability
Outlook
100Gb/s O-Band modulators
Low loss passive devices with reduced thermal dependency
Light source integration
CONFIDENTIAL