Evolution of microprocessor:

The first microprocessor was introduced in the year 1971. It was introduced by Intel and was named Intel 4004. Intel 4004 is a 4 bitmicroprocessor and it was not a powerful microprocessor. It can perform addition and subtraction operation on 4 bits at a time.

However it was Intel’s 8080 was the first microprocessor to make it to Home computers. It was introduced during the year 1974 and it can perform 8 bit operations. Then during the year 1976, Intel introduced 8085 processors which is nothing but an update of 8080 processors.8080 processors are updated by adding two Enable/Disable Instructions, Three added interrupt pins and serial I/O pins.

Intel introduced 8086 pins during the year 1976. The major difference between 8085 and 8086 processor is that 8085 is an 8 bit processor, but 8086 processor is a 16 bit processor.

The greatest advantage of the above processors are that it do not contain Floating point instructions. Here floating point refers to the radix point or decimal point. For example: 123.456 is a floating point representation. Processors such as 8085 and 8086 do not support such representations and instructions.

Intel later introduced 8087 processor which was the first math co-processor and later the 8088 processor which was incorporated into IBM personal computers.

As the years progressed lots of processors from 8088,80286,80386,80486,Pentium II, Pentium III, Pentium IV and now Core2Duo,Dual Core and Quad core processors are the latest in the market.

CMOS stands for COMPLEMENTARY METAL OXIDE SEMICONDUCTOR. It is a technology used in Microprocessors and Microcontrollers for making Integrated circuits.The devices which are made of CMOS have high immunity towards noise and the static power consumption is low.

Single chip microcomputer:

The Single-Chip Cloud Computer (SCC) is a computer processor (CPU) created by Intel Corporation in 2009 that has 48 distinct physical cores that communicate through architecture similar to that of a cloud computer data center.

Putting a CPU, ROM, RAM, and data input/output circuitry into a single IC will make a single-chip microprocessor. ... Single-chip microprocessors are also known as "microcomputer units (MCUs)," because they are made of a single IC.

Modern desktop computers, video game consoles, laptops, tablet PCs, and many types of handheld devices, including mobile phones, pocket calculators, and industrial embedded systems, may all be considered examples of microcomputers according to the definition given above.

Microprocessor: Microprocessor is a simple central processing unit (CPU) on a single chip (remember the word 'Single Chip'). ... Microcomputer: A microcomputer is the association of microprocessor and the peripheral I/O devices, support circuitry and memory (both data and program).

Embedded microprocessor:

An embedded microprocessor is a computer chip used inside several devices and equipments to

provide added functionality. A microprocessor is a digital-electronic component with transistors

integrated on a single semiconductor IC that is small and consumes less power. Due to

flexibility, cost, programmability and adaptability microcontrollers are popular to implement

various types of controllers that we know from the electronics history. The functions of the

microprocessor include fetching, decoding and processing the data.

Embedded microprocessor systems are nothing but computer chips that are integral part of

lighting system, home appliances, industrial equipments, etc. Generally, microprocessors are

used in signal processing, general computing and real-time computing data. As a signal

processor, microprocessors’ uses in digital televisions include decoding of the digital and radio

signals. In real-time systems, microprocessors are embedded in security devices like anti-lock

breaking system; these systems are widely used in automobiles. Its importance includes:

Handling many functions like calculations and word processing at higher speeds Performing operations for the repetitive, continuous, progressive and sequential functions

without human labor Communicating with the internet, telephones and other interfacing devices

Bit-Slice Microprocessor (BSM)

A bit-slice microprocessor (BSM) is a microprocessor  designed as a module with the primary purpose of being able to assemble multiple identical such microprocessors to form a larger processor of some desired word size . Bit-slice microprocessors can be cascaded to

produce any conventional (e.g. 4-bit , 8-bit , 16-bit ) as well as unconventional word sizes (e.g. 10-bit , 12-bit , 18-bit ). A notable advantage of a BSM over discrete logic components is the fact that most connections are internal to the chip with only few connections being external.

A departure from normal microprocessors  is that fact that many bit-slice chips do not have an instruction set architecture . Such bit slicing systems allow designers to create their own architecture and other key characteristics such as I/O pins and address width. This flexibility of course came with overall more expensive system and larger amount of ICs.

bit-slice microprocessors[edit ]

Word size

Microprocessors

Intel National AMD MM

I TI Fairchild

Motorola RCA

2-bit 3000

4-bit IMP-4 Am2900 5700

SBP0400 SN54S/74S481

9400 4700 10800

74S181 74S381

8-bit IMP-8 SN54AS888 SN74AS888 100K EPI

C

16-bit IMP-16 Am2910

0

32-bit

Am29300

SN74ACT8832

Microprogramming:

Microprogramming is a Process of writing microcode for amicroprossor. Microcode is low-level code that defines how a microprocessor should function when it executes

machine-language instructions. Typically, one machine-language instruction translates into several microcode instructions. On some computers, the microcode is stored in ROM and cannot be modified; on some larger computers, it is stored in EPROM and therefore can be replaced with newer versions.

A control unit whose binary control variables are stored in memory is called a micro programmed control unit. Dynamic microprogramming: A more advanced development known as dynamic microprogramming permits a microprogram to be loaded initially from an auxiliary memory such as a magnetic disk.

Microprogramming, on the other hand, is an approach for implementing processor control in which the output signals are stored within a ROM. The two main variations of microprogramming are the horizontal and vertical methods.

The applications of Microprogramming are: In Realization of control unit:Microprogramming is used widely now for implementing the control unit of computers. ... In Microdiagnostics: Microprogramming can be used for detection isolation monitoring and repair of system error

RISC and CISC processor:

The architectural designs of CPU are RISC (Reduced instruction set computing) andCISC (Complex instruction set computing). CISC has the ability to execute addressing modes or multi-step operations within one instruction set. It is the design of the CPU where one instruction performs many low-level operations.

RISC (reduced instruction set computer) is a microprocessor that is designed to perform a smaller number of types of computer instructions so that it can operate at a higher speed (perform more millions of instructions per second, or MIPS).

A complex instruction set computer (CISC) is a computer in which single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes within single instructions.

Comparison Between RISC and CISC. RISC stands for 'Reduced Instruction Set Computer Whereas, CISC stands for Complex Instruction Set Computer. The RISCprocessors have a

smaller set of instructions with few addressing nodes. The CISCprocessors have a larger set of instructions with many addressing nodes.

So we can say our processor 8085 is a RISC and controller 8051 is a CISC. RISC. Reduced instruction set Computer. It is a type of microprocessor that has been designed to carry out few instructions at the same time. As instruction are few it can be executed in a less amount of time.

Scalar and super scalar processors:

scalar processor: A CPU that performs computations on one number or set of data at a time. Most computers have scalarCPUs. A scalar processor is known as a "single instruction stream single data stream" (SISD) CPU.

Scalar processors represent a class of computer processors. A scalar processor processes only one data item at a time, with typical data items being integers or floating point numbers.[1] A scalar processor is classified as a SISD processor (Single Instructions, Single Data) in Flynn's taxonomy.

In contrast, in a vector processor a single instruction operates simultaneously on multiple data items (referred to as "SIMD"). The difference is analogous to the difference between scalar and vector arithmetic.

A superscalar processor, on the other hand, executes more than one instruction during a clock cycle by simultaneously dispatching multiple instructions to redundant functional units on the processor. Each functional unit is not a separate CPU core but an execution resource within a single CPU such as an arithmetic logic unit, a bit shifter, or a multiplier.

A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor.

In Flynn's taxonomy, a single-core superscalar processor is classified as an SISD processor (Single Instruction stream, Single Data stream), though many superscalar processors support short vector operations and so could be classified as SIMD (Single Instruction stream, Multiple Data streams). A multi-core superscalar processor is classified as an MIMD processor (Multiple Instruction streams, Multiple Data streams).

While a superscalar CPU is typically also pipelined, superscalar and pipelining execution are considered different performance enhancement techniques. The former executes multiple instructions in parallel by using multiple execution units, whereas the latter executes multiple instructions in the same execution unit in parallel by dividing the execution unit into different phases.

The superscalar technique is traditionally associated with several identifying characteristics (within a given CPU):

Instructions are issued from a sequential instruction stream The CPU dynamically checks for data dependencies between instructions at run time (versus

software checking at compile time) The CPU can execute multiple instructions per clock cycle

Vector processor:

In computing, a vector processor or array processor is a central processing unit (CPU) that implements an instruction set containing instructions that operate on one-dimensional arrays of data called vectors, compared to scalar processors, whose instructions operate on single data items. Vector processors can greatly improve performance on certain workloads, notably numerical simulation and similar tasks. Vector machines appeared in the early 1970s and dominated supercomputer design through the 1970s into the 1990s, notably the various Cray platforms. The rapid fall in the price-to-performance ratio of conventional microprocessor designs led to the vector supercomputer's demise in the later 1990s.

As of 2015 most commodity CPUs implement architectures that feature instructions for a form of vector processing on multiple (vectorized) data sets. Common examples include Intel x86's MMX, SSE and AVX instructions, AMD's 3DNow! extensions, Sparc's VIS extension, PowerPC's AltiVec and MIPS' MSA. Vector processing techniques also operate in video-game console hardware and in graphics accelerators. In 2000, IBM, Toshiba and Sony collaborated to create the Cell processor.

Other CPU designs include some multiple instructions for vector processing on multiple (vectorised) data sets, typically known as MIMD (Multiple Instruction, Multiple Data) and realized with VLIW (Very Long Instruction Word). The Fujitsu FR-V VLIW/vector processor combines both technologies.

Array processors:

Attached Array Processors. An attached array processor is a processor which is attached to a general purpose computer and its purpose is to enhance and improve the performance of that computer in numerical computational tasks. It achieves high performance by means of parallel processing with multiple functional units.

An array processor may be built as a self-contained unit attached to a main computer via an I/O port or internal bus; alternatively, it may be a distributed array processor where the processing elements are distributed throughout, and closely linked to, a section of the computer's memory.

Array processors are very powerful tools for handling problems with a high degree of parallelism. They do however demand a modified approach to programming. The conversion of conventional (sequential) programs to serve array processors is not a trivial task, and it is sometimes necessary to select different (parallel) algorithms to suit the parallel approach.

Symbolic processors:

Symbolic Processors. It refers to a deprecatory term utilized by non-or sub-typical specialists of Artificial Intelligence. It alludes to any endeavor to make AI, utilizing ordinary programming language. ... Symbolic processors are sometimes called as PROLOG processors, Lisp processors, or symbolic manipulators.

Symbol processing (or symbolic processing) includes computation with symbols. By making complex problems easier to represent. 3600-family processors give the user all the computational power associated with multi-user timesharing computers in a dedicated workstation.Symbol Processing Computers contd.Symbolic Processing" is a pejorative term used by non- or sub-symbolicpractitioners of ArtificialIntelligence. It refers to any attempt to create AI using conventional programming language means or at a high level.

Digital signal processors:

A digital signal processor (DSP) is a specialized microprocessor (or a SIP block), with its architecture optimized for the operational needs of digital signal processing. The goal of DSP is usually to measure, filter or compress continuous real-world analog signals.

The main difference between a DSP and a microprocessor is that a DSPprocessor has features designed to support high-performance, repetitive, numerically intensive tasks. DSP processors are designed specifically to perform large numbers of complex arithmetic calculations and as quickly as possible.

Digital signal processing (DSP) refers to various techniques for improving the accuracy and reliability of digital communications. The theory behind DSP is quite complex. Basically, DSP works by clarifying, or standardizing, the levels or states of a digital signal.

Intel 8086:

Pin description of intel 8086:

8086 was the first 16-bit microprocessor available in 40-pin DIP (Dual Inline Package) chip. Let us now discuss in detail the pin configuration of a 8086 Microprocessor.

8086 Pin Diagram

Here is the pin diagram of 8086 microprocessor −

Power supply and frequency signals

It uses 5V DC supply at VCC pin 40, and uses ground at VSS pin 1 and 20 for its operation.

Clock signal

Clock signal is provided through Pin-19. It provides timing to the processor for operations. Its frequency is different for different versions, i.e. 5MHz, 8MHz and 10MHz.

Address/data bus

AD0-AD15. These are 16 address/data bus. AD0-AD7 carries low order byte data and AD8AD15 carries higher order byte data. During the first clock cycle, it carries 16-bit address and after that it carries 16-bit data.

Address/status bus

A16-A19/S3-S6. These are the 4 address/status buses. During the first clock cycle, it carries 4-bit address and later it carries status signals.

S7/BHE

BHE stands for Bus High Enable. It is available at pin 34 and used to indicate the transfer of data using data bus D8-D15. This signal is low during the first clock cycle, thereafter it is active.

Read($\overline{RD}$)

It is available at pin 32 and is used to read signal for Read operation.

Ready

It is available at pin 32. It is an acknowledgement signal from I/O devices that data is transferred. It is an active high signal. When it is high, it indicates that the device is ready to transfer data. When it is low, it indicates wait state.

RESET

It is available at pin 21 and is used to restart the execution. It causes the processor to immediately terminate its present activity. This signal is active high for the first 4 clock cycles to RESET the microprocessor.

INTR

It is available at pin 18. It is an interrupt request signal, which is sampled during the last clock cycle of each instruction to determine if the processor considered this as an interrupt or not.

NMI

It stands for non-maskable interrupt and is available at pin 17. It is an edge triggered input, which causes an interrupt request to the microprocessor.

$\overline{TEST}$

This signal is like wait state and is available at pin 23. When this signal is high, then the processor has to wait for IDLE state, else the execution continues.

MN/$\overline{MX}$

It stands for Minimum/Maximum and is available at pin 33. It indicates what mode the processor is to operate in; when it is high, it works in the minimum mode and vice-aversa.

INTA

It is an interrupt acknowledgement signal and id available at pin 24. When the microprocessor receives this signal, it acknowledges the interrupt.

ALE

It stands for address enable latch and is available at pin 25. A positive pulse is generated each time the processor begins any operation. This signal indicates the availability of a valid address on the address/data lines.

DEN

It stands for Data Enable and is available at pin 26. It is used to enable Transreceiver 8286. The transreceiver is a device used to separate data from the address/data bus.

DT/R

It stands for Data Transmit/Receive signal and is available at pin 27. It decides the direction of data flow through the transreceiver. When it is high, data is transmitted out and vice-a-versa.

M/IO

This signal is used to distinguish between memory and I/O operations. When it is high, it indicates I/O operation and when it is low indicates the memory operation. It is available at pin 28.

WR

It stands for write signal and is available at pin 29. It is used to write the data into the memory or the output device depending on the status of M/IO signal.

HLDA

It stands for Hold Acknowledgement signal and is available at pin 30. This signal acknowledges the HOLD signal.

HOLD

This signal indicates to the processor that external devices are requesting to access the address/data buses. It is available at pin 31.

QS1 and QS0

These are queue status signals and are available at pin 24 and 25. These signals provide the status of instruction queue. Their conditions are shown in the following table −

QS0 QS1 Status

0 0 No operation

0 1 First byte of opcode from the queue

1 0 Empty the queue

1 1 Subsequent byte from the queue

S0, S1, S2

These are the status signals that provide the status of operation, which is used by the Bus Controller 8288 to generate memory & I/O control signals. These are available at pin 26, 27, and 28. Following is the table showing their status −

S2 S1 S0 Status

0 0 0 Interrupt acknowledgement

0 0 1 I/O Read

0 1 0 I/O Write

0 1 1 Halt

1 0 0 Opcode fetch

1 0 1 Memory read

1 1 0 Memory write

1 1 1 Passive

LOCK

When this signal is active, it indicates to the other processors not to ask the CPU to leave the system bus. It is activated using the LOCK prefix on any instruction and is available at pin 29.

RQ/GT1 and RQ/GT0

These are the Request/Grant signals used by the other processors requesting the CPU to release the system bus. When the signal is received by CPU, then it sends acknowledgment. RQ/GT0 has a higher priority than RQ/GT1.

The 8086 microprocessor supports 8 types of instructions −

Data Transfer Instructions

Arithmetic Instructions

Bit Manipulation Instructions

String Instructions

Program Execution Transfer Instructions (Branch & Loop Instructions)

Processor Control Instructions

Iteration Control Instructions

Interrupt Instructions

Operating modes:

MINIMUM MODE OF 8086. When the Minimum mode operation is selected, the 8086 provides all control signals needed to implement the memory and I/O interface. The minimum mode signal can be divided into the following basic groups : address/data bus, status, control, interrupt and DMA.

There are two operatingmodes of 8086 microprocessor, they are minimum and maximum mode. 8086 micro processor is a 40 pin architecture.

Minimum mode. Maximum mode. In minimum mode there can be only one processor i.e. 8086. In maximum mode there can be multiple processors with 8086, like 8087 and 8089. M N / M X ¯ is 1 to indicate minimum mode. The bit size of a processor is normally defined by it ALU width, which equates to its main working register width. e.g.: 8088 has 8 bit data bus,

and 16 bit ALU so is a 16 bit CPU. 8086 is same as 8088 but has 16 bit data bus, also a 16 bit CPU.

Register organization of 8086

General 16-bit registers. The registers AX, BX, CX, and DX are the general 16-bit registers. ... Segment registers: To complete 1Mbyte memory is divided into 16 logical segments. ... Pointers and index registers. The pointers contain within the particular segments. ... Conditional Flags. ... Control Flags.

The registers inside the 8086 are all 16 bits. They are split up into four categories:General Purpose, Index, Status & Control, and Segment. The four general purpose registers are the AX, BX, CX, and DX registers. AX - accumulator, and preferred for most operations.

The register BX is used as offset storage for forming physical address in case of certain addressing modes. DX register is a general purpose register which may be used as an implicit operand or destination in case of a few instructions. Segment Registers: The 8086 architecture uses the concept of segmented memory.

BIU and EU interrupts:

The Bus Interface unit (BIU):- This. unit handles all transfer of data and addresses on the buses for the EU(execution unit). This unit sends out addresses, fetches instructions from memory, reads data from ports and memory and writes data to ports and memory. Function of Segment Register:- In.

The overall function of the European Union is to create and implement laws and regulations that integrate the member states of the EU. The countries of the EU are supposed to have uniform laws and policies concerning a variety of things (like immigration, labor, weights and measures -- all sorts of things).

The functions performed by the Bus interface unit are:

- The BIU is responsible for the external bus operations.

- It performs fetching, reading, writing for memory as well as I/O of data for peripheral devices.

- The BIU also performs address generation and the population of the instruction queue.

The Execution unit is responsible for the following work:

- The instructions are decoded and executed by it.

- The EU accepts instructions from the instruction queue and from the general purpose registers it takes data.

- It has no relation with the system buses.

Addressing modes of 8086:

The different ways in which a source operand is denoted in an instruction is known as addressing modes. There are 8 different addressing modes in 8086 programming −

Immediate addressing mode

The addressing mode in which the data operand is a part of the instruction itself is known as immediate addressing mode.

Example

MOV CX, 4929 H, ADD AX, 2387 H, MOV AL, FFH

Register addressing mode

It means that the register is the source of an operand for an instruction.

Example

MOV CX, AX ; copies the contents of the 16-bit AX register into ; the 16-bit CX register), ADD BX, AX

Direct addressing mode

The addressing mode in which the effective address of the memory location is written directly in the instruction.

Example

MOV AX, [1592H], MOV AL, [0300H]

Register indirect addressing mode

This addressing mode allows data to be addressed at any memory location through an offset address held in any of the following registers: BP, BX, DI & SI.

Example

MOV AX, [BX] ; Suppose the register BX contains 4895H, then the contents ; 4895H are moved to AX ADD CX, {BX}

Based addressing mode

In this addressing mode, the offset address of the operand is given by the sum of contents of the BX/BP registers and 8-bit/16-bit displacement.

Example

MOV DX, [BX+04], ADD CL, [BX+08]

Indexed addressing mode

In this addressing mode, the operands offset address is found by adding the contents of SI or DI register and 8-bit/16-bit displacements.

Example

MOV BX, [SI+16], ADD AL, [DI+16]

Based-index addressing mode

In this addressing mode, the offset address of the operand is computed by summing the base register to the contents of an Index register.

Example

ADD CX, [AX+SI], MOV AX, [AX+DI]

Based indexed with displacement mode

In this addressing mode, the operands offset is computed by adding the base register contents. An Index registers contents and 8 or 16-bit displacement.

Example

MOV AX, [BX+DI+08], ADD CX, [BX+SI+16]

8086 instruction set:

The 8086 microprocessor supports 8 types of instructions −

Data Transfer Instructions

Arithmetic Instructions

Bit Manipulation Instructions

String Instructions

Program Execution Transfer Instructions (Branch & Loop Instructions)

Processor Control Instructions

Iteration Control Instructions

Interrupt Instructions

Let us now discuss these instruction sets in detail.

Data Transfer Instructions

These instructions are used to transfer the data from the source operand to the destination operand. Following are the list of instructions under this group −

Instruction to transfer a word

MOV − Used to copy the byte or word from the provided source to the provided destination.

PPUSH − Used to put a word at the top of the stack. POP − Used to get a word from the top of the stack to the provided location. PUSHA − Used to put all the registers into the stack. POPA − Used to get words from the stack to all registers. XCHG − Used to exchange the data from two locations. XLAT − Used to translate a byte in AL using a table in the memory.

Instructions for input and output port transfer

IN − Used to read a byte or word from the provided port to the accumulator. OUT − Used to send out a byte or word from the accumulator to the provided port.

Instructions to transfer the address

LEA − Used to load the address of operand into the provided register. LDS − Used to load DS register and other provided register from the memory LES − Used to load ES register and other provided register from the memory.

Instructions to transfer flag registers

LAHF − Used to load AH with the low byte of the flag register. SAHF − Used to store AH register to low byte of the flag register. PUSHF − Used to copy the flag register at the top of the stack. POPF − Used to copy a word at the top of the stack to the flag register.

Arithmetic Instructions

These instructions are used to perform arithmetic operations like addition, subtraction, multiplication, division, etc.

Following is the list of instructions under this group −

Instructions to perform addition

ADD − Used to add the provided byte to byte/word to word. ADC − Used to add with carry. INC − Used to increment the provided byte/word by 1. AAA − Used to adjust ASCII after addition. DAA − Used to adjust the decimal after the addition/subtraction operation.

Instructions to perform subtraction

SUB − Used to subtract the byte from byte/word from word. SBB − Used to perform subtraction with borrow. DEC − Used to decrement the provided byte/word by 1. NPG − Used to negate each bit of the provided byte/word and add 1/2’s complement. CMP − Used to compare 2 provided byte/word. AAS − Used to adjust ASCII codes after subtraction. DAS − Used to adjust decimal after subtraction.

Instruction to perform multiplication

MUL − Used to multiply unsigned byte by byte/word by word. IMUL − Used to multiply signed byte by byte/word by word. AAM − Used to adjust ASCII codes after multiplication.

Instructions to perform division

DIV − Used to divide the unsigned word by byte or unsigned double word by word. IDIV − Used to divide the signed word by byte or signed double word by word. AAD − Used to adjust ASCII codes after division. CBW − Used to fill the upper byte of the word with the copies of sign bit of the lower

byte. CWD − Used to fill the upper word of the double word with the sign bit of the lower

word.

RCL − Used to rotate bits of byte/word towards the left, i.e. MSB to CF and CF to LSB.

Assembly language programs for 8086:

To find the largest number in a data array

DATASEGMENT

ARR DB 1,4,2,3,9,8,6,7,5,10

LEN DW $-ARR

LARGEDB ?

DATAENDS

CODESEGMENT

ASSUMEDS:DATACS:CODE

START:

MOVAX,DATA

MOVDS,AX

LEASI,ARR

MOVAL,ARR[SI]

MOVLARGE,AL

MOVCX,LEN

REPEAT:

MOVAL,ARR[SI]

CMPLARGE,AL

JG NOCHANGE

MOVLARGE,AL

NOCHANGE:

INCSI

LOOPREPEAT

MOVAH,4CH

INT 21H

CODEENDS

END START

Explanation : In this Assembly Language Programming, A single program is divided into four Segments which are 1. Data Segment, 2. Code Segment, 3. Stack Segment, and 4. Extra  Segment. Now, from these one is compulsory i.e. Code Segment if at all you don’t need variable(s) for your program.if you need variable(s) for your program you will need two Segments i.e. Code Segment and Data Segment.

Next Line –CODE SEGMENTCODE SEGMENT is the starting point of the Code Segment in a Program and CODE is the name given to this segment and SEGMENT is the keyword for defining Segments, Where we can write the coding of the program.

Next Line –     ASSUME DS:DATA CS:CODEIn this Assembly Language Programming, their are Different Registers present for Different Purpose So we have to assume DATA is the name given to Data Segment register and CODE is the name given to Code Segment register (SS,ES are used in the same way as CS,DS )

Next Line – START:START is the label used to show the starting point of the code which is written in the Code Segment. : is used to define a label as in C programming.

Next Line – MOV AX,DATAMOV DS,AXAfter Assuming DATA and CODE Segment, Still it is compulsory to initialize Data Segment to DS register.  MOV is a keyword to move the second element into the first element. But we cannot move DATA Directly to DS due to MOV commands restriction, Hence we move DATA to AX and then from AX to DS. AX is the first and most important register in the ALU unit. This part is also called INITIALIZATION OF DATA SEGMENT and It is important so that the Data elements or variables in the DATA Segment are made accessable. Other Segments are not needed to be initialized, Only assuming is enhalf.

Next Line – LEA SI,ARRLEA SI,ARR in this LEA stands for LOAD EFFECTIVE ADDRESS and it loads the effective address of second element into the first element.  This same code can be interchangably written as MOV DX, OFFSET PRICE where OFFSET  means effective address and MOV means move  second element into the first element. Here Base Address of variable PRICE is loaded in DX register.Next Line – MOV AL,ARR[SI]MOV LARGE,AL

MOV AL,ARR[SI]  means move value of Array ARR in index of SI register to AL register. MOV LARGE,AL is to move AL register (First value in Array) to LARGE variable as we want to compare it with All the Array elements.Next Line – MOV CX,LENMOV CX,LEN is used to move or assign value 8 (Length of Array) to  CX. In assembly programming language we have a LOOP instruction. This works with two other helpers which are Label and Counter. The Loop start with LABEL and ends with LOOP instruction with the same LABEL name with it. the execution of the Loop depends on the value in CX register ( CX is also Called COUNTER).Next Line – REPEAT:REPEAT: is a LABEL and all the words ending in colon (:).Next Line – MOV AL,ARR[SI]MOV AL,ARR[SI] is to move value of Array ARR in index of SI register to AL register (Different values in Array). As we want to compare All elements with variable LARGE.Next Line – CMP LARGE,ALJG NOCHANGECMP LARGE,AL  is used to compare AX register with 9 and JG NOCHANGE jump if AL is greater to the respective LABEL NOCHANGE. The result of Comparision is not stored anywhere, but flags are set according to result.  is Short Jump if first operand is Greater then second operand (as set by CMP instruction). Signed. SECOND is the label where the compiler will JUMP.Next Line – MOV LARGE,AL MOV LARGE,AL is to move AL register (larger value in Array) to LARGE variable.Next Line – NOCHANGE:NOCHANGE: is a LABEL and all the words ending in colon (:).Next Line – INC SIINC SI will increment the Address value present in SI register. Here we are using SI register as a SOURCE INDEX which holds the Address of Array elements to Cover all the elements in Array.Next Line – LOOP REPEATLOOP REPEAT  This end of loop. In assembly programming language we have a LOOP instruction. This works with two other helpers which are Label and Counter. The Loop start with LABEL and ends with LOOP instruction with the same LABEL name with it. the execution of the Loop depends on the value in CX register ( CX is also Called COUNTER).Next Line – EXIT: MOV AH,4CHINT 21HThe above two line code is used to exit to dos or exit to operating system. Standard Input and Standard Output related Interupts are found in INT 21H which is also called as DOS interrupt. It works with the value of AH register, If the Value is 4ch, That means Return to Operating System or DOS which is the End of the program.

Next Line – CODE ENDSCODE ENDS is the End point of the Code Segment in a Program. We can write just ENDS But to differentiate the end of which segment it is of which we have to write the same name given to the Code Segment.

Last Line – END STARTEND START is the end of the label used to show the ending point of the code which is written in the Code Segment.

Note :- In this Assembly Language Programming, We have Com format and EXE format. We are Learning in EXE format only which simple then COM format to understand and Write. We can write the program in lower or upper case, Buti prepare Upper Case.