implementation of basic gates using memristance and ambipolarity

7/27/2019 Implementation of Basic Gates Using Memristance and Ambipolarity

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IMPLEMENTATION OF BASIC GATESUSING MEMRISTANCE AND

AMBIPOLARITY

PRESENTED BY : I. BALA KRISHNA

REGISTER NO : 1581210092

GUIDED BY : DR.M.MALATHI


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BACKGROUND ANALYSIS ANDINFORMATION

The continuous scaling of MOSFETs led to the considerationof devices with intrinsic channel and Schottky barrier (SB)contacts [3] .

The memristor shows many advantageous features for memorydesign such as non-volatility, linearity, low-power, and goodscalability [1] .

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OBJECTIVES

1. To design and analyze basic gates using

memristance and ambipolarity transistors.

2. To measure the delay and power consumption by thedesigned gates.

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EXPECTED OUTCOMES

1. Reduced Power consumption.

2. Reduced delay.

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LITERATURE REVIEW

Here, D, S, and G are the conventional drain, source, and gate,while gate PG determines the polarity of the ambipolar transistor.

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LITERATURE REVIEW

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Energy band diagrams of metal n-type and p-type semiconductors under thermal equilibrium


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Energy band diagrams of metal n-type and p-type semiconductors under forward bias

Energy band diagrams of metal n-type and p-type semiconductors under reverse bias


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When current flows in one direction through a memristor, the electricalresistance increases and when current flows in the opposite direction, the resistancedecreases.

When the current is stopped, the memristor retains the last resistance that it had, andwhen the flow of charge starts again, the resistance of the circuit will be what it waswhen it was last active.

LITERATURE REVIEW


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METHODS

A spice model for Memristor can be implemented andsimulated to observe the characteristics and theworking of memristor and is used in our project.

Ambipolar CNFET model is implemented andsimulated using SPICE so that the functioning of CNFET as both PMOS and NMOS can be observed.

Using above two technologies we implement gatesand then compare with CMOS models.

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TIME SCHEDULE

PHASE I Literature survey for first review. Simulation of memristor model for review II. Simulation of ambipolar CNFET for review III.PH ASE II

Implementation of gates using memristance andambipolarity. Comparing the results with CMOS gates.

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Resources , Citation and Bibliography Pilin junsangsri, Fabrizio Lombardi, " Design of a Hybrid Memory

Cell Using Memristance and Ambipolarity ," IEEE Transactions on Nanotechnology, vol.12, no.1, January 2013.

D. Batas and H. Fiedler, A memristor SPICE implementation and anew approach for magnetic flux controlled memristor modeling ,IEEE Transactions on Nanotechnolgy ., vol. 10, no. 2, pp. 250 255,

Mar. 2011.

Y.-M. Lin, J. Appenzeller, J. Knoch, and P. Avouris , High- performance carbon nanotube field-effect transistor with tunable polarities , IEEE Transactions on Nanotechnolgy ., vol. 4, no. 5, pp.481 489, Sep. 2005. SRM M.TECH VLSI


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SIGNIFICANCE OF THE RESEARCH PROJECT The memristor shows many advantageous features for memory

design such as non-volatility, linearity, low-power, and goodscalability.

Ambipolar technology was used to explore in-fieldcontrollable dynamic logic as well as static logic andsignificant gains in area, power, and performance have beenreported.

So, using these ambipolar transistors and memristors we canimplement logic functions with fewer gates compared tounipolar transistors, resulting in the reduction of gates and

power consumption and non-volatile results.SRM M.TECH VLSI


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Thank you.

SRM M.TECH VLSI

implementation of basic gates using memristance and ambipolarity

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