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HSR HOCHSCHULE FÜR TECHNIK RAPPERSWIL ELEKTROTECHNIK Diploma Thesis Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP Franz Schnyder Christoph Haller 11.1.2002 Supervisors: Dr. Chang Chip Hong, Andreas Ehrensperger

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HSRHOCHSCHULE FÜR TECHNIK RAPPERSWI L

ELEKTROTECHNIKDiploma Thesis

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(Please attach a copy of your Entry & Re-entry permit) Date of Issue: Date of Expiry:

Implementation of FM DemodulatorAlgorithms on a High Performance Digital

Signal Processor

TMS320C6711DSP

Franz Schnyder Christoph Haller

11.1.2002

Supervisors: Dr. Chang Chip Hong, Andreas Ehrensperger

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Abstract

Analog modulations are more and more replaced by digital ones. To keep the compatibility thenew device should be able to perform the analog modulation. A interesting solution is to solvethis with digital signal processing. In an earlier semester project, four FM demodulation algo-rithms were developed and tested on their suitability. Two of them (mixed and PLL demodulator)are are implemented on the DSP (TMS320C6711DSK).

Because both algorithms demand the same pre and after signal preparation, the demodulationis split into sub projects to reach a high compatibility between the algorithms. First they are re-alized in floating-point. That allows to concentrate on the algorithms themeselves without anyeffects of a fixed-point implementation. After that, the algorithms are translated step by step fromfloating-point to fixed-point. Afterwards the algorithms are optimized in time and signal quality.As in the earlier work, the algorithms are tested out with measuring the SINAD and the signalnoise ratio of the demodulated signal. Furthermore the needed computing time of the implemen-tations is measured. The two algorithms are compared each other. The mixed demodulator showsa better performance than the PLL.

The Chapters Theory 3 and Simulation 4 were not developed in this project, but in the earliersemester project. Nevertheless they are included to get the whole context of developed digital FMdemodulation in a single document.

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Abstract

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Contents

Abstract i

List of Figures vii

List of Tables xi

List of Listings xiv

Acknowledgement xv

Subject xviiIntroduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xviiTask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xviiReporting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xviiiDates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xviiiOrganization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xviii

1. Introduction 11.1. Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2. Objective . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.3. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.3.1. FM Receiver Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.3.2. The Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2. Project Management 32.1. Milestones . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32.2. Responsibilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

3. Theory 53.1. Frequency Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53.2. Algorithms for Signal Pretreatment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.2.1. Subsampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63.2.2. Quadrature-Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.3. Algorithms for Digital FM Demodulation . . . . . . . . . . . . . . . . . . . . . . . . . 93.3.1. Baseband Delay Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.3.2. Phase-Adapter Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.3.3. Phase-Locked Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.3.4. Mixed Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

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Contents

4. Simulation 174.1. General Knowledge from Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.1.1. Ideal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174.1.2. DSP Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174.1.3. DSP Model with Gaussian Noise . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.2. Algorithms for Signal Pretreatment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.2.1. FM Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.2.2. Subsampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.2.3. Quadrature-Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4.3. Baseband Delay Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224.3.1. Ideal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224.3.2. DSP Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.3.3. DSP Model with Gaussian Noise . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.4. Phase-Adapter Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254.4.1. Ideal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.5. Phase-Locked Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274.5.1. Ideal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 284.5.2. DSP Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294.5.3. DSP Model with Gaussian Noise . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.6. Mixed Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314.6.1. Ideal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314.6.2. DSP Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334.6.3. DSP Model with Gaussian Noise . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4.7. Comparison of the Algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344.7.1. Signal Quality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344.7.2. Robustness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354.7.3. Computing Power and Storage Utilization . . . . . . . . . . . . . . . . . . . . 364.7.4. The Appropriate Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

5. Implementation 395.1. System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

5.1.1. Signal Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395.1.2. The Sampling Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425.1.3. Analog-to-Digital Conversation THS1408 . . . . . . . . . . . . . . . . . . . . . 435.1.4. Digital-to-Analog Conversation . . . . . . . . . . . . . . . . . . . . . . . . . . 475.1.5. Programm Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475.1.6. Interrupt Routines and Scheduling . . . . . . . . . . . . . . . . . . . . . . . . . 48

5.2. Floating-Point Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505.2.1. Quadrature Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505.2.2. First Down Sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545.2.3. Mixed Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545.2.4. PLL Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 555.2.5. Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 565.2.6. Second Down Sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

5.3. Fixed-Point Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 575.3.1. Fractional Q Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 585.3.2. Quadrature Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 605.3.3. Mixed Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 625.3.4. PLL Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 625.3.5. Out Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

5.4. Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

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Contents

5.4.1. Adaptive Seeking of Carrier Angular Frequency . . . . . . . . . . . . . . . . . 705.4.2. Time Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

6. Tests And Results 776.1. Spectrum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 776.2. Signal Quality (SINAD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

6.2.1. Mixed Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 796.2.2. PLL Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 816.2.3. Comparison of Mixed and PLL Demodulator . . . . . . . . . . . . . . . . . . . 82

6.3. Robustness (S/N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 836.3.1. Mixed Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 846.3.2. PLL Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 846.3.3. Comparison of Mixed and PLL Demodulator . . . . . . . . . . . . . . . . . . . 85

6.4. Computing Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 866.4.1. Demodulation Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 866.4.2. Interrupt Routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 906.4.3. CPU Processing Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

7. Conclusions and Recommendations 93

A. Equipment 95A.1. Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

A.1.1. DSP Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95A.1.2. Analog-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

A.2. Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96A.2.1. DSP IDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96A.2.2. MATLAB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

A.3. Signal And Measure Instruments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96A.3.1. Signal Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96A.3.2. Oscilloscope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97A.3.3. Audio Measurement System . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

B. Abbreviations and Symbols 99B.1. Formula Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99B.2. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

C. Simulation Measure Algorithms 101C.1. Harmonic distortion k and SINAD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101C.2. Signal to noise ratio S/N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

D. Bibliography 103D.1. English Books . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103D.2. German Books . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103D.3. Texas Instruments Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

E. Simulink models 105E.1. Baseband-Delaydemodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105E.2. Phase-Adapter-Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108E.3. Phasenregelschleife . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109E.4. Mix Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

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F. Listings 115F.1. C Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

F.1.1. ADC and DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115F.1.2. Floating-Point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119F.1.3. Fixed-Point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126F.1.4. Fixed-Point Optimized . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136F.1.5. Floating-Point Adaptive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

F.2. Linear Assembly Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146F.2.1. Fixed-Point Optimized . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146

F.3. MATLAB Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

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List of Figures

1.1. Block diagram FM receiver architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2. Spectrum message signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21.3. Spectrum FM signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2.1. Project schedule . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3.1. Subdivisions of FM demodulation block . . . . . . . . . . . . . . . . . . . . . . . . . . 73.2. Spectrum subsampling with even λ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.3. Spectrum subsampling with odd λ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.4. Quadrature-Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.5. Real quadrature-mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.6. Complex baseband delay demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . 103.7. Real baseband delay demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.8. Real amplitude normalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123.9. Phase-adapter demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123.10. Phase-Locked Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.11. Actual realization Phase-Locked Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . 143.12. Mixed demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.1. Quantizer and saturation blocks in Simulink . . . . . . . . . . . . . . . . . . . . . . . 184.2. Simulink block FM modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.3. Simulink model FM modulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.4. Simulink model subsampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204.5. Plot 1 subsampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204.6. Plot 2 subsampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204.7. Simulink block quadrature-mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214.8. Simulink model quadrature-mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214.9. Plot quadrature-mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224.10. Simulink model baseband delay demodulator . . . . . . . . . . . . . . . . . . . . . . 224.11. Plot of delay demodulator ideal with kFM = 180 . . . . . . . . . . . . . . . . . . . . . 234.12. Plot of delay demodulator ideal with kFM = 18000 . . . . . . . . . . . . . . . . . . . . 234.13. Spectrum of the chirp signal from a ideal delay demodulator . . . . . . . . . . . . . . 234.14. Spectrum of chirp signal for delay demodulator DSP model . . . . . . . . . . . . . . 244.15. Plot FM signal with noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264.16. Plot noise and output signal with noise . . . . . . . . . . . . . . . . . . . . . . . . . . 264.17. Simulink model phase-adapter demodulator ideal . . . . . . . . . . . . . . . . . . . . 264.18. Plot phasea-adapter demodulator with kFM = 180 . . . . . . . . . . . . . . . . . . . . 274.19. Plot phase-adapter demodulator with kFM = 18000 . . . . . . . . . . . . . . . . . . . 274.20. Plot PLL ideal with kFM = 1800 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294.21. Plot PLL ideal with kFM = 18000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294.22. Spectrum of the chirp signal for the ideal PLL . . . . . . . . . . . . . . . . . . . . . . . 30

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4.23. PLL DSP kFM = 1800, with bandpass filter . . . . . . . . . . . . . . . . . . . . . . . . . 304.24. PLL DSP kFM = 18000, with bandpass filter . . . . . . . . . . . . . . . . . . . . . . . . 304.25. PLL DSP kFM = 1800, without bandpass filter . . . . . . . . . . . . . . . . . . . . . . . 314.26. PLL DSP kFM = 18000, without bandpass filter . . . . . . . . . . . . . . . . . . . . . . 314.27. PLL DSP kFM = 18000, with the bandpass filter in the feedback loop . . . . . . . . . 314.28. Simulink model mixed demodulator ideal . . . . . . . . . . . . . . . . . . . . . . . . . 324.29. Plot of ideal mixed demodulator with kFM = 180 . . . . . . . . . . . . . . . . . . . . . 334.30. Plot of ideal mixed demodulator with kFM = 18000 . . . . . . . . . . . . . . . . . . . 334.31. Spectrum of the chirp signal for an ideal mixed demodulator . . . . . . . . . . . . . . 334.32. Spectrum of the chirp signal for DSP mixed demodulator . . . . . . . . . . . . . . . . 344.33. Plot of FM signal with noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354.34. Plot of the noise and the output signal . . . . . . . . . . . . . . . . . . . . . . . . . . . 354.35. Comparison of the harmonic distortion for ideal models of different algorithms with

constant kFM of 18000 and variable frequency . . . . . . . . . . . . . . . . . . . . . . 354.36. Comparison of harmonic distortion for ideal models of different algorithms with

constant frequency of 2000Hz and variable kFM . . . . . . . . . . . . . . . . . . . . . 364.37. Comparison of SINAD for DSP models of different algorithms with constant kFM of

18000 and variable frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 364.38. Comparison of S/N ratio for different demodulation algorithmen, with a kFM of

18000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

5.1. Overview of floating-point implementation . . . . . . . . . . . . . . . . . . . . . . . . 405.2. Overview of fixed-point implementation . . . . . . . . . . . . . . . . . . . . . . . . . 415.3. Input and output samples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425.4. Spectrum of FM signal after subsampling . . . . . . . . . . . . . . . . . . . . . . . . . 435.5. THS1408 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 435.6. Schema address bus wiring THS1408 . . . . . . . . . . . . . . . . . . . . . . . . . . . 445.7. Ping Pong Buffering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 465.8. EDMA setup for Ping Pong Buffering . . . . . . . . . . . . . . . . . . . . . . . . . . . 465.9. Ping Pong Buffering DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475.10. Programm flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485.11. Layout main file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485.12. Scheduling with software interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485.13. Overview interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 495.14. DAC interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 495.15. EDMA interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505.16. Demodulate software interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . . 505.17. Quadrature mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 515.18. Frequency response of low-pass filter for quadrature mixing, floating point . . . . . 525.19. Digital block diagram of quadrature mixer . . . . . . . . . . . . . . . . . . . . . . . . 535.20. Signal spectrum after quadrature mixing . . . . . . . . . . . . . . . . . . . . . . . . . 545.21. Signal spectrum after first down sampling . . . . . . . . . . . . . . . . . . . . . . . . . 545.22. Block diagram of mixed demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . 555.23. Block diagram of PLL demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 565.24. Band-pass filter frequency response, floating point . . . . . . . . . . . . . . . . . . . . 575.25. Signal spectrum before second down sampling . . . . . . . . . . . . . . . . . . . . . . 575.26. Signal spectrum after second down sampling . . . . . . . . . . . . . . . . . . . . . . . 585.27. Q.15 Bit Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 585.28. Block diagram of cascaded low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . 605.29. Change in block diagram of . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 605.30. Output signals and delay states of cascaded low-pass filter . . . . . . . . . . . . . . . 61

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5.31. Output signals and delay states of cascaded low-pass filter . . . . . . . . . . . . . . . 615.32. Plot arc tangent lookup table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 635.33. Sine values with belonging indexes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 645.34. Index manipulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 655.35. Linear interpolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 665.36. Sign of correction changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 675.37. Sign of correction does not change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 685.38. Block diagram transposed filter structure . . . . . . . . . . . . . . . . . . . . . . . . . 695.39. Adapted System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 705.40. Adaptive seeking of carrier angular frequency . . . . . . . . . . . . . . . . . . . . . . 725.41. development flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

6.1. FFT print of demodulated signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 776.2. FFT print of DSP generated sine wave . . . . . . . . . . . . . . . . . . . . . . . . . . . 786.3. FFT print of demodulated signal for the range of 0 to 20kHz . . . . . . . . . . . . . . 786.4. Principle of THD+N Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 796.5. SINAD of fixed-point mixed demodulator with various table sizes for direct lookup 806.6. SINAD of fixed-point mixed demodulator with various table sizes for interpolated

lookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 806.7. SINAD comparison of direct and interpolated lookup for fixed-point mixed demod-

ulator and the floating-point implementation . . . . . . . . . . . . . . . . . . . . . . . 806.8. SINAD of fixed-point PLL demodulator with various table sizes for direct lookup . 816.9. SINAD of fixed-point PLL demodulator with various table sizes for interpolated

lookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 816.10. SINAD comparison of direct and interpolated lookup for fixed-point PLL demodu-

lator and the floating-point implementation . . . . . . . . . . . . . . . . . . . . . . . . 826.11. Error of linear interpolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 826.12. SINAD comparison of different demodulator implementations . . . . . . . . . . . . . 836.13. Oscilloscope print FM signal normal . . . . . . . . . . . . . . . . . . . . . . . . . . . . 836.14. Oscilloscope print FM signal with noise added . . . . . . . . . . . . . . . . . . . . . . 836.15. Spectrum of an demodulated signal with an S/N ratio of 20dB by the FM signal . . . 846.16. S/N of the mixed demodulated signal with a S/N of 20dB at the input FM signal . . 846.17. S/N of the mixed demodulated signal with a S/N of 15dB at the FM input signal . . 856.18. S/N of the PLL demodulated signal with a S/N of 20dB at the input FM signal . . . 856.19. S/N of the PLL demodulated signal with a S/N of 15dB at the FM input signal . . . 856.20. S/N of the PLL demodulated signal with a S/N of 15dB at the FM input signal . . . 866.21. Time measurement results Quadrature mixer ( quad_mix ) . . . . . . . . . . . . . . . 876.22. Time measurement results mixed demodulator direct lookup ( mixed_demodulate ) 886.23. Time measurement results mixed demodulator interpolated lookup (

mixed_demodulate ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 886.24. Time measurement results PLL demodulator direct lookup ( pll_demodulate ) . . . . 886.25. Time measurement results out filter ( out_filter ) . . . . . . . . . . . . . . . . . . . . . 896.26. Time comparison of the demodulation functions . . . . . . . . . . . . . . . . . . . . . 896.27. Executing time of interrupt routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . 906.28. CPU processing load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

E.1. Blockschaltbild Simulink Aufbau Idealer Baseband-Delaydemodulator . . . . . . . . 105E.2. Blockschaltbild Simulink Aufbau DSP Baseband-Delaydemodulator . . . . . . . . . 106E.3. Blockschaltbild Simulink Aufbau DSP Baseband-Delaydemodulator mit gausschem

Rauschen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107E.4. Blockschaltbild Simulink Aufbau Idealer Phase-Adapter-Demodulator . . . . . . . . 108

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E.5. Blockschaltbild Simulink Aufbau Idealer PLL . . . . . . . . . . . . . . . . . . . . . . . 109E.6. Blockschaltbild Simulink Aufbau DSP PLL . . . . . . . . . . . . . . . . . . . . . . . . 110E.7. Blockschaltbild Simulink Aufbau DSP PLL mit gausschem Rauschen . . . . . . . . . 111E.8. Blockschaltbild Simulink Aufbau Idealer Mix Demodulator . . . . . . . . . . . . . . 112E.9. Blockschaltbild Simulink Aufbau DSP Mix Demodulator . . . . . . . . . . . . . . . . 113E.10. Blockschaltbild Simulink Aufbau DSP Mix Demodulator mit gausschem Rauschen . 114

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4.1. Parameter quantizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184.2. Parameter saturation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184.3. Parameter FM modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.4. Parameter quadrature-mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214.5. Harmonic distortion of the ideal delay demodulator . . . . . . . . . . . . . . . . . . . 234.6. SINAD delay demodulator DSP model . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.7. S/N delay demodulator DSP model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254.8. Harmonic distortion phase-adapter demodulator . . . . . . . . . . . . . . . . . . . . . 264.9. Harmonic distortion PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294.10. SINAD PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304.11. S/N PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314.12. Harmonic distortion factor mixed demodulator ideal . . . . . . . . . . . . . . . . . . 324.13. SINAD DSP mixed demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334.14. S/N DSP Mix Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.1. Jumper settings THS1408 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 445.2. Addresses of registers THS1408 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 445.3. Truth table address decode THS1408 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 455.4. EMIF timing registers for THS1408 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 455.5. Filter specifications low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 695.6. Filter specifications high-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

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List of Listings

5.1. DAC interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 495.2. EDMA interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505.3. Demodulate softawre interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . . 505.4. Argument calculation fixed-point mixed demodulator . . . . . . . . . . . . . . . . . . 625.5. PLL demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 655.6. Interpolated Lookup Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67F.1. adc_THS1408.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115F.2. adc_THS1408.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116F.3. dac_codec.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118F.4. dac_codec.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118F.5. Floating-Point :: global_settings.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119F.6. Floating-Point :: fm_dem_main.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119F.7. Floating-Point :: quad_mix.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121F.8. Floating-Point :: quad_mix.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122F.9. Floating-Point :: downsample_one.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123F.10. Floating-Point :: downsample_one.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123F.11. Floating-Point :: mixed_demodulate.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 123F.12. Floating-Point :: mixed_demodulate.c . . . . . . . . . . . . . . . . . . . . . . . . . . . 123F.13. Floating-Point :: pll_demodulate.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124F.14. Floating-Point :: pll_demodulate.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124F.15. Floating-Point :: out_filter.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125F.16. Floating-Point :: out_filter.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125F.17. Floating-Point :: downsample_two.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126F.18. Floating-Point :: downsample_two.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126F.19. Fixed-Point :: global_settings.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126F.20. Fixed-Point :: fm_dem_main.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126F.21. Fixed-Point :: quad_mix.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129F.22. Fixed-Point :: quad_mix.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129F.23. Fixed-Point :: mixed_demodulate.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130F.24. Fixed-Point :: mixed_demodulate.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130F.25. Fixed-Point Interpolated :: mixed_demodulate.h . . . . . . . . . . . . . . . . . . . . . 131F.26. Fixed-Point Interpolated :: mixed_demodulate.c . . . . . . . . . . . . . . . . . . . . . 131F.27. Fixed-Point :: pll_demodulate.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132F.28. Fixed-Point :: pll_demodulate.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132F.29. Fixed-Point Interpolated :: pll_demodulate.h . . . . . . . . . . . . . . . . . . . . . . . 133F.30. Fixed-Point Interpolated :: pll_demodulate.c . . . . . . . . . . . . . . . . . . . . . . . 133F.31. Fixed-Point :: out_filter.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135F.32. Fixed-Point :: out_filter.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135F.33. Fixed-Point Optimized :: global_settings.h . . . . . . . . . . . . . . . . . . . . . . . . . 136F.34. Fixed-Point Optimized :: fm_dem_main.c . . . . . . . . . . . . . . . . . . . . . . . . . 137F.35. Fixed-Point Optimized :: quad_mix.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

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List of Listings

F.36. Fixed-Point Optimized :: quad_mix.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139F.37. Fixed-Point Optimized :: mixed_demodulate.h . . . . . . . . . . . . . . . . . . . . . . 140F.38. Fixed-Point Optimized :: mixed_demodulate.c . . . . . . . . . . . . . . . . . . . . . . 140F.39. Fixed-Point Optimized Interpolated :: mixed_demodulate.h . . . . . . . . . . . . . . 141F.40. Fixed-Point Optimized Interpolated :: mixed_demodulate.c . . . . . . . . . . . . . . 141F.41. Fixed-Point Optimized :: pll_demodulate.h . . . . . . . . . . . . . . . . . . . . . . . . 141F.42. Fixed-Point Optimized :: pll_demodulate.c . . . . . . . . . . . . . . . . . . . . . . . . 142F.43. Fixed-Point Optimized :: out_filter.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143F.44. Fixed-Point Optimized :: out_filter.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143F.45. Floating-Point Optimized Adaptive :: mixed_demodulate.h . . . . . . . . . . . . . . 145F.46. Floating-Point Optimized Adaptive :: mixed_demodulate.c . . . . . . . . . . . . . . . 145F.47. Fixed-Point Optimized :: quad_mix_lin_ass.sa . . . . . . . . . . . . . . . . . . . . . . 146F.48. tanTabGen.m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149F.49. tanTabGenInterp.m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150F.50. SineTabGen.m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150F.51. SineTabGenInt.m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151F.52. mixer_design.m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152F.53. lowpass_design_noisefilter.m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153F.54. highpass_design_noisefilter.m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153

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Acknowledgement

Living in Singapore and working on our diploma project for the last twelve weeks have been anenriching experience for us. Without the support of many people, this would not have been possi-ble. At this point we would like to express our appreciation to all persons who were involved.

Thanks to Andreas Ehrensperger, our supervisor in Switzerland, for having the efforts of support-ing us from overseas. Dr. Chang Chip Hong, our local supervisor, for his encouraging supporthere in Singapore. Dr. T. Srikanthan, director of Center for High Performance Embedded Systems.Dr. Ma Jian-Guo for reviewing the report. Much credit to those who made our stay even possi-ble: Peter Schneider, Vice-President of the University of Applied Sciences (HSR), Rapperswil; Ms.Anita Riegler, International Relations Office, University of Applied Sciences (HSR), Rapperswil;Ms. Agnes Yap and Ms. Catherine Tai , International Relations Office, Nanyang TechnologicalUniversity (NTU), Singapore. We would like to thank the students and colleagues in the labora-tory who supported us in any form.

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Acknowledgement

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Subject

Implementation of FM demodulator algorithms on ahigh performance digital signal processor

Introduction

Mobile radio provider organizations are planning to replace their traditional analog FM-basedradio system, by a new digital system like TETRA, TETRAPOL or GSM-R. To guarantee a seamlessoperation it could be very useful if the new system could operate in a special mode, which iscompatible to the old FM system. From the commercial as well as from the technical point of viewit would be very interesting if such an special mode could be implemented as a part of software ofthe mobile signal processors without need for any additional hardware.

Task

At least two of the FM-demodulation algorithms, which have been designed and validated duringthe last HSR semester project, should be realized as real time.The input signal is a FM-modulated intermediate frequency signal (IF) with the following specifi-cations:

• carrier frequency: 10.7MHz

• maximum frequency deviation: 3kHz

• maximum signal bandwidth: 12.5kHz implementations on a digital signal processor.

This IF-signal should be sampled directly using bandpass-subsampling techniques.Concerning the implementation of the algorithms, special attention should be paid to the followingaspects:

• The implementations should be based on a fixed point architecture. (If a floating point signalprocessor is used, only the fixed point subset of the instruction set should be used)

• The implementation should be optimized with the highest priority to a low computing load,which lowers the power consumption of the target system.

With the implemented prototypes extensive tests under real world conditions should be made forvalidation.

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Subject

Reporting

The report has to be written in English and 6 copies are needed. Three complete reports are for theHSR including a CD-ROM containing the complete set of the elaborated data. Three complete re-ports also including copies of the CD-ROM for the NTU. The report shall also include a translationof the earlier semester project to have the whole context in an English document.

DatesBegin of Thesis 22 October 2001End of Thesis 11 January 2002

Organization

Supervisor NTU Asst. Prof. Dr. Chang Chip HongSupervisor HSR Andreas Ehrensperger

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1. Introduction

1.1. Motivation

Frequency modulation (FM) is an analog modulation, which is for example used in VHF radiobroadcasting. Another field of application for FM is private mobile radio (PMR), which is used byorganizations like police, fire departments, railroad or power supply companies, for mobile com-munication. Those analog systems will be gradually replaced by a digital counterparts in the newgeneration. For a smooth transition of the two systems, it is essential for the new generation sys-tem to be able to communicate with the radio equipment of the old generation. Because all the newradio equipment are based on DSP-Technology, it is obvious and of commercial interest to performthe demodulation with the signal processor instead of adding additional analog hardware.

1.2. Objective

Various algorithms to perform the demodulation were developed and simulated in the previoussemester project. This previous work is included in Chapters Theory 3 and Simulation 4. Twoappropriate algorithms are now implemented on a DSP platform. These implementations are thentested for signal quality and robustness.

1.3. Specifications

1.3.1. FM Receiver Architecture

The modulated signal sFM is frequency limited at an intermediate frequency of 10.7 MHz. Theantenna, tuner, and the bandpass filter are given and do not fall in the scope of this work. (seeFigure 1.1).

Tuner sFMFM Demodulation

sD

10.7 MHz

Figure 1.1.: Block diagram FM receiver architecture

1

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Introduction

1.3.2. The Signals

The message signal sN is a speech signal from 300 Hz to 3400 Hz. The amplitude is normalized toone (see Figure 1.2).

A

f [HZ]1 k 2 k 3 k 4 k

message signal

300 3400

b = 3100 Hz

A

f [HZ]

FM signal

10.7 M

b = 12.5 kHz

Figure 1.2.: Spectrum message signal

The FM-Signal sFM has a bandwidth of 12.5 kHz and a carrier frequency of 10.7 MHz. The ampli-tude is also normalized to one (see Figure 1.3).

A

f [HZ]1 k 2 k 3 k 4 k

message signal

300 3400

b = 3100 Hz

A

f [HZ]

FM signal

10.7 M

b = 12.5 kHz

Figure 1.3.: Spectrum FM signal

2

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2. Project Management

The project was divided into five main tasks, which were further divided into subtasks. For eachsubtask the required time was estimated shown in time schedule Figure 2.1. At the importantstages of the project a milestone was set.

2.1. Milestones

M1 First Floating-Point Demodulation A first version of both demodulation algorithms is run-ning, where time and quality are not of great interest and the source code is a draft version.

M2 Floating-Point Demodulation The two demodulation algorithms are running with a goodsignal quality and the source is well commented.

M3 Fixed-Point Demodulation Both algorithms are running stable on a fixed-point implementa-tion in C, without great effort in speed optimization.

M4 Optimized Fixed-Point Demodulation Both algorithms are speed optimized and runningstable. Various tests under real world conditions are done to characterize them.

M4 Report and Presentation The report is finished and the presentation is prepared.

2.2. Responsibilities

The project was carried out in a teamwork and therefore the tasks were distributed among the twopersons. This is also shown in Figure 2.1.

3

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Project Management

Milestones M 1 PH 2 3 PH PH 4 PH 5

Estimated timeActual Time

X X

X X

X

X X

X X

X

X

X

X

X X

X

X

X

05-03 Preparing Presentation

Fran

z Sc

hnyd

erC

hris

toph

Hal

ler

X X

X

05-01 Translation Old Report

05-02 Report

03-04

03-05 Tests

05 Documentation And Presentation

Optimization

04 Fixed-Point Implementations

04-01 Mixer Algorithm

03-02 Mixed Demodulator Algorithm

Floating-Point Implementations

Mixer Algorithm

01

02

02-02 Codec 535 With EDMA

Administrative Work

Analog-Digital-Converter andDigital-Analog-Converter

02-01 ADC 1408 With EDMA

ID43 44

Oct. 01 Nov. 01

45 46 47

Jan. 02

48

Task Name01 025249 50 51

Dec. 01

04-05 Tests

02-03 Tests

04-02 Mixed Demodulator Algorithm

04-04 Optimization

03

03-01

04-03 PLL Demodulator Algorithm X

03-03 PLL Demodulator Algorithm X

Figure 2.1.: Project schedule

4

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3. Theory

3.1. Frequency Modulation

Frequency modulation (FM) is a type of angle-modulated signal. A conventional angle modulatedsignal is defined by the following equation.

sFM(t) = A · cos(ωT · t +φFM(t)) (3.1)

for FM, the relation of sN to φFM is given by

φFM(t) = kFM ·∫

sN(t) · dt (3.2)

where ωT is the carrier angular frequency expressed ind rad/s and kFM is the modulation index.There is no connection between the spectrum of the message sN(t) and the spectrum of the modu-lated signal. If we use a harmonic message like

sN(t) = K · cos(ωN · t)

The modulated signal can be expressed as

sFM(t) = A · cos(ωT · t +φFM(t))

withφFM(t) = kFM ·

∫K · cos(ωN · t) · dt

The integral does not convert so

φFM(t) = kFM · K · limT→∞

t∫−T

cos(ωN · τ) · dτ =kFM · K

ωN·[

sin(ωN · t) + limT→∞

sin(ωN · T)]

φFM(t) =kFM · K

ωN· sin(ωN · t)

Letµ =

kFM · KωN

and ωN = 2 · π · fg, the frequency derivation is given by

∆F = µ · fg =kFM · K

2 · π (3.3)

The modulated FM signal is now

sFM(t) = A · cos [ωT · t + µ · sin(ωN · t)]

5

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Theory

Using the Bessel function Figure

Jn(x) =∞

∑i=0

(−1)i

i! · (n + i)!· ( x

2)

n+2·i

and the relation

cos [α + x · sin(β)] =∞

∑n=−∞

Jn(x) · cos(α + n ·β)

the FM signal can be written as

sFM(t) = A ·∞

∑n=−∞

Jn(µ) · cos(ωT · t + n ·ωN)

the frequency response can be determined with the Fourier transformation

SFM(ω) =∞∫

−∞

sFM(t) · e− j·ω·t · dt

with∞∫

−∞

cos(ωx · t) · e− j·ω·t · dt = π · [δ(ω + ωx) + δ(ω−ωx)]

SFM can be expressed as

SFM(ω) =∞

∑n=−∞

Jn(µ) · π · [δ(ω + ωT + n ·ωN) + δ(ω−ωT − n ·ωN)]

In general the FM bandwidth is not limited, but it declines fast outside a bandwidth around thecarrier frequency. This bandwidth can be found using the Carson’s rule

bFM = 2 · (∆F + fg) (3.4)

where fg is the highest frequency in the message. Hence the bandwidth rises with a rising ∆F anda rising message frequency.

3.2. Algorithms for Signal Pretreatment

All the digital FM demodulation algorithms presented in the next section need the FM signal inthe baseband. Therefore the FM demodulation unit from Figure 1.1 is further divided into threeunits: subsampling, quadrature mixing and baseband FM demodulator (see Figure 3.1).

3.2.1. Subsampling

The FM signal after the bandpass filter has a carrier frequency of 10.7 MHz and a bandwidth of12.5 kHz. This results in a maximum frequency of over 10.7 MHz. Hence, a sampling rate of over21 MHz is required. This data rate is too fast for today DSP’s. However as the signal is frequencylimited (Bandwidth b), a subsampling is possible and the sampling rate can be calculated as follows[6]:In the special case that

f1 = λ · b , λ ∈ [N]f2 = (λ + 1) · b

6

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3.2. Algorithms for Signal Pretreatment

FM demodulation

Subsampling Quadraturemixing

Baseband FMdemodulation

sFM

sFM

sFMsimag

srealsD

sD

Figure 3.1.: Subdivisions of FM demodulation block

the sample rate isfA = 2 · b (3.5)

for a non aliasing periodic sequel of the spectrum. Figure 3.2 shows the spectrum subsampling foran even λ. Figure 3.3 shows the subsampling for an odd λ.

ff1 f2

b

4b

f2b=fA

ffA

ff1 f2

b

3b

f2b=fA

ffA

Figure 3.2.: Spectrum subsampling with even λ

If the subsampling is interpreted in terms of the carrier frequency, fT

fT −b2

= λ · b

fT = b2λ + 1

2

For a general carrier frequency fT and bandwidth b, the condition of an even λ is often not fulfilled.Thus, the bandwidth has to increase.

b′ = b · q q > 1

7

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Theory

ff1 f2

b

4b

f2b=fA

ffA

ff1 f2

b

3b

f2b=fA

ffA

Figure 3.3.: Spectrum subsampling with odd λ

the new bandwidth is

fT = b′2λ + 1

2

b′ =2 fT

2λ + 1

where λ is a largest integer number, but smaller than fT− b2

b . Therefore the sampling rate is

fA = 2 · b′ =4 fT

2λ + 1(3.6)

3.2.2. Quadrature-Mixer

The mixing to the baseband is carried out by the multiplication of the FM signal and a complexoscillator e jωT n and a low pass filter [6] (see Figure 3.4). The input signal is the modulated signal sFM

sFM(n) g(n) sbasis(n)

nj Te ω

Z*

Figure 3.4.: Quadrature-Mixer

sFM (n) = A · cos (ωTn +φFM (n)) (3.7)

The output signal of the mixer is:

g (n) = sFM (n) · e jωT n = A · cos (ωTn +φFM (n)) · e jωT n = A · e j(ωT n+φFM(n)) + e− j(ωT n+φFM(n))

2· e jωT n

=A2

[e j(ωT n+φFM(n)+ωT n) + e j(−ωT n−φFM(n)+ωT n)

]=

A2

[e j(2ωT n+φFM(n)) + e j(−φFM(n))

]

8

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3.3. Algorithms for Digital FM Demodulation

sbasis (n) = (g (n) ∗ TP)∗ =(

A2

e− jφFM(n))∗

=A2

e jφFM(n) =A2

cos (φFM (n)) + jA2

sin (φFM (n))

(3.8)The result is a complex signal sbasis. The mixer can also be realized with real signals by multiplyingthe FM signal with a sine and cosine oscillation signal (see Figure 3.5). The input signal is again

sFM(n)cos(ωT n)

sin(ωT n)

gr1(n)

gi1(n)

sreal(n)

simag(n)

ωT

2ωT0

ω

ω

sfm

sreal/imag

-1

Figure 3.5.: Real quadrature-mixer

the FM signal sFM.sFM (n) = A · cos (ωTn +φFM (n))

Therefore, the output signals are

gr1(n) = sFM (n) · cos (ωTn) = A · cos (ωTn +φFM (n)) · cos (ωTn)

=A2

[cos (ωTn +φFM (n)−ωTn) + cos (ωTn +φFM (n) + ωTn)]

=A2

cos (φFM (n)) +A2

cos (2ωTn +φFM (n))

sreal(n) = gr1(n) ∗ gTP(n) =A2

cos (φFM (n)) (3.9)

gi1(n) = sFM (n) · sin (ωTn) = A · cos (ωTn +φFM (n)) · sin (ωTn)

=A2

[sin (−ωTn−φFM (n) + ωTn) + sin (ωTn +φFM (n) + ωTn)]

=A2

sin (−φFM (n)) +A2

sin (2ωTn +φFM (n))

simag (n) = (−1) · gi1 (n) ∗ gTP(n) =A2

sin (φFM (n)) (3.10)

It results in two signal, the real part sreal and the imaginary part simag, also known as the I (Inphase)and Q (Quadraturephase) signals.

3.3. Algorithms for Digital FM Demodulation

3.3.1. Baseband Delay Demodulator

As the name implies, the baseband delay demodulator needs the FM-Signal in the baseband. Forthat reason a quadrature mixing (see Section 3.2.2) has to be done first. Figure 3.6 shows the blockdiagram of the complex baseband delay demodulator. The input signal is the complex FM signal

9

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Theory

Z-1

sbasis(n) g1(n)

Z*

arg

sbasisv(n)

g2(n) sD(n)FM

1T k⋅

Figure 3.6.: Complex baseband delay demodulator

in the baseband sbasis given in Eq. 3.8. With Eq. 3.2 the system can be described as follow, where Tis the sample time.

g1 (n) = sbasis · sbasisv = e jφFM(n) · e− jφFM(n−1) = e j(φFM(n)−φFM(n−1))

g2 (n) = arg (g1 (n)) = φFM (n)−φFM (n− 1)

sD (n) =g2 (n)T · kFM

=φFM (n)−φFM (n− 1)

T · kFM=

φ′FM (n)kFM

=kFM · sN (n)

kFM= sN (n) (3.11)

The output signal sD is equal to the original message sN . Hence, the system demodulates a com-plex FM signal in the baseband, sbasis.

One complex multiplication needs four real multiplications and is therefore time-consuming. Withthe formula of Euler the calculation can be written as

g1 (n) = e jφFM(n) · e− jφFM(n−1) = [cos (φFM (n)) + j sin (φFM (n))] · [cos (φFM (n− 1))− j sin (φFM (n− 1))]= cos (φFM (n)) cos (φFM (n− 1)) + sin (φFM (n)) sin (φFM (n− 1))

+ j [sin (φFM (n)) cos (φFM (n− 1))− cos (φFM (n)) sin (φFM (n− 1))]

= cos (φFM (n)−φFM (n− 1)) + j sin (φFM (n)−φFM (n− 1)) = e j(φFM(n)−φFM(n−1))

It shows that the required information appears in the real part as well as in the imaginary part.Thus the system can be reduced to the imaginary part. Using the two real signals in the basebandsreal from Eq. 3.9 and simag from Eq. 3.10 as input signals.Figure 3.7 shows the block diagram of the real baseband delay demodulator. The output signal is

Z-1

Z-1

sreal(n)

simag(n)

sreal(n-1)

simag(n-1)

h1(n)

h2(n)

+

-

arcsinsD(n)h3(n)

FM

1T k⋅

h4(n)

Figure 3.7.: Real baseband delay demodulator

h1 (n) = simag (n) · sreal (n− 1) = sin (φFM (n)) · cos (φFM (n− 1))h2 (n) = sreal (n) · simag (n− 1) = cos (φFM (n)) · sin (φFM (n− 1))

h3 (n) = h1 (n)− h2 (n) = sin (φFM (n)) cos (φFM (n− 1))− cos (φFM (n)) sin (φFM (n− 1))= sin (φFM (n)−φFM (n− 1))

10

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3.3. Algorithms for Digital FM Demodulation

sD (n) = arcsin h3 (n) · 1T · kFM

=φFM (n)−φFM (n− 1)

T · kFM=

φ′FM (n)kFM

=kFM · sN (n)

kFM= sN (n)

(3.12)It is equal to the original message signal sN . The system demodulates the two real FM signals inthe baseband.

The signal after the arcsine

h4 (n) = φFM (n)−φFM (n− 1) = φ′FM · T = kFM · sN (n) · T = kFM · sN (n) · 1

fA

must be limited between − π2 and π

2 to be clearly defined

max(

kFM · sN (n) · 1fA

)=∣∣∣∣ kFM · sN

fA

∣∣∣∣ <π

2

From Eq. 3.3 the maximal frequency deviation can be calculated for flawless demodulation.

kFM · sN = ∆F · 2 · π∆F · 2 · π

fA<

π

2

∆F <π

2· fA

2 · π <fA

4(3.13)

It shows that the maximal ∆F depends on the sampling rate. Therefore it is not limited, becausewith rise of ∆F also the bandwidth of the FM-Signal rises. Thus the sample rate has to be increased.

The delay demodulator needs the modulated signal to have a constant amplitude, therefore anamplitude normalization has to be done prior to the delay demodulator.

Amplitude normalization

The received FM signal due to distortion in the channel is not known. However the delay demod-ulator needs a constant amplitude which is achieved by normalizing the magnitude of the signal.This is done by dividing the complex signal (Eq. 3.8) by its absolute value.

sout =sbasis

|sbasis|=

a (n) · e jφFM(n)∣∣a (n) · e jφFM(n)∣∣ =

a (n) · e jφFM(n)

a (n)= e jφFM(n)

The same applies to the two real signals of Eq. 3.9 and Eq. 3.10 (see Figure 3.8).The output signals are

out (n) =sreal + jsimag∣∣sreal + jsimag

∣∣ =sreal + jsimag√

s2real + s2

imag

=sreal√

s2real + s2

imag

+ jsimag√

s2real + s2

imag

The result is a constant amplitude signal normalized to one.

3.3.2. Phase-Adapter Demodulator

The phase-adapter demodulator also needs a FM signal in the baseband as input signal (see Sec-tion 3.2.2). It works with real signal, so the input is sreal of Eq. 3.9 and simag of Eq. 3.10. Figure 3.9shows the block diagram. The equation for the output signal is:

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Theory

simag(n)

sreal(n) outreal(n)

outimag(n)

R

+

+

1•

2↑

2↑

Figure 3.8.: Real amplitude normalization

sreal(n)

simag(n)

arctansD(n)

Z-1

g(n) +

- FM

1T k⋅

Figure 3.9.: Phase-adapter demodulator

g (n) = arctan(

simag (n)sreal (n)

)= arctan

(sin (φFM (n))cos (φFM (n))

)= arctan (tan (φFM (n))) = φFM (n)

sD (n) =g (n)− g (n− 1)

T · kFM=

g′(n)kFM

= s(n) (3.14)

The output signal sD is equal to the original message sN . The system demodulates the FM signalin the baseband.

The signal after the arc tangent function g (n) = φFM (n) must be limited between − π2 and π

2 to beclearly defined. Assuming sinusoidal message signal, the following conditions can be derived:

|φFM (n)| < π

2

|φFM (n)| =∣∣∣∣ kFM · K

ωNsin(ωN · t)

∣∣∣∣ =kFM · K

ωN<

π

2

From Eq. 3.3the maximal frequency derivation can be determined.

kFM · sN = ∆F · 2 · π∆F · 2 · π2 · π · fN

=∆FfN

2

∆F <π · fN

2(3.15)

The maximum derivation ∆F depends on the frequency of the message. In the worst case, for verylow message frequencies, the maximal derivation will be very low and not practicable for mostapplications. Therefore this demodulator is only useful for narrowband FM.

Because of the limitation of φFM the problem of a division by zero is eliminated. This is becausethe signal sreal = cos (φFM) can only be zero for φFM = ± π

2 · i, where i is an odd integer.

12

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3.3. Algorithms for Digital FM Demodulation

3.3.3. Phase-Locked Loop

The Phase-Locked Loop (PLL) is a feedback loop. Besides digital demodulation, it is also used forcarrier and timing regeneration. Figure 3.10 shows the block diagram of a Phase-Locked Loop. FM

Phase Detector Loop Filter

VoltageControlledOscillator

sD(n)sFM(n)

Figure 3.10.: Phase-Locked Loop

modulation stores the information in the variation of frequency. The idea of a PLL is the following:With the help of the feedback loop, the controlled frequency should closely follow the referencefrequency. The controlled frequency in this case is the demodulated message sD(n), which shouldcorrespond to the original message sN(n). The reference is given by the modulated signal sFM(n),which indirectly represents the message sN(n). The Phase detector detects the phase differencebetween the modulated signal and the voltage controlled oscillator (VCO). This phase differenceis filtered by the loop filter that the message signal results.The actual realization of the PLL is shown in Figure 3.11. The function of the feedback loop will bediscussed now. The goal is to describe mathematically the assosiation between the reference signalsFM(n) and the controlled signal sFM(n). sFM(n) is:

sFM(n) = A · cos(ωT · n + kFM ·n−1

∑i=0

sN(i))

The PLL as shown in Figure 3.11 is a baseband PLL, so the FM-Siganl sFM(n) will be mixed to thebaseband prior to the demodulation (see Section 3.2.2). The upper signal path is:

A2· cos(kFM ·

n−1

∑i=0

sN(i))

and the lower is:A2· sin(kFM ·

n−1

∑i=0

sN(i))

Now the demodulated signal sD(n) can be written as:

sD(n) =

[A2· sin(kFM ·

n−1

∑i=0

sN(i)) · cos(kFM ·n−1

∑i=0

sD(i))− A2· cos(kFM ·

n−1

∑i=0

sN(i)) · sin(kFM ·n−1

∑i=0

sD(i))

]∗ g(n)

(3.16)

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Theory

QuadratureMixer + G

sin

I

cos

-1

VoltageControlledOscillator

Loop Filter

Phase Detector

sD(n)sFM(n)

kFM

Figure 3.11.: Actual realization Phase-Locked Loop

It’s difficult to discuss the equation above because of the convolution. Therefore a transformationto the Z-Domain would simplify the analysis, this is not possible because of the nonlinear loop.To get rid of the convolution, the transfer function of the filter G is reduced to a constant P. Theconvolution is now replaced by a multiplication. Further more the brackets can be simplified bythe sine rule:

sD(n) =A · P

2· sin(kFM ·

n−1

∑i=0

sN(i)− kFM ·n−1

∑i=0

sD(i)) =A · P

2· sin

(kFM ·

n−1

∑i=0

sN(i)− sD(i)

)(3.17)

The equation can be written as:

n−1

∑i=0

sN(i)−sD(i) =arcsin( sD(n)·2

A·P )kFM

(3.18)

The aim of the feedback loop is to make:

sN(n) = sD(n)

This can be achieved if the right hand side of Eq. 3.18 is equal to zero. To do so, the constant P orkFM needs to be big enough. The PLL can be described by the equation:

n−1

∑i=0

kFM·sN(i)− kFM · sD(i) = 0

To fulfil the equation the PLL needs to control to:

sD(n) = sN(n)

14

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3.3. Algorithms for Digital FM Demodulation

Like described above the filter G was reduced to a constant P to demodulate the FM signal. ThePLL is a nonlinear system. Nonlinear Systems have the characteristic to produce non harmonicfrequencies. These frequencies are undesirable because they cause a distortion. One way to reducethis is by adding a filter to the loop based on the specification of the message signal. However thesimulation showed that it makes the result even worse.

3.3.4. Mixed Demodulator

The mixed demodulator is a combination of the delay demodulator and the phase adapter Demod-ulator. That way, some of the disadvantages can be removed. Figure 3.12 shows the block diagram

Z-1

Z-1

sreal(n)

simag(n)

+

-

arctansD(n)g1(n)

sreal(n-1)

scos(n)

ssin(n)

+

+simag(n-1)

g2(n)FM

1T k⋅

Figure 3.12.: Mixed demodulator

of the mixed demodulator. The input signals are the two real signals sreal and simag after the mixingEq. 3.9 and Eq. 3.10. From Eq. 3.2 the output signal can be written as:

ssin (n) = simag (n) · sreal (n− 1)− sreal (n) · simag (n− 1)= sin (φFM (n)) · cos (φFM (n− 1))− cos (φFM (n)) · sin (φFM (n− 1))

= sin (φFM (n)−φFM (n− 1))

scos (n) = sreal (n) · sreal (n− 1) + simag (n) · simag (n− 1)= cos (φFM (n)) · cos (φFM (n− 1)) + sin (φFM (n)) · sin (φFM (n− 1))

= cos (φFM (n)−φFM (n− 1))

g1 (n) =ssin(n)scos(n)

=sin (φFM (n)−φFM (n− 1))cos (φFM (n)−φFM (n− 1))

= tan (φFM (n)−φFM (n− 1))

g2 (n) = arctan (g1 (n)) = φFM (n)−φFM (n− 1)

sD (n) =g2 (n)T · kFM

=φFM (n)−φFM (n− 1)

T · kFM=

φ′FM (n)kFM

= sN (n) (3.19)

15

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Theory

The mixed demodulator demodulates the FM signals in the baseband.

Similarly the signal after the arc tangent g2 (n) needs to be limited between − π2 and π

2 . Thereforethe same conclusions for the ∆F as in the the delay demodulator can be made (refer to Eq. 3.13).∆F depends only on the sampling rate.

Because of the limitation of the signal g2 (n) the problem of a division by zero does not exist.The signal

scos (n) = cos (φFM (n)−φFM (n− 1)) = cos (g2 (n))

can be zero only when φFM = ± π2 · i, where i is an odd integer. To avoid a division by zero, the

output of the delay z−1 for the first sample needs to be initialized to a non-zero number.

16

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4. Simulation

All the algorithms introduced in Section 3.3 will be simulated and evaluated by using SIMULINK r

(Dynamic Systems for MATLAB r) models.In this chapter, constants and parameters will be chosen. One parameter is kFM which is deter-mined by the signal specification. It can be calculated with Eq. 3.4 and the given bandwidth bFM:

bFM = 2 ·(∆F + fg

)= 2 ·

(s·kFM

2π+ fg

)s · kFM = 2π

(bFM

2 − fg

)kFM =

s

(bFM

2− fg

)=

1

(12500

2− 3400

)= 2π · 2850 ≈ 18000 (4.1)

To test the correctness of the algorithms, an ideal model was created for each algorithm. A DSPmodel was also created for each one of them, to cover the real time performance of the implemen-tation on hardware. To evaluate the robustness of the algorithms, Gaussian noise is added to thechannel in the model.The next section covers some of the knowledge, which apply to all algorithms and are mentionedhere not to repeat them each time.

4.1. General Knowledge from Simulations

4.1.1. Ideal Model

To make a statement about the quality of the signal, the harmonic distortion k was measured. InAppendix C.1 the procedure of measuring the harmonic distortion is explained. With the help ofthe Chirpsignal block of Simulink, a statement about the frequency response is possible. It showsthat for a rising kFM the signal quality sinks. This effect isn’t caused by the algorithm, it appearsas a result of the aliasing of the spectrum. The FM signal is in principle not bandlimited. Thebandwidth based on Carson includes only 90 % of the energy of the signal. So the aliasing appearswith a higher kFM after the subsampling.

4.1.2. DSP Model

There are fixed-point or floating-point DSP-Boards. The representable range of a 32bit fixed-pointnumber is about [

−216

2... +

216 − 12

]The range of a floating-point representation is

±[10−38...1038]

Floating-point numbers are more complex and so they need more processing time than fixed-pointnumbers. The simulations are made for fixed-points. This has the advantage of speed but also

17

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Simulation

possesses some disadvantages. The number range is smaller and a quantization error is present.Also overflows can occur. For these reasons Quantizer and Saturation blocks were added to themodels. Figure 4.1 shows these blocks and Table 4.1 and Table 4.2 show the parameters of these

Quantizer Saturation

Figure 4.1.: Quantizer and saturation blocks in Simulink

blocks.

Table 4.1.: Parameter quantizerQuantization interval q

Table 4.2.: Parameter saturationUpper limit GOLower limit GU

There are two common ways to define the quantization interval q and the limits GO, GU . Onepossible set is :

q = 1

GO =216 − 1

2

GU = −216 − 12

the other is:

q =2

216 − 1GO = 1

GU = −1

For the simulation the second way, which is often called the Q format, was chosen.

The quantization can also be interpreted by adding Gaussian noise to the signal. For that reasonit makes sense to filter the demodulated signal sD(n) with a bandpass at the end. This bandpassneeds a pass band from 100Hz to 4000Hz, this bandwidth covers the specification of the messagesignal with a little reserve. The filter was designed as butterworth filter as followed:

Type ButterworthOrder 6Lower fg 100HzUpper fg 4000Hz

18

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4.2. Algorithms for Signal Pretreatment

To make a statement about the quality of the demodulated signal, the SINAD was measured bythe DSP model. Appendix C.1 explains the exact procedure of the measurement.

4.1.3. DSP Model with Gaussian Noise

To simulate a interference channel a Gaussian noise was added to the modulated signal. Even thisis a very simple model, some good statements about the robustness of the algorithm can be made.The Signal to Noise Ratio (S/N) was measured at the demodulated signal. The power of the noisewas set, so the S/N ratio of the modulated signal is 10dB. The exact procedure of the measurementis explained in Appendix C.2. The S/N gets better with a rising kFM, this is due to the biggerspectrum spreading. Therefore a compromise between a big kFM for a good S/N and a small kFMfor a better signal quality has to be determined. A good kFM value is provided by Eq. 3.4 which isneeded for calculating the Carson bandwidth.

4.2. Algorithms for Signal Pretreatment

4.2.1. FM Modulator

To do the simulation, a FM Modulator block was created in Simulink. Figure 4.2 shows the block

s

Real (Cos)

Imag (Sin)

QuadraturMischer

Quad Mischer

sN sFMFMModulator

FM Modulator

sReal

sImag

sDBasisband

Verzögerungs-Demodulator

Basisband Verzögerungsdemodulator

In1

In2

Out1

Out2

ReelerAmplituden

Normalisierer

Amplituden Normalisierer

Figure 4.2.: Simulinkblock FMmodulator

=⇒

1sFM

wt

12:34

t

cos

cos

w

Trägerfrequenz

k

Modulationskonst.

Tz-1

Integrator

1sN

Figure 4.3.: Simulink model FM modulators

of the FM Modulator and Figure 4.3 shows the complete model. Table 4.3 shows the parameters ofthe block.

Table 4.3.: Parameter FM modulatorFM Constant FM modulation constant kFMSample Time sec Sample time of the simulationCarrier Frequency rad/sec Carrier frequency of FM signals

4.2.2. Subsampling

Figure 4.4 shows the structure of the subsampling model. The simulation works with two differentfrequencies fH und fA. fA is the sampling rate which can be calculated according to Eq. 3.6

fT − b2

b=

10700000− 125002

12500= 855.5 ⇒ λ = 854

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Simulation

Zero-OrderHold1

Zero-OrderHold

nsignal2

To Workspace7

fmsignal2

To Workspace6

fmsignalH

To Workspace5

nsignal

To Workspace4

fmsignalA

To Workspace3

tvecH

To Workspace2

tvecA

To Workspace1

Sine Wave2 300

Sine Wave 300

sN sFMFM

Modulator

FM Modulator 2

sN sFMFM

Modulator

FM Modulator 1

12:34

Digital Clock

sN

sN

Figure 4.4.: Simulink model subsampling

fA =4 fT

2λ + 1=

4 · 107000002 · 854 + 1

= 25043.89Hz

The second frequency fH is used to simulate the continues, analog system which will be subsam-peled, and fulfils the sampling theorem for the modulated signal. It also has to be a multiple of fAto run the simulation. All this results in

fH = 855 · fA = 21412521.94Hz

The FM Modulator 1 modulates the message to a carrier frequency of 10.7Mhz. This signal isonce connected straight to output fmsignalH and once subsampled with fA and connected to out-put fmsignalA . The same message is modulated with FM Modulator 2 to a carrier frequencyof fA

4 and connected to output fmsignal2 .

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

x 107

0

0.1

0.2

0.3

0.4

f

fmsignalH

1.0695 1.07 1.0705 1.071 1.0715

x 107

0

0.1

0.2

0.3

0.4

f

fmsignalH ZOOM

0 0.5 1 1.5 2 2.5

x 104

0

0.1

0.2

0.3

0.4

f

fmsignalA

a)

b)

c)

Figure 4.5.: Plot 1 subsampling

0 0.5 1 1.5 2 2.5 3

x 104

0

0.05

0.1

0.15

0.2

f

fmsignalA

0 0.5 1 1.5 2 2.5 3

x 104

0

0.05

0.1

0.15

0.2

f

fmsignal2

0 0.5 1 1.5 2 2.5 3

x 104

-4

-2

0

2

4x 10-3

f

e

a)

b)

c)

Figure 4.6.: Plot 2 subsampling

Figure 4.5 shows the plot of the simulation with kFM = 10. A small spectrum for the FM-Signalresults. The spectrum of the subsampled signal fmsignalA is compared to the original spectrumfmsignalH . Figure 4.5 (a) shows the original spectrum over the entire frequency band from DCto fH , (b) shows the spectrum of the same signal just for the frequencies from 854 · fA to 855 · fA,

20

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4.2. Algorithms for Signal Pretreatment

this is the part that is shifted by subsampling. (c) shows the spectrum of the subsampled signal.It shows that the FM signal has a carrier of fA

4 . Furthermore it shows that b) is shifted to c) asdescribed in Section 3.2.1.Figure 4.6 shows the plot of the simulation with kFM = 18000, which results in a wide spectrum.The spectrum of the subsampled signal fmsignalA is compared to the spectrum of the signalwhich was modulated direct to a carrier of fA

4 . Figure 4.6 (a) shows the spectrum of the subsampledsignal, (b) the spectrum of the direct modulated signal and (c) the error signal e given by:

e = fft (fmsignal2)−fft (fmsignalA)

The simulation result shows that the two spectrums are nearly identical. Hence, in subsequentsimulations, the subsampling will be left out and the message will be modulated directly by acarrier of a quarter of the sampling rate.

4.2.3. Quadrature-Mixer

s

Real (Cos)

Imag (Sin)

QuadraturMischer

Quad Mischer

sN sFMFMModulator

FM Modulator

In1

In2

Out1

Out2

ReelerAmplituden

Normalisierer

Amplituden Normalisierer

Figure 4.7.: Simulinkblockquadrature-mixer

=⇒2

Imag (Sin)

1Real (Cos)

b(z)a(z)

Tiefpass R

b(z)a(z)

Tiefpass I

Sin

Negierer

M R

M I

-1

Konstante

Cos1s

Figure 4.8.: Simulink model quadrature-mixer

Figure 4.7 shows the block of the Quadrature-Mixer and Figure 4.8 shows the complete subsystemmodel. Table 4.4 shows the parameters of the blocks. The two low-pass filters have butterworth

Table 4.4.: Parameter quadrature-mixerFilter Order Order of low-pass filter I low-pass filter RSample Time sec Sample time of the simulationEdge Frequency Hz Edge Frequency of low-pass filter I low-pass filter RCarrier Frequency rad/sec The carrier frequency of the FM signals

response low-passes and are calculated by MATLAB [b,a]=butter(ordnung,2*f*T). f is the cutoff fre-quency and T the sample time. Figure 4.9 shows the spectrum of the input signal sFM and the twooutput signal sreal and simag with the following parameters.

Filter Order 10Sample Time 40µsEdge Frequency 6250HzCarrier Frequency 2 · π · 6250rad/sec

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Simulation

0 0.5 1 1.5 2 2.5

x 104

0

0.05

0.1

0.15

0.2

f

|A|

fmsignal

0 0.5 1 1.5 2 2.5

x 104

0

0.05

0.1

0.15

0.2sreal

0 0.5 1 1.5 2 2.5

x 104

0

0.05

0.1

0.15

0.2simag

Figure 4.9.: Plot quadrature-mixer

4.3. Baseband Delay Demodulator

4.3.1. Ideal Model

Figure 4.10 shows the Simulink model of the ideal baseband delay demodulator. Figure E.4 inthe Appendix shows the layout for the simulation. Table 4.5 shows the harmonic distortion factor

1sD

asin

arkussinus

Product1

Product

1/(s*K)

Normierung auf 1

z-1

Delay1

z-1

Delay

In1

In2

Out1

Out2

ReelerAmplituden

Normalisierer

Amplituden Normalisierer

2sImag

1sReal

sRealNV

sImagNV

sRealN

SImagN

Figure 4.10.: Simulink model baseband delay demodulator

k measured with various kFM and various frequencies of a harmonic sinusoidal message signal.With Eq. 3.13 the maximal ∆F and the maximal kFM can be calculated.

kFM =2 · π · fA

4s=

π · fA

2= 39′270

This kFM can never be reached due to the bandwidth. The increase in the harmonic distortion withrising kFM and rising frequency is caused by the increasing bandwidth, which results in aliasing.Figures 4.11 and 4.12 show (a) the spectrum of the input signal insignal , (b) the spectrum of theoutput signal outsignal and (c) a time slot of the input and the output signal. The input signalis a sinusoidal with a frequency of 2000 Hz. In Figure 4.11, kFM was set to 180 and in Figure 4.12it was set to 18000. It shows that a low-pass filter with a 3dB cutoff frequency fg ≈ 4000Hz at theoutput would improve the signal quality for higher kFM.To make statement about the frequency response of the signal a chirp signal from 300 to 3400 Hzwas applied. Figure 4.13 shows (a) the spectrum of the input signal and (b) to (e) the spectra ofthe output signal with various kFM. Therefore, that with a higher kFM and a high frequency theresponse degrades. This is again because of the aliasing.

22

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4.3. Baseband Delay Demodulator

Table 4.5.: Harmonic distortion of the ideal delay demodulatorkFM fN k18 300 0.000180 300 0.0001800 300 0.00018000 300 0.01218 2000 0.000180 2000 0.0001800 2000 0.00318000 2000 0.21518 3400 0.000180 3400 0.0001800 3400 0.00618000 3400 0.355

0 0.5 1 1.5 2 2.5 3

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT insignal

0 0.5 1 1.5 2 2.5 3

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT outsignal

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

A

insignaloutsignal

c)

b)

a)

Figure 4.11.: Plot of delay demodulatorideal with kFM = 180

0 0.5 1 1.5 2 2.5 3

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT insignal

0 0.5 1 1.5 2 2.5 3

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT outsignal

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

A

insignaloutsignal

a)

b)

c)

Figure 4.12.: Plot of delay demodulatorideal with kFM = 18000

300 34000

a) Insignal

300 34000

b) kFM=18

300 34000

c) kFM=180

300 34000

d) kFM=1800

300 34000

e) kFM=18000

Figure 4.13.: Spectrum of the chirp signal from a ideal delay demodulator

23

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Simulation

4.3.2. DSP Model

Figure E.2 in the Appendix shows the layout of the DSP simulation model. As described above,quantizer and saturation blocks were added. Also the cosine block was replaced by a lookup tablewith interpolation.The SINAD was measured for various frequencies with a constant kFM = 18000. Table 4.6 showsthe results with and without a bandpass filter at the output.

Table 4.6.: SINAD delay demodulator DSP modelfN k (without filter) k (with filter)300 0.018 0.0152000 0.218 0.0113400 0.288 0.085

Again a chirp signal from 300 to 3400 Hz was applied to the input. Figure 4.14 shows (a) thespectrum of the input signal and (b) the spectrum of the output signal with a kFM of 18000.

300 34000

a) Insignal

300 34000

b) Outsignal

Figure 4.14.: Spectrum of chirp signal for delay demodulator DSP model

In the DSP model of the Delaydemodulator, a lower limit for ∆F or rather kFM has to be set. Thisis because of the subtraction in the derivation. If the slope of the signal is small, the result of thesubstraction (div) is very small compared to the quantization interval q.

div = φFM (n)−φFM (n− 1)

Hence, the signal quality degrades, since div can not be quantized sufficiently. With a bigger kFM,the slope rises and so does div. The factor 1

T·kFMcan be interpreted as a metric for the degradation

of the signal quality. A factor of unit would be the ideal. This means, with a given sample rate thekFM should be equal to it. This is not possible because of the limitation in the bandwidth, but canbe achieved approximately.Another approach to enlarge div is to delay for k samples z−k instead of just delay for one samplez−1. This approach didn’t lead to a usable solution, because the output signal was deformed by asin(x)

x function. This can be shown as followed. The transfer function of the integrator is

z−1 · T1− z−1

24

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4.4. Phase-Adapter Demodulator

multiplied with the transfer function of the one sample delayed derivative is

z−1 · T1− z−1 ·

1− z−1

T= z−1

The result is only a delay of one sample.Now the integrator is multiplied with the k sample delayed derivative

z−1 · T1− z−1 ·

1− z−k

T=

z−1 ·(1− z−k

)1− z−1

The z−1 is only a delay. The rest is1− z−k

1− z−1

This transfer function transformed to the time domain is a rectangle with the length k. Therefore adeformation of the spectrum with a sin(x)

x results.

4.3.3. DSP Model with Gaussian Noise

Figure E.2 in the Appendix shows the layout of the simulation with gaussian noise.Table 4.7 shows the signal to noise ratio (S/N) of the output signal. The power of the added noisewas set, so the S/N ratio of the modulated signal is 10dB.

Table 4.7.: S/N delay demodulator DSP modelfN S/N [dB] S/N [dB] S/N [dB] S/N [dB]

kFM = 9000 kFM = 12000 kFM = 15000 kFM = 18000300 7.84 10.41 12.56 14.311000 7.69 10.36 12.31 13.942000 7.74 10.38 12.22 13.483400 6.99 8.99 10.13 10.68

It shows, that with a rising frequency the S/N degrades This is because of the slight damping bythe higher frequencies (see Figure 4.13), which lowers the power of the signal. Due to the smallerspreading of the FM spectrum, the sinking ratio with a smaller kFM can be seen clearly.Figure 4.15 shows the input signal of the demodulator with a sinusoidal signal of 300 Hz. Fig-ure 4.16 shows a) the output signal in the same scale as the noise signal and b) the noise signalwhich was added. It shows that the noise was deformed and is rising with higher frequencies.This effect is due to the derivation, because higher frequencies are weighted more.

4.4. Phase-Adapter Demodulator

4.4.1. Ideal Model

Figure 4.17 shows the Simulink model of the ideal phase-adapter demodulator. Figure E.4 in theAppendix shows the layout for the simulation.Table 4.8 shows the harmonic distortion factor k measured for various kFM and frequencies of asinusoidal message signal. Using Eq. 3.15 the maximal ∆F and the maximal kFM can be calculated.

kFM =π2 · fN

s= π2 · fN

25

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Simulation

0 0.5 1 1.5 2 2.5

x 104

0

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

f

|A|

FFT fmUnoise

Figure 4.15.: Plot FM signalwith noise

0 0.5 1 1.5 2 2.5

x 104

0

0.002

0.004

0.006

0.008

0.01

f

|A|

outsignal

0 0.5 1 1.5 2 2.5

x 104

0

0.002

0.004

0.006

0.008

0.01

f

|A|

noise

a)

b)

Figure 4.16.: Plot noise and output signal with noise

1sD

1/(s*k)

Normierung auf 1Divison

z-1

Delay

atan

Arkustangens

2sImag

1sReal

Figure 4.17.: Simulink model phase-adapter demodulator ideal

Table 4.8.: Harmonic distortion phase-adapter demodulatorkFM max(kFM) fN k18 1480 300 0.000180 1480 300 0.0001800 1480 300 0.99818000 1480 300 1.00018 9870 2000 0.000180 9870 2000 0.0001800 9870 2000 0.00318000 9870 2000 0.98418 16780 3400 0.000180 16780 3400 0.0001800 16780 3400 0.00618000 16780 3400 0.977

This equation is just valid for an ideal mathematical integrator, and so the sinusoidal signal wouldresult in a cosine signal. The integrator of the FM Modulator has an initial condition of zero andso the integrated signal has an offset. Hence, kFM has to be divided by two so that it is still limited

26

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4.5. Phase-Locked Loop

between − π2 to π

2 after the arc tangent.

kFM =π2 · fN

2

As soon as this value is exceeded, the harmonic distortions raise above one and the demodulatorcan not be used anymore. Figures 4.18 and Figure 4.19 illustrate this. In both situations a sinusoidalsignal of 2000 Hz was modulated and demodulated. One with kFM = 180 and another withkFM = 18000.In both figures (a) shows the spectrum of the input signal and (b) shows the outputsignal, and (c) shows a time slot with input and output signals. This confirms the statement that

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT insignal

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT outsignal

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

A

insignaloutsignal

a)

b)

c)

Figure 4.18.: Plot phasea-adapter demod-ulator with kFM = 180

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT insignal

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT outsignal

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

A

insignaloutsignal

a)

b)

c)

Figure 4.19.: Plot phase-adapter demodu-lator with kFM = 18000

the Phase-Adapter-Demodulator is only useful for narrowband FM. Therefore it does not meet thespecifications and will not be discussed further.

4.5. Phase-Locked Loop

The loop gain P is the only unknown to be determined. In Section 3.3.3 it was described for smallkFM the loop gain P has to be set as big as possible. In this chapter kFM was set to 18000 due to theCarson bandwidth. Criteria Eq. 3.18, which discusses the error e(n) between sN(n) and sD(n), isreviewed here.

e(n) = sN(n)− sD(n)

n−1

∑i=0

sN(i)−sD(i) =arcsin( sD(n)·2

A·P )kFM

The best way to undo the summation on the left hand side is to change the expression to the Z-domain. In general:

a(n) =n−1∑

i=0b(n) ↔ A(z) = z

z−1 · B(z)

B(z) = z−1z · A(z) ↔ b(n) = a(n)− a(n− 1)

Substituted then into Eq. 3.18:

e(n) = sN(n)− sD(n) =arcsin( sD(n)·2

A·P )kFM

−arcsin( sD(n−1)·2

A·P )kFM

27

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Simulation

The result of the arc tangent is between −π/2 and π/2. So the maximal error e(n) is:

|e(n)max| =π

kFM= 1.7453 · 10−4

Due to the normalization to one, the error is 0.017453 % of the signal amplitude. There is still thequestion of an appropriate loop gain P. It can be calculated with the help of Eq. 3.17:

sD(n) =A · P

2· sin(kFM ·

n−1

∑i=0

sN(i)− kFM ·n−1

∑i=0

sD(i)) =A · P

2· sin(

n−1

∑i=0

kFM·sN(i)− kFM · sD(i))

|sD(n)max| =A · P

2= 1

Because of the normalization, A and K (see Section 3.1) and the maximal value of sD(n) are equalto one. Thus P is

P = 2

But there is a problem here. The amplitude of the sinusoidal signal in Eq. 3.17 is exactly one onlyif the following condition is true:

∆F =kFM

2 · π = ωN (4.2)

This condition is analyzed in the time domain. The outputs of the mixer are:

A2· cos(kFM ·

∫sN(ωN · t) · dt) =

A2· cos(

kFM

ωN· SN(ωN · t)) (4.3)

andA2· sin(kFM ·

∫sN(ωN · t) · dt) =

A2· sin(

kFM

ωN· SN(ωN · t)) (4.4)

SN(ωN · t) is the antiderivative of sN(ωN · t) and ωN is the momentary frequency. So Eq. 4.2 canbe written as:

kFM = 2 · π ·ωN

Substitute the result in the Eq. 4.3 and Eq. 4.4

A2· cos(2 · π · SN(ωN · t))

andA2· sin(2 · π · SN(ωN · t))

It shows that in this case the argument of the cosine or the sine is between zero and 2 · π . If therange of the argument is smaller, the amplitude of the sine function in Eq. 3.17 is smaller than one.So the chosen loop gain of P = 2 is not sufficient to amplify the amplitude of the demodulatedsignal to one. In this case the demodulated signal is just proportional but not equal to the originalmessage.

4.5.1. Ideal Model

Figure E.5 in the Appendix shows the layout of the ideal simulation model in Simulink. Table 4.9shows the harmonic distortion factor k of the demodulated signal for various frequencies and kFMof a sinusoidal message.Figure 4.20 and Figure 4.21 confirm the measurements of the harmonic distortion. a) shows thespectrum of the message sN(n). It is a sinusoidal signal with a frequency of fN = 2000Hz. (b)

28

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4.5. Phase-Locked Loop

Table 4.9.: Harmonic distortion PLLkFM fN k18 300 0.167180 300 0.0021800 300 0.02218000 300 0.04618 2000 0.162180 2000 0.0021800 2000 0.00018000 2000 0.14418 3400 0.152180 3400 0.0021800 3400 0.00318000 3400 0.254

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT t1

0 0.5 1 1.5 2 2.5

x 104

0

0.02

0.04

0.06

0.08

f

|A|

FFT t2

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

|A|

t1t2

a)

b)

c)

Figure 4.20.: Plot PLL ideal with kFM =1800

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT t1

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT t2

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

|A|

t1t2

a)

b)

c)

Figure 4.21.: Plot PLL ideal with kFM =18000

shows the spectrum of the demodulated signal sD(n) ,and (c) shows a time slot of sN(n) and sD(n).In Figure 4.21 (b) the harmonic distortion is worsen at frequencies over 5000 Hz. Figure 4.22 shows(a) the spectrum of the message signal and (b), (c), and (d) the spectra of the demodulated signalsfor various kFM. The message signal is a chirp signal from fN = 300Hz to fN = 3400Hz.

4.5.2. DSP Model

Figure E.6 in the Appendix shows the layout of the DSP simulation. As mentioned earlier quan-tizer and saturation blocks were added. Table 4.10 shows the results of the SINAD measurements.It was measured with and without a bandpass filter at the output. The filter improves the qualityof the demodulated signal.Figures 4.23 to 4.27 illustrate the measurements of the SINAD. The same problem with additionalhigh frequencies generated by a higher kFM appears. This problem is reduced by the filter. Fig-ure 4.27 shows the demodulated signal sD(n) with a bandpass in the feedback loop. Figure 4.27(b) shows that a lot of additional frequencies appear. Hence a filter in the loop doesn’t bring anybenefits. On contrary it worsens the quality.

29

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Simulation

300 34000

a) Insignal

f

|A|

300 34000

b) kFM=180

f

|A|

300 34000

c) kFM=1800

f

|A|

300 34000

d) kFM=18000

f

|A|

Figure 4.22.: Spectrum of the chirp signal for the ideal PLL

Table 4.10.: SINAD PLLkFM fN k with filter k without filter18 300 0.018 0.168180 300 0.018 0.0211800 300 0.025 0.03618000 300 0.088 0.19818 2000 0.041 0.195180 2000 0.043 0.1141800 2000 0.042 0.11518000 2000 0.080 0.24718 3400 0.076 0.218180 3400 0.078 0.1861800 3400 0.078 0.18618000 3400 0.080 0.396

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT t1

0 0.5 1 1.5 2 2.5

x 104

0

0.02

0.04

0.06

0.08

f

|A|

FFT t2

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

|A|

t1t2

a)

b)

c)

Figure 4.23.: PLL DSP kFM = 1800, withbandpass filter

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT t1

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT t2

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

|A|

t1t2

a)

b)

c)

Figure 4.24.: PLL DSP kFM = 18000,with bandpass filter

4.5.3. DSP Model with Gaussian Noise

Table 4.11 shows the S/N ratios of the PLL with various kFM. It was stated above that a bettersignal quality is achieved with a smaller kFM, the degradation wasn’t serious though. This model

30

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4.6. Mixed Demodulator

0 0.5 1 1.5 2 2.5

x 104

0

0.5

1

f

|A|

FFT t1

0 0.5 1 1.5 2 2.5

x 104

0

0.02

0.04

0.06

0.08

f

|A|

FFT t2

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

|A|

t1t2

a)

b)

c)

Figure 4.25.: PLL DSP kFM = 1800,without bandpass filter

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT t1

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT t2

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

|A|

t1t2

a)

b)

c)

Figure 4.26.: PLL DSP kFM = 18000,without bandpass filter

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT t1

0 0.5 1 1.5 2 2.5

x 104

0

0.05

0.1

0.15

0.2

f

|A|

FFT t2

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

|A|

t1t2

a)

b)

c)

Figure 4.27.: PLL DSP kFM = 18000, with the bandpass filter in the feedback loop

Table 4.11.: S/N PLLfN S/N [dB] S/N [dB] S/N [dB] S/N [dB]

kFM = 9000 kFM = 12000 kFM = 15000 kFM = 18000300 11.90 10.39 8.754 7.451000 10.71 11.73 12.29 12.022000 8.22 10.24 11.66 12.623400 5.23 7.70 9.44 10.59

shows that with a bigger kFM, an improvement in the S/N ratio can be achieved. The specifiedkFM = 18000 will achieve the best results.

4.6. Mixed Demodulator

4.6.1. Ideal Model

Figure 4.28 shows the Simulink model of the Mix Demodulator. Figure E.4 in the Appendix showsthe layout of the Simulink simulation.Table 4.12 shows the harmonic distortion factor k, measured for various kFM and various frequen-

31

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Simulation

1sD

Product3

Product2

Product1

Product

1/(T*K)

Normierungauf 1

Divisionz-1

Delay1

z-1

Delay

atan

Arkustangens

2sImag

1sReal

sRealNVsRealNV

sImagNV

sImagNV

sImagNV

Figure 4.28.: Simulink model mixed demodulator ideal

cies of a sinusoidal message signal.

Table 4.12.: Harmonic distortion factor mixed demodulator idealkFM fN k18 300 0.000180 300 0.0001800 300 0.00018000 300 0.01218 2000 0.000180 2000 0.0001800 2000 0.00318000 2000 0.21718 3400 0.000180 3400 0.0001800 3400 0.00618000 3400 0.353

Like the delay demodulator the maximal ∆F can be calculated by Eq. 3.13. From which the maxi-mal kFM can be determined.

kFM =2 · π · fA

4s=

π · fA

2= 39′270

Due to the bandwidth limitation,this kFM is not reachable. The degradation of the harmonic dis-tortion with rising kFM and higher frequencies is again the result of the starting aliasing.Figure 4.29 and Figure 4.30 show (a) the spectrum of the input signal insignal , (b) the spectrumof the output signal outsignal and (c) a time slot of the input and output signals. The inputsignal is a sinusoidal signal with a frequency of 2000 Hz. In Figure 4.29, a kFM of 180 was applied.In Figure 4.30 the kFM is 18000. It shows again that a low-pass filter with fg ≈ 4000Hz at the outputcould improve the signal quality under a high kFM.Again a chirp signal from 300 to 3400 Hz was applied to the input. Figure 4.31 shows (a) thespectrum of the input signal and (b) to (e) the spectra of the output signals with various kFM. It canbe seen that the signal transmission worsens with higher frequencies, again because of the aliasing.

32

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4.6. Mixed Demodulator

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT insignal

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT outsignal

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

A

insignaloutsignal

a)

b)

c)

Figure 4.29.: Plot of ideal mixed demodu-lator with kFM = 180

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT insignal

0 0.5 1 1.5 2 2.5

x 104

0

0.2

0.4

0.6

0.8

f

|A|

FFT outsignal

0.01 0.0105 0.011 0.0115 0.012 0.0125 0.013 0.0135 0.014 0.0145 0.015

-1

0

1

t

A

insignaloutsignal

a)

b)

c)

Figure 4.30.: Plot of ideal mixed demodu-lator with kFM = 18000

300 34000

a) Insignal

300 34000

b) kFM=18

300 34000

c) kFM=180

300 34000

d) kFM=1800

300 34000

e) kFM=18000

Figure 4.31.: Spectrum of the chirp signal for an ideal mixed demodulator

4.6.2. DSP Model

Figure E.9 in the Appendix shows the layout of the Simulink simulation. As mentioned before,quantizer and saturation blocks were added. In addition the arc tangent block was replaced by alookup table with interpolation.The SINAD was measured again for various frequencies and a constant kFM = 18000. Table 4.13shows the results with and without a bandpass filter at the output.

Table 4.13.: SINAD DSP mixed demodulatorfN k (without filter) k (with filter)300 0.013 0.0122000 0.216 0.0083400 0.286 0.087

Again a chirp signal from 300 to 3400 Hz was applied to input. Figure 4.32 shows (a) the spectrumof the input signal and (b) the spectrum of the output signal with a kFM of 18000.For the mixed demodulator, the lower limit for kFM is given as by the delay demodulator describedin Section 4.3.2.

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Simulation

300 34000

a) Insignal

300 34000

b) Outsignal

Figure 4.32.: Spectrum of the chirp signal for DSP mixed demodulator

4.6.3. DSP Model with Gaussian Noise

Figure E.9 in the Appendix shows the layout for the Simulink simulation of the DSP model withgaussian noise.Table 4.14 shows the S/N ratio at the output of the demodulator. The power of the added noisewas set, so the S/N ratio of the modulated signal is 10dB.

Table 4.14.: S/N DSP Mix DemodulatorfN S/N [dB] S/N [dB] S/N [dB] S/N [dB]

kFM = 9000 kFM = 12000 kFM = 15000 kFM = 18000300 7.83 10.41 12.44 13.711000 7.70 10.33 12.24 13.432000 7.77 10.39 12.10 12.643400 6.97 8.81 9.41 8.40

Figure 4.33 shows the noisy FM signal, which is applied to the demodulator. The message is asinusoidal signal with a frequency of fN = 300Hz. Figure 4.34 shows (a) the noise signal whichwas added, (b) the output signal with the same scale as the noise. The deformation of the noisedue to the derivation was observed evidently.

4.7. Comparison of the Algorithms

In this section the algorithms will be compared to each other concerning signal quality, robustness,computing power and storage utilization. The phase-adapter demodulator will not be included inthe comparison, because it does not meet the specifications.

4.7.1. Signal Quality

The comparison regarding the signal quality is done on the basis of the harmonic distortion andSINAD. The delay demodulator and the mixed demodulator show nearly identical values for theideal and the DSP models, due to their similarity. The harmonic distortion rises with rising fre-quencies or rising kFM, which is, due to rising bandwidth and aliasing. The PLL also shows a

34

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4.7. Comparison of the Algorithms

0 0.5 1 1.5 2 2.5

x 104

0

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

f

|A|

FFT fmUnoise

Figure 4.33.: Plot of FM sig-nal with noise

0 0.5 1 1.5 2 2.5

x 104

0

0.002

0.004

0.006

0.008

0.01

f

|A|

outsignal

0 0.5 1 1.5 2 2.5

x 104

0

0.002

0.004

0.006

0.008

0.01

f

|A|

noise

a)

b)

Figure 4.34.: Plot of the noise and the output signal

similar behavior, with a small difference that the harmonic distortion is rising for a very small kFM.In general, the values of k for all the algorithms are fairly close.

Harmonic Distortion

0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0 1000 2000 3000 4000f [Hz]

k

Delay Dem. PLLMixed Dem.

Figure 4.35.: Comparison of the harmonic distortion for ideal models of different algorithms with constantkFM of 18000 and variable frequency

Another performance characteristic can be compared by applying a chirp signal. Again the delaydemodulator and the mixed demodulator show nearly the same behavior. The PLL has a slightlyworse frequency response.

4.7.2. Robustness

The robustness measure gives the information on how the demodulator acts with noise on thechannel. The signal to noise ratio (S/N) of the demodulated signal provides an insight into therobustness. Therefore, a Gaussian noise was added to the FM-Signal before applying to the de-modulator and the ratio was measured at the output. In this measurement the delay demodulator

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Simulation

Harmonic Distortion

0

0.05

0.1

0.15

0.2

0.25

0 5000 10000 15000 20000k FM

k

Delay Dem. PLLMixed Dem.

Figure 4.36.: Comparison of harmonic distortion for ideal models of different algorithms with constant fre-quency of 2000Hz and variable kFM

SINAD

00.010.020.030.040.050.060.070.080.09

0.1

0 1000 2000 3000 4000f [Hz]

SIN

AD Delay Dem.

PLLMixed Dem.

Figure 4.37.: Comparison of SINAD for DSP models of different algorithms with constant kFM of 18000 andvariable frequency

and the mixed demodulator show a similar behavior, with a slightly better result obtained by thedelay demodulator. The S/N drops in both demodulators with an sinking kFM owing to sinkingfrequency spreading. With higher frequencies, the ratio sinks a little, because of the sinking fre-quency response at high frequencies. The PLL shows a different behavior for low frequencies. Theratio sinks not just for high frequencies but also for the low ones.

4.7.3. Computing Power and Storage Utilization

In this section no absolute values will be determined. Just a cross comparison is done.All the algorithms need a mixer so this block will be left out for the comparison. First the delay de-modulator and the mixed demodulator will be compared. They both use about the same amountof additions and multiplications. Both of them need a division and one arc table function. Also thedelay register is of the same size. However, the delay demodulator needs an additional table forthe root function in the amplitude normalization. Hence it needs a little bit more storage and com-puting power. The PLL needs the least computing power as no division is required. Besides, thenumber of additions and multiplications is smaller. The trigonometric functions sine and cosinecan be realized with just one table. Hence the storage requirement is about the same as that of the

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4.7. Comparison of the Algorithms

Signal-To-Noise Ratio

0

2

4

6

8

10

12

14

16

0 1000 2000 3000 4000f [Hz]

S/N

Delay Dem. PLLMixed Dem.

Figure 4.38.: Comparison of S/N ratio for different demodulation algorithmen, with a kFM of 18000

mixed demodulator. So the following ranking can be obtained.Computing power:

PLL < MixedDemodulator ≈ DelayDemodulator

Storage utilization:PLL ≈ MixedDemodulator < DelayDemodulator

4.7.4. The Appropriate Algorithm

Out of this knowledge the mixed demodulator seems to be the most suitable algorithm. Its realiza-tion needs less storage than that of the delay demodulator to achieve nearly the same signal qualityand robustness. The PLL requires less resources, but its robustness is worse for low frequencies.Hence, the mixed demodulator is the first choice for the implementation. The PLL is the secondbecause of low computing power.

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Simulation

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5. Implementation

The mixed demodulator and the PLL demodulator are implemented on a Texas InstrumentTMS320C6711 digital signal processor. A DSP starter kit is used which includes aTMS320C6711DSK board and the Code Composer Studio (CCS) IDE. The CCS is is a completeIDE featuring code building, debugging and real time analysis. It is especially designed for TexasInstrument DSP’s. Also included are DSP/BIOS a Chip Support Library (CSL) and a Board Sup-port Library (BSL). It supports implementation in C++ , C and Assembler.

The algorithms are implemented in C. The first approach is implemented in floating-point to avoidproblems with overflows and quantization. The code sequences are kept simple without any op-timization or time effective programming. The transformation of the algorithm to C code at thisstage aims at only verifying its functionality on the targeted DSP.In the next step the floating-point implementation is transformed into a fixed-point with still nogreat effort in speed optimization. The problems of overflows and quantization are discussed.Thereafter, the C implementation is optimized in speed. Finally some of time intensive parts arewritten in linear assembler to decrease the computing load.

5.1. System Architecture

5.1.1. Signal Path

Figure 5.1 outlines the floating-point implementation of the demodulator. It shows the samplingrates and the buffer lengths for the different stages of the demodulation. The entry end exit pointsof the functions are marked and the used buffers are shown. For specific buffers a sketch of thesignal’s spectrum is shown.Figure 5.2 shows the same for the fixed-point implementation.

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Implementation

IIR LP IIR LP

IIR OSZ

ID

emod

ulat

ion

Algo

rithm

IIR BPAD

CD

AC

leng

ht 1

28

in_b

uffe

rle

nght

128

re_b

uffe

r

leng

ht 1

28

im_b

uffe

r

leng

ht 3

2

im_b

uffe

r_do

wn_

one

leng

ht 3

2

re_b

uffe

r_do

wn_

one

leng

ht 3

2

out_

buffe

r_do

wn_

one

leng

ht 1

6

out_

buffe

r_do

wn_

two

4 4

2

Sam

plig

Rat

e63

.993

kH

z15

.998

kH

z79

99 H

z

Buf

fer L

engt

hBU

FFER

SIZE

_IN

PUT=

128

BUFF

ERSI

ZE_D

EMO

DU

LATO

R=3

2BU

FFER

SIZE

_OU

TPU

T=16

Func

tion

8 k

16 k

16 k

64 k

2fT

64 k

f T

quad

_mix

mix

ed_d

emod

ulat

epl

l_de

mod

ulat

eou

t_fil

ter

0

00

00

leng

ht 1

28

re_b

uffe

r

leng

ht 1

28

im_b

uffe

rle

nght

32

out_

buffe

r_do

wn_

one

dow

nsam

ple

_one

dow

nsam

ple

_tw

o

Func

tion

Entry

Func

tion

Exit

nD

owns

ampl

ing

Figure 5.1.: Overview of floating-point implementation

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5.1. System Architecture

IIR LP IIR LP

IIR OSZ

ID

emod

ulat

ion

Algo

rithm

IIR LPAD

CD

AC

leng

ht 1

28

re_b

uffe

r

leng

ht 1

28

im_b

uffe

r

leng

ht 3

2

im_b

uffe

r

leng

ht 3

2

re_b

uffe

r

leng

ht 3

2

out_

buffe

r

leng

ht 1

6

out_

buffe

r_do

wn

4 4

2

Sam

plig

Rat

e63

.993

kH

z15

.998

kH

z79

99 H

z

Buf

fer L

engt

hBU

FFER

SIZE

_IN

PUT=

128

BUFF

ERSI

ZE_D

EMO

DU

LATO

R=3

2BU

FFER

SIZE

_OU

TPU

T=16

Func

tion

8 k

16 k

16 k

64 k

2fT

64 k

f T

quad

_mix

mix

ed_d

emod

ulat

epl

l_de

mod

ulat

eou

t_fil

ter

0

00

00

IIR HP

Func

tion

Entry

Func

tion

Exit

nD

owns

ampl

ing

leng

ht 1

28

in_b

uffe

r_A

Figure 5.2.: Overview of fixed-point implementation

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Implementation

5.1.2. The Sampling Rates

In Section 4.4 a sampling rate of 25043.89Hz was calculated according to Eq. 3.6. This would be theideal sampling frequency for the subsampling, but the hardware sets the following limitations:

Analog Digital (Converter THS1408) The clock of the ADC is generated by the Timer inside theDSP. Therefore only sampling rates of fA = 150MHz

8·i are possible, where i is an integer.

Digital Analog (Converter On Board Codec) The on board codec has an unchangeable sam-pling rate of 8000Hz. Thus the sampling rate of the ADC has to be a multiple of 8000Hzfor the downsampling.

In addition, the conditions of the subsampling need to be fulfilled by the sample rate of the ADC.With the hardware setup of the DSP DSK and the ADC EVM it is not possible to meet all these con-ditions because it is not possible to run the ADC with a multiple frequency of the DAC frequency.The sample rate which was chosen is

fA =150MHz

8 · 293= 63.993kHz

it meets all conditions except the one for the downsampling. During the processing the signal willbe totally downsampled by 8 and therefore the sampling frequency of the output signal is:

fA =1500000008 · 293 · 8

=63993.17

8= 7999.15Hz

Therefore the output samples arrive too early (Figure 5.3), and the output signal appears to be

t

t

input7999.15 Hz

output8000 Hz

Figure 5.3.: Input and output samples

slightly faster. This is not a problem because the difference is smaller than 1 Hz. The problemis that about every second there is a missing sample. Therefore a value between the last outputand the next to come is interpolated for the missing sample. Due to the phase shift of about onesampling period introduced by the additional sample, a low short rustle in the output signal canbe heard every time the additional sample is issued.This problem is introduced by the hardware and could be solved by using one master clock fromwhich both the ADC clock and the DAC clock are derived so that both ADC and DAC operationsare synchronized. An attempt was made to realize this hardware solution with the DSK by wiringthe codec clock (4.096 MHz) to the input pin of the DSP timer. Unfortunately the clock was notable to drive both the codec and the timer input. The effort of adding a driver was not made.Because the noise introduced by this error is very small and as audible for just pure sinusoidal sig-nals and not for speech, no further efforts were done to reduce it. In a commercial implementationthe solution with a master clock would eliminate this problem completely.

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5.1. System Architecture

-13.140 fM = 13.1400

f [kHz]

|A|12.5 kHz

-13.140 26.2800

f [kHz]

|A|

13.140-26.280

-13.140 26.2800

f [kHz]

|A|

13.140-26.280

FM signal after subsampling

I and Q signal before filter

I and Q signal after filter

Figure 5.4.: Spectrum of FM signal after subsampling

The spectrum of the FM signal after the downsampling is shown in Figure 5.4. The new carrierfrequency fM can be calculated with equation

fM = fT − fA · floor(

fT

fA

)= 10.7 · 106 − 63993 · floor

(10.7 · 106

63993

)= 13.140Hz (5.1)

where fT is the carrier frequency of the analog FM signal.

5.1.3. Analog-to-Digital Conversation THS1408

The on board codec of the DSP DSK has a fix sample rate of 8000 Hz. Therefore an additional ADC(THS1408 EVM) is connected to the daughtercard connectors of the DSP. The data from the ADCis transferred by the Enhanced Direct Memory Access unit (EDMA) to reduce the workload of theDSP.The implementation to setup the ADC and the EDMA is done in the two files adc_THS1408.h(Listing F.1) and adc_THS1408.c (Listing F.2). It uses the EMIF, EDMA, TIMER, and IRQ modulesof the Chip Support Library (CSL) to provide an interface to control and configure the on chipperipherals of the DSP.

THS1408

THS1401, THS1403, THS140814-BIT, 1/3/8 MSPS DSP COMPATIBLE ANALOG-TO-DIGITAL CONVERTERS

WITH INTERNAL REFERENCE AND PGA

SLAS248B – DECEMBER 1999 – REVISED JANUARY 2001

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

features

� 14-Bit Resolution

� 1, 3, and 8 MSPS Speed Grades Available

� Differential Nonlinearity (DNL) ±0.6 LSB Typ

� Integral Nonlinearity (INL) ±1.5 LSB Typ

� Internal Reference

� Differential Inputs

� Programmable Gain Amplifier

� µP Compatible Parallel Interface

� Timing Compatible With TMS320C6000 DSP

� 3.3-V Single Supply

� Power-Down Mode

� Monolithic CMOS Design

applications

� xDSL Front Ends

� Communication

� Industrial Control

� Instrumentation

� Automotive

14 15

WROEDGNDDGNDCLKDVDDDVDDD0D1D2DVDDDGND

36

35

34

33

32

31

30

29

28

27

26

25

16

1

2

3

4

5

6

7

8

9

10

11

12

IN–AVDDVBGCML

REF+REF–

AGNDAGNDDGND

OVD13D12

17 18 19 20

A0

A1

NC

NC

47 46 45 44 4348 42

IN+

AV

AG

ND

AG

ND

AG

ND

D5

D4

D3

DG

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D8

D7

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40 39 3841

21 22 23 24

37

13

CS

D11

D10

PFB AND PHP PACKAGE(TOP VIEW)

DD

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DD

DV D

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DV D

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DV D

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NC – No internal connection

Copyright 2001, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are testedunless otherwise noted. On all other products, productionprocessing does not necessarily include testing of all parameters.

Figure 5.5.: THS1408

The THS1408 is a 14-bit, 8MSPS single supply analog-to-digital converter with an internal refer-ence, differential inputs, programmable input gain and on-chip sample and hold amplifier. Formore detailed information refer to [11] and [12]. The jumper settings of the EVM are summarizedin Table 5.1. The Power to the EVM is supplied from the DSP DSK (jumper H14). The input is

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Implementation

Table 5.1.: Jumper settings THS1408Jumper Setting Description Jumper Setting Description

H1 - unused H9 2-3 inputH2 - unused H10 - unusedH3 - clock H11 - unusedH4 - unused H12 - hardware loopbackH5 - clock H13 - hardware loopbackH6 1-2 clock H14 1-2 powerH7 2-3 input H15 2-3 boardH8 1-2 input

applied as a single ended input (jumpers H7 to H9). The other jumper settings are explained in thefollowing sections.

Address Mapping

The ADC EVM is connected to the DSP DSK via the daughtercard connectors. The device containsseveral registers. A register is selected by the values of the A1 and A0 in Table 5.2. Figure 5.6

Table 5.2.: Addresses of registers THS1408A1 A0 Register Abbreviation HEX Address0 0 Conversation result RES 0xA000’00400 1 PGA (Gain) PGA 0xA000’00441 0 Offset OFF 0xA000’00481 1 Control CTL 0xA000’004C

shows how the address bus is wired to the EVM and the ADC, with the jumper H15 set to 2-3. The

TMS320C6711

CE2*

EA6EA5EA4EA3EA2

XC9536XL

OUT_CE2*

OUT_EA6OUT_EA5OUT_EA4OUT_EA3OUT_EA2

THS1408

A1A0

CS*ADCCSB

Figure 5.6.: Schema address bus wiring THS1408

EVM uses a Xilinx XC9536 CPLD to perform the address decode and control. Table 5.3 is the truthtable of the address decode logic.The CE2 signal is a EMIF memory space enable signal. On the C6711 it defines the memory blockfrom address 0xA000’0000 with the length of 256MB [14]. With this information the addresses ofthe THS1408 registers can be determined (Table 5.2).The off chip memory is accessed through the EMIF, therefore the values for the CE2CTL register ofthe EMIF have to be set according to the specifications of the THS1408 ADC (Tabel 5.4 [12] [16]).

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5.1. System Architecture

Table 5.3.: Truth table address decode THS1408OUT_EA6 OUT_EA5 OUT_EA4 OUT_EA3 OUT_EA2 OUT_CE* DACCSB1 0 0 0 0 0 01 0 0 0 1 0 01 0 0 1 0 0 01 0 0 1 1 0 01 0 1 0 0 0 11 0 1 0 1 0 11 1 0 0 0 0 0All other combinations 1

Table 5.4.: EMIF timing registers for THS1408Field Abbreviation ValueRead Setup RDSETUP 1Read strobe RDSTRB 3Read hold RDHLD 1Write setup WRSETUP 4Write strobe WRHLD 6Write hold WRSTRB 3Memory type MTYPE 32-bit-wide asynchronous interface

Conversion Rate

The clock for the ADC is generated with the timer 0 of the DSP. Jumpers H3, H5, and H6 of theEVM have to be set according to Table 5.1, to connect the timer output to the clock input of theADC. The timer 0 is clocked by the internal source of CPU_Rate/4 = fCPU

4 .

f (clock_source) =fCPU

4

The output is set as clock output, the frequency is

fclk =f (clock_source)

2 · timer_period_register

hence the frequency is:

fclk =fCPU

4 · 2 · i(5.2)

Where i is the value set in the timer period register and fCPU is the DSP Speed. The timer periodregister is set to i = 293 which results in a frequency of fclk = fA = 63993Hz. The selection of thesampling rate is further explained in Section 5.1.2.

Ping Pong Buffering

To reduce the overhead of interrupt routines vector processing is applied. The CPU will not beinterrupted by every new value from the ADC to fetch it. Instead, the EDMA will take care ofthis. The EDMA will transfer the values from the ADC to the memory of the DSP and interruptthe CPU after one hole vector (in this case 128 values) has been transferred. Then the hole vectorcan be processed by the CPU, while the EDMA will continue to fetch the ADC values. To avoid

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Implementation

the EDMA overwriting the values on which the CPU is working, the vector is transferred to twodifferent buffers. One buffer will be filled by the EDMA while the CPU is working with the otherbuffer (Figure 5.7). This is widely known as Ping Pong Buffering.

ADC EDMA CPU

t1

t1

Buffer

t2

t2

Ping(in_buffer_A)

Pong(in_buffer_B)

Figure 5.7.: Ping Pong Buffering

To do this, one EDMA Channel and two EDMA Reload Tables are needed. Two configurationsare needed, one for the ping and one for the pong buffer. In both of them the source address isthe Conversion Result Register (0xA000’0040) of the ADC and the source increment is disabled.The destination address in one of them is the start address of the ping buffer and the start addressof the pong buffer is the destination of the other. The destination increment is enabled and thecounter is set to the length of the vector (in this case 128). The link in the configuration for pingpoints to the configuration of the pong buffer and visa versa to result in a circular system. This isillustrated in Figure 5.8.

Ping

OptionsSource Address

Destination Address

Link Adr-- 128

- 1

OptionsSource Address

Destination Address

Link Adr-- 128

- 1

OptionsSource Address

Destination Address

Link Adr-- 128

- 1

ADC

EDMA Channel

EDMA Reload Tables

Ping

conf

igur

atio

nPi

ngco

nfig

urat

ion

Pong

conf

igur

atio

n

Pong

Figure 5.8.: EDMA setup for Ping Pong Buffering

Then the EDMA is configured to interrupt the CPU after a hole vector is transferred and the EDMAinterrupt is enabled on the DSP. To determine which buffer the EDMA has just finished fillingeach configuration sets a different field in the Channel Interrupt Pending Register (CIPR). This is

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5.1. System Architecture

specified by the Transfer Complete Code (TCC) field in the option part of the configuration. Formore information on EDMA setup and registers, refer to [16].Because the data from the ADC to the buffers are transferred by the EDMA, the L2 cache of theDSP does not recognize it and the cache valid flags are not changed. Therefore the DSP wouldread the old values from the cache. There are two ways to avoid this. The first way is to clear thevalid flags of the cache for the buffer area every time the EDMA has finished a transfer. This can bedone by the CACHE_clean function. The second way is to configure a part of the on-chip memoryas mapped memory instead of cache. In this case the number of cache ways is reduced, but thedata from the ADC are directly stored in on chip memory which gains performance. Thereforethe second resolution is applied. The change of the internal memory usage can be done in theDSP/BIOS configuration file.

5.1.4. Digital-to-Analog Conversation

To perform the digital-to-analog conversation the on board codec is used. It is a 16-bit dual channelvoice or data codec and has a fix sample rate of 8000 Hz ([13]). It is produced by a 4.096 MHz clockon the DSK and the internal divider (512 times) of the codec. The codec is accessed through themultichannel buffered serial port (McBSP).The two files dac_codec.h (Listing F.3) and dac_codec.c (Listing F.4) include the implementation forthe setup and the handling of the codec. It uses the AD535 module from the Board Support Library(BSL) which is a set of application programming interfaces used to configure and control on-boarddevices.As the sampling rate of the DAC is low compared to the ADC frequency and the the downsamplingrate of the ADC can not be matched exactly (see Section 5.1.2), the data is directly written to theDAC by the DSP without using the EDMA. Nevertheless, the output also uses two Buffers becausevector processing is applied. Therefore Figure 5.7 can be extended to Figure 5.9.

ADC EDMA CPU

t1

t1t2

t2

DACCPU

t2

t1

Ping(in_buffer_A)

Pong(in_buffer_B)

Ping(out_buffer_A)

Pong(out_buffer_B)

t2

t1

Figure 5.9.: Ping Pong Buffering DAC

The scheduling of the two CPU blocks is explained in Section 5.1.6.

5.1.5. Programm Flow

Like in every C programm the entry point is the main function. In this case the main function isused to initialize the used hardware, the software libraries, and to set up the interrupts. After theinitialization, the application goes to an idle loop to be driven by interrupts (see Figure 5.10). Themain function and the interrupt routines are implemented in the fm_dem_main.c file. Figure 5.11shows a simplified layout.

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Implementation

main idle interruptroutine

interrupt pending

interrupt routinefinished

Figure 5.10.: Programm flow

main

Init CSL library

Init BSL library

Init ADC and EDMA

Init DAC

Enable interrupts

Start ADC and DAC

DAC interrupt routine

EDMA interrupt routine

Demodulate software interrupt routine

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Figure 5.11.: Layout main file

5.1.6. Interrupt Routines and Scheduling

The system is driven by two different hardware interrupts. One from the EDMA of the ADC andthe other from the codec DAC. Therefore the CPU is invoked from two different sources and neces-sitates proper scheduling. The two hardware interrupts have the same priority level and can notinterrupt each other. To avoid missing an interrupt the time intensive calculation of the demodu-lation algorithm is done in a software interrupt (SWI) which is posted from the EDMA interruptroutine and can be interrupted by any hardware interrupt as shown in Figure 5.12. Software inter-

t

DAC HWIRoutine

EDMA HWIRoutine

Missed !

DAC HWIRoutine

EDMA HWIRoutine

Demodulate SWIRoutine

post SWI

interruptsSWI

continuesSWI

interruptsSWI

continuesSWI

t

Figure 5.12.: Scheduling with software interrupt

rupts can be configured in the DSP/BIOS configuration and they are posted with the SWI_postfunction. The hardware interrupts are kept as short as possible.Figure 5.13 shows an outline of the interrupts, interrupt routines and what is responsible for settingthe pointers.

DAC Interrupt Routine

The DAC interrupt routine just writes the current value to the codec and increments the outputcounter, which determines current index of the buffer. In case of the missing sample it also per-forms the interpolation as in Listing 5.1 and Figure 5.14.

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5.1. System Architecture

ADC EDMA

in_buffer_ptr

DAC

in_buffer_A

in_buffer_B

out_buffer_A

out_buffer_B

out_buffer_ptr

63.993 kHz

499.9 Hz 499.9 Hz

Hardware Interrupt HWI

Software Interrupt SWI

Set pointers

Pointer

CPU:EDMA HWI

Routine

CPU:DAC HWIRoutine

CPUdemodulate SWI

Routine

8000 Hz

Figure 5.13.: Overview interrupts

DAC interrupt routine

Interpolate last samplefrom A bufferand fisrtsample from B buffer andsend to DAC

Interpolate last samplefrom B buffer and fisrtsample fromA buffer andsend to DAC

Buffer A in EDMAif

then else

Send sample form Abuffer to DACaccording to outcounter

Send sample form Bbuffer to DACaccording to outcounter

Buffer A in EDMAif

then else

increment outcounter

outcounter too bigif

then else

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Figure 5.14.: DAC interrupt routine

Listing 5.1: DAC interrupt routine1 void dacInt( void )2 {3 /* interpolate a missing sample */4 if (outcounter>15)5 {6 /* select the buffer */7 if (a_inEDMA)8 {9 AD535_HWI_write(outAD535h,(( out_buffer_A[15]+

out_buffer_B[0])/2));10 } else11 {12 AD535_HWI_write(outAD535h,((out_buffer_B[15]+

out_buffer_A[0])/2));

13 }14 } else /* output a value */15 {16 /* select the buffer */17 if (a_inEDMA)18 {19 AD535_HWI_write(outAD535h,out_buffer_A[outcounter]);20 } else21 {22 AD535_HWI_write(outAD535h,out_buffer_B[outcounter]);23 }24 /* update outcounter */25 outcounter++;26 }27 }

EDMA Interrupt Routine

The EDMA interrupt routine resets the output counter, clears the transfer completion interruptflag, sets the pointers and flags for the new buffers, and then posts the software interrupt (List-ing 5.2 and Figure 5.2).

Demodulate Software Interrupt Routine

In this routine the actual demodulation is carried out. The functions of the demodulation algo-rithms are called as in Listing 5.3 and Figure 5.16.

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Implementation

Listing 5.2: EDMA interrupt routine1 void edmaInt( void )2 {3 /* reset outcounter */4 outcounter=0;56 /* select EDMA channel */7 if (EDMA_intTest(THS1408_BUFFER_A_TCC))8 {9 /* Clear transfer completion interrupt flag */

10 EDMA_intClear(THS1408_BUFFER_A_TCC);1112 /* set buffer pointers */13 a_inEDMA=0;14 in_buffer_ptr=in_buffer_A;15 out_buffer_ptr=out_buffer_A;1617 /* post software interrupt -> start demodulation

*/18 SWI_post(&demodulate_swi);19 }20 if (EDMA_intTest(THS1408_BUFFER_B_TCC))21 {22 /* Clear transfer completion interrupt flag */23 EDMA_intClear(THS1408_BUFFER_B_TCC);2425 /* set buffer pointers */26 a_inEDMA=1;27 in_buffer_ptr=in_buffer_B;28 out_buffer_ptr=out_buffer_B;2930 /* post software interrupt -> start demodulation

*/31 SWI_post(&demodulate_swi);32 }33 }

EDMA interrupt routine

reset outcounter

clear transfer complet flag A

set buffer pointers and flags to buffer A

post software interrupt

block transfer A completif

then else

clear transfer complet flag B

set buffer pointers and flags to buffer B

post software interrupt

block transfer B completif

then else

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Figure 5.15.: EDMA interrupt routine

Listing 5.3: Demodulate softawre inter-rupt routine

1 void demodulateSwiFunc( void )2 {3 int i;4 /* turn 14bit input into 16bit Q15 value */5 for (i=0 ;i<BUFFERSIZE_INPUT;i++)6 {7 in_buffer_ptr[i]=in_buffer_ptr[i]<<2;8 }9

10 quad_mix(in_buffer_ptr,re_buffer,im_buffer);1112 mixed_demodulate(re_buffer,im_buffer,out_buffer);1314 out_filter(out_buffer,out_buffer_ptr);15 }

demodulate software interrupt

turn 14bit inputinto 16bit Q15 value

quadrature mixer

mixed demodulatororpll demodulator

out filter

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Figure 5.16.: Demodulate software inter-rupt routine

5.2. Floating-Point Algorithm

In this section the mixed demodulator and PLL demodulator are specially discussed in regards totheir implementations in C.

5.2.1. Quadrature Mixer

Figure 5.17 shows again the block diagram of the Quadrature with the buffer names as they areused in the code sequences. There are two important tasks. A sine and a cosine oscillators have tobe generated first. Then a low-pass filter will be specified.

To generate a sine or a cosine signal it is possible to use an IIR filter. The impulse responses ofthe IIR filters have to take the following forms:

hS(n) = sin(ωM · n · T)

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5.2. Floating-Point Algorithm

cos(ωΜ n T)

sin(ωΜ n T)

-1

in_buffer(FM Signal)

re_buffer(I Signal)

im_buffer(Q Signal)

Figure 5.17.: Quadrature mixer

and:hC(n) = cos(ωM · n · T)

T represents the sample time, which is used to run the filters. ωM is the angular frequency ofthe demanded oscillation. The exact angular frequency depends on the spectrum situation beforequadrature mixing (see Chapter 5.1).

The filter characteristics of an IIR filter are completely specified by their impulse responses. The Ztransformation of the impulse response delivers all coefficients of the filter. In this case it is aboutdesigning a filter on the limit of stability (non decaying impulse response). A difficulty of suchfilters, specially in a fixed point implementation, is to keep the limit of stability all the time. Therequired Z transfer function can be found in a simple Z transformation table:

hS(n) = sin(ωM · n · T)Z↔HS(z) =

sin(ωM · T) · z−1

1− 2 · cos(ωM · T) · z−1 + z−2 (5.3)

and:

hC(n) = cos(ωM · n · T)Z↔HC(z) =

1− cos(ωM · T) · z−1

1− 2 · cos(ωM · T) · z−1 + z−2 (5.4)

The denominators of the two Z transfer functions are equal, this brings along the common use ofthe delay stores. Hence the two oscillations can be created with a filter with one feedback pathand two forward paths (see Figure 5.19). The filter structure can be directly derived from the Ztransfer function [5]. If the filter is actuated with a delta function, the output would be a sine anda cosine signal, respectively (because their impulse response specification). These signals are thenmultiplied with the FM signal sFM(n).

The next step is to filter them with a low pass filter. For fast applications, an IIR filter is pre-ferred to a FIR filter due to the smaller filter order for the same specifications. High filter ordersare the main cause of undesirable time delay.

To get the IIR filter specifications, it is necessary to look at the spectrum situation. Figure 5.4shows the spectrum of the FM signal after subsampling. The pass frequency is defined by the halfbandwidth of the original FM signal ( f p = 6300Hz). That is the highest frequency which has tobe handled. The stop frequency is chosen as high as possible, but low enough to prevent aliasing( f s = 19000Hz). The pass band loss and the stop band attenuation were declared, to optain thefilter order n as small as possible, but larger enough attenuation in the stop band.

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A useful tool to calculate IIR filter coefficients is MATLAB. The following code sequence showsa matlab M-File which returns the coefficients of a butterworth IIR filter with the given specifica-tions:

1 %IIR low-pass filter for quadrature mixing23 %specifications:4 %sample frequency in Hz5 fa=150000000/(8*293);6 %pass frequency in Hz7 fp=6300;8 %stop frequency in Hz9 fs=19000;

10 %loss in pass band in dB11 dp=2;12 %loss in stop band in dB13 ds=60;1415 %computing:16 [n, fn]=buttord(fp*2/fa, fs*2/fa, dp, ds);17 %return:

18 %order19 n20 %cutoff frequency21 fn2223 %computing:24 [B,A]=butter(n,fn);25 %return:26 %denominator of transfer function27 B28 %nominator of transfer function29 A3031 %computing:32 [H,W]=freqz(B,A,n);33 %return:34 freqzplot(H,W);

The filter order is computed to n = 5 and the 3dB cutoff frequency to fn = 6653Hz. So the transferfunction of the low pass filter is:

HLP(z) = 10−3 · 1.513433 + 7.567165 · z−1+15.134330 · z−2+15.134330 · z−3+7.567165 · z−4+1.513433 · z−5

1− 2.895729 · z−1+3.634448 · z−2−2.392826 · z−3+0.817619 · z−4−0.115082 · z−5

Figure 5.18 shows the frequency response of the low pass filter.

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

x 104

-400

-300

-200

-100

0

Frequency (Hz)

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

x 104

-70

-60

-50

-40

-30

-20

-10

0

Frequency (Hz)

Mag

nitu

de (d

B)Ph

ase

(deg

rees

)

Figure 5.18.: Frequency response of low-pass filter for quadrature mixing, floating point

Now the parts of the quadrature mixer are discussed in the view of its digital realization. Figure5.19 shows the whole digital block diagram of the quadrature mixer with the buffer and variablenames which are used in the code sequences. The following C function represents the translationfrom digital block structure to C code.

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5.2. Floating-Point Algorithm

z-1z-1

bs2

asc2

+

+

bc2

z-1z-1 z-1 z-1 z-1

alp4 alp5 alp6alp2 alp3

blp4 blp5 blp6blp1 blp2 blp3

+

+

x

z-1z-1 z-1 z-1 z-1

alp4 alp5 alp6alp2 alp3

blp4 blp5 blp6blp1 blp2 blp3

+

+

x

+-

-+

+-

in_buffer

re_buffer

im_buffer

zsc3zsc1 zsc2

zlpc1 zlpc6

zlps5

zlpc5zlpc4zlpc3zlpc2

zlps4zlps3zlps2zlps1 zlps6

Figure 5.19.: Digital block diagram of quadrature mixer

1 void quad_mix( float in_buffer[] , float re_buffer[] , floatim_buffer[])

2 {3 int i;45 /*__cosine/sine generation__*/67 for (i=0;i<BUFFERSIZE_INPUT;i++)8 {9 /*feedback*/

10 zsc1=-(zsc2*asc2+zsc3);1112 /*foreward*/13 re_buffer[i]=zsc1+zsc2*bc2; /*cosine*/14 im_buffer[i]=zsc2*bs2; /*sine*/1516 /*shift delays*/17 zsc3=zsc2;18 zsc2=zsc1;19 }2021 /*__mixing__*/2223 for (i=0;i<BUFFERSIZE_INPUT;i++)24 {25 /*mixing*/26 re_buffer[i]=re_buffer[i]*in_buffer[i]; /*I-path*/27 im_buffer[i]=im_buffer[i]*in_buffer[i]; /*Q-path*/28 }2930 /*__low pass__*/

3132 for (i=0;i<BUFFERSIZE_INPUT;i++)33 {34 /*feedback*/35 zlpc1=re_buffer[i]-(alp2*zlpc2+alp3*zlpc3+alp4*zlpc4+

alp5*zlpc5+alp6*zlpc6); /*I-path*/36 zlps1=im_buffer[i]-(alp2*zlps2+alp3*zlps3+alp4*zlps4+

alp5*zlps5+alp6*zlps6); /*Q-path*/3738 /*foreward*/39 re_buffer[i]=blp1*zlpc1+blp2*zlpc2+blp3*zlpc3+blp4*zlpc4

+blp5*zlpc5+blp6*zlpc6; /*I-path*/40 im_buffer[i]=-(blp1*zlps1+blp2*zlps2+blp3*zlps3+blp4*

zlps4+blp5*zlps5+blp6*zlps6); /*Q-path*/4142 /*shift delays*/43 /*I-path*/44 zlpc6=zlpc5;45 zlpc5=zlpc4;46 zlpc4=zlpc3;47 zlpc3=zlpc2;48 zlpc2=zlpc1;49 /*Q-path*/50 zlps6=zlps5;51 zlps5=zlps4;52 zlps4=zlps3;53 zlps3=zlps2;54 zlps2=zlps1;55 }56 }

The function is called with three parameters. The first parameter is a pointer to an array containingvalues of the subsampled FM signal. The other arguments are the pointers to the arrays used forthe output of the quadrature mixer: re_buffer and im_buffer contain values of the I and Q signals,respectively.

First the cosine and sine signals are produced and saved in the re_buffer (cosine) and the im_buffer

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Implementation

(sine). The IIR filter, which is used to generate these signals, must be actuated with a delta function.Instead of using a delta function as input signal, the delay variables can be declared to achieve thesame result.

The next step is to multiply the cosine and sine signal with the subsampled FM signal and savethem back to the re_buffer and im_buffer, respectively.

At last the signals in the re_buffer and im_buffer are low-pass filtered and saved back to re_bufferand im_buffer.

5.2.2. First Down Sampling

In Figure 5.20 the spectrum after quadrature mixing (of one path) is shown. It shows that the

|A|

f

f=64000Hz

|A|

f=16000Hz

f

f=64000Hz

Figure 5.20.: Signal spectrum after quadrature mixing

sampling frequency f = 64000Hz can be reduced with a factor of four to f = 16000Hz. Fig-ure 5.21 represents the frequency response after down sampling (of one path). The reduction can

|A|

f

f=64000Hz

|A|

f=16000Hz

f

f=64000Hz

Figure 5.21.: Signal spectrum after first down sampling

be realized by picking every fourth value of the re_buffer and im_buffer and store them in there_buffer_down_one and im_buffer_down_one (reduced buffersize), respectively.

The code sequence below explains the down sampling in C:1 void downsample_one( float re_buffer[] , float im_buffer[] , float re_buffer_down_one[] , float im_buffer_down_one[])2 {3 int i;45 for (i=0;i<BUFFERSIZE_DEMODULATOR;i++)6 {7 re_buffer_down_one[i]=re_buffer[i*DOWNSAMPLE_ONE];8 im_buffer_down_one[i]=im_buffer[i*DOWNSAMPLE_ONE];9 }

10 }

5.2.3. Mixed Demodulator

Figure 5.22 shows again the architecture of the mixed demodulator. The signals are annotated bytheir names in the code sequence. The associated C code is given as follows:

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5.2. Floating-Point Algorithm

Z-1

Z-1

+

-

arctan

coold

+

+siold

FM

1T k⋅

sinew

demo

conew

out_buffer_down_one

re_buffer_down_one

im_buffer_down_one

Figure 5.22.: Block diagram of mixed demodulator

1 void mixed_demodulate( float re_buffer_down_one[] , float im_buffer_down_one[] , float out_buffer_down_one[])2 {3 int i;45 for (i=0;i<BUFFERSIZE_DEMODULATOR;i++)6 {7 /*__shifting values__*/8 coold=conew;9 siold=sinew;

10 conew=re_buffer_down_one[i];11 sinew=im_buffer_down_one[i];1213 /*__calculating demodulated value__*/14 demo=(coold*sinew-siold*conew)/(coold*conew+siold*sinew); /*atan argument*/15 demo=atanf(demo); /*atan value*/16 demo=demo*decon; /*demodulated value*/17 out_buffer_down_one[i]=demo;18 }19 }

The parameters are the pointers to the arrays which contain the down sampled I signal and Qsignal (re_buffer_down_one, im_buffer_down_one) and a pointer to an array containing the de-modulated signal (out_buffer_down_one).

First the delay has to be realized. The value conew and sinew must be declared with a nonzerovalue to prevent a division by zero by the first call. Then the demodulated value can be calculatedas explained in the block diagram.

5.2.4. PLL Demodulator

Figure 5.23 shows the block diagram with the buffer and variable names as they are used in C.The constant P_PLL is chosen PPLL = 2 as declared in Section 3.3.3. Another constant K_PLLwas declared to be KPLL = kFM · T ≈ 1.2. With these values, there are some distortions aroundf = 1000Hz. The best result is achieved with KPLL = 2.8.

1 void pll_demodulate( float re_buffer_down_one[] , floatim_buffer_down_one[] , float out_buffer_down_one[])

2 {3 int i;4 float demo; /*value of demodulation*/56 for (i=0;i<BUFFERSIZE_DEMODULATOR;i++)7 {8 /*__calculation of demodulation__*/9 i_path=re_buffer_down_one[i]*sinf(arg);

10 q_path=im_buffer_down_one[i]*cosf(arg);11

12 demo=q_path-i_path;13 demo=demo*P_PLL;1415 out_buffer_down_one[i]=demo*GAIN_PLL;1617 /*__summation of argument__*/18 arg=arg+K_PLL*demo;1920 /*__limitation of argument__*/21 if (arg>2*PI)22 {23 arg=arg-2*PI;

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Implementation

-

+

sine

Σ

cosine

K_PLL

P_PLL demo

out_buffer_down_one

i_path

re_buffer_down_one

im_buffer_down_one

q_path

arg

Figure 5.23.: Block diagram of PLL demodulator

24 }2526 else if (arg<-2*PI)27 {

28 arg=arg+2*PI;29 }30 } /* for */31 } /* pll_demodulate */

The argument (arg) of sine and cosine must be limited because a small DC offset is enough to risethe argument beyond the valid range due to the summation.

5.2.5. Filter

After demodulation the demodulated signal should be filtered with a band-pass filter to suppressthe noise or DC offset.

The coefficients of the band-pass filter are also calculated with a MATLAB M-file:

1 %IIR band-pass filter23 %specifications:4 %sample frequency in Hz5 fa=150000000/(8*293*4);6 %first pass-band frequency in Hz7 fp1=200;8 %second pass-band frequency in Hz

9 fp2=3600;10 %IIR band-pass filter order11 n=5;1213 %computing14 [b,a]=butter(n,[fp1*2/fa fp2*2/fa]); [H,W]=freqz(b,a);15 freqzplot(H,W);

The band-pass filter frequencies are specified as the speech message signal (see Section 1.3). Thestop-band frequency is chosen, that the band-pass filter order is n = 5. Figure 5.24 shows thefrequency response of the band-pass filter. The kind of implementation in C is the same as thelow-pass filter of the quadrature mixer:

1 void out_filter( float out_buffer_down_one[])2 {3 int i;45 for (i=0;i<BUFFERSIZE_DEMODULATOR;i++)6 {7 /*feedback*/8 zbp1=out_buffer_down_one[i]-(abp2*zbp2+abp3*zbp3+abp4*

zbp4+abp5*zbp5+abp6*zbp6+abp7*zbp7+abp8*zbp8+abp9*zbp9+abp10*zbp10+abp11*zbp11);

9

10 /*foreward*/11 out_buffer_down_one[i]=bbp1*zbp1+bbp2*zbp2+bbp3*zbp3+

bbp4*zbp4+bbp5*zbp5+bbp6*zbp6+bbp7*zbp7+bbp8*zbp8+bbp9*zbp9+bbp10*zbp10+bbp11*zbp11;

1213 /*shift delays*/14 zbp11=zbp10;15 zbp10=zbp9;16 zbp9=zbp8;17 zbp8=zbp7;18 zbp7=zbp6;

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5.3. Fixed-Point Algorithm

0 500 1000 1500 2000 2500 3000 3500 4000-700

-600

-500

-400

-300

-200

-100

0

100

Frequency (Hz)

Phas

e (d

egre

es)

0 500 1000 1500 2000 2500 3000 3500 4000-100

-80

-60

-40

-20

0

Frequency (Hz)

Mag

nitu

de (d

B)

Figure 5.24.: Band-pass filter frequency response, floating point

19 zbp6=zbp5;20 zbp5=zbp4;21 zbp4=zbp3;22 zbp3=zbp2;

23 zbp2=zbp1;24 }25 }

5.2.6. Second Down Sampling

After filtering, a second down sampling is necessary because the digital analog converter runswith a fix frequency of f = 8000Hz. Figure 5.25 represents the signal spectrum after demodulation(speech signal). After the second down sampling the spectrum of the signal is showed in Figure5.26.

|A|

f

f=16000Hz f

|A|

f=16000Hzf=8000Hz

Figure 5.25.: Signal spectrum before second down sampling

5.3. Fixed-Point Algorithm

In this section the fixed-point implementations are explained. Before the algorithms are discusseda short introduction to fractional fixed-point numbers is given.

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Implementation

|A|

f

f=16000Hz f

|A|

f=16000Hzf=8000Hz

Figure 5.26.: Signal spectrum after second down sampling

5.3.1. Fractional Q Formats

In computing arithmetic, fractional quantities can be approximated by using a pair of integers(n, e) the mantissa and the exponent. The pair represents the fraction:

n · 2−e

The exponent e can be considered as the number of digits you have to move into n before placingthe binary point. If e is a variable quantity, held in a register and unknown at compile time, (n, e)is said to be a floating-point number. If e is known in advance, at compile time, (n, e) is said to afixed-point number. Fixed-point numbers can be stored in standard integer variables by storingthe mantissa.

In a Qm.n format, there are m bits used to represent the two’s complement integer portion ofthe number, and n bits used to represent the two’s complement fractional portion. m + n + 1 bitsare needed to store a general Qm.n number. The extra bit is needed to store the sign of the numberin the most-significant bit position. The representable integer range is specified by (−2m, 2m) andthe finest fractional resolution is 2−n. The most commonly used format is Q.15. Q.15 means that

Fractional Q Formats

A-3Performance/

A.2.2 Q.15 Format

Q.15 format places the sign bit at the leftmost binary digit, and the next 15 left-most bits contain the two’s complement fractional component. The approxi-mate allowable range of numbers in Q.15 representation is (–1,1) and the fin-est fractional resolution is 2�15

� 3.05 � 10�5.

Table A–2. Q.15 Bit Fields

Bit 15 14 13 12 11 10 9 … 0

Value S Q14 Q13 Q12 Q11 Q10 Q9 … Q0

A.2.3 Q.31 Format

Q.31 format spans two 16-bit memory words. The 16-bit word stored in thelower memory location contains the 16 least significant bits, and the highermemory location contains the most significant 15 bits and the sign bit. Theapproximate allowable range of numbers in Q.31 representation is (–1,1) andthe finest fractional resolution is 2�31

� 4.66 � 10�10.

Table A–3. Q.31 Low Memory Location Bit Fields

Bit 15 14 13 12 … 3 2 1 0

Value Q15 Q14 Q13 Q12 … Q3 Q2 Q1 Q0

Table A–4. Q.31 High Memory Location Bit Fields

Bit 15 14 13 12 … 3 2 1 0

Value S Q30 Q29 Q28 … Q19 Q18 Q17 Q16

Figure 5.27.: Q.15 Bit Fields

a 16-bit word is used to express a signed number between positive and negative one. The most-significant binary digit is interpreted as the sign bit in any Q format number. Thus, in Q.15 format,the decimal point is placed immediately to the right of the sign bit. The fractional portion to theright of the sign bit is stored in regular two’s complement format (see Figure 5.27). The approxi-mate allowable range of numbers in Q.15 representation is (1, 1) and the finest fractional resolutionis 2−15 = 3.05 · 10−5 The integer value of an Q.15 value can be computed using equation:

i = round(

f · 215) (5.5)

Where i is the integer value and f is the fractional value. For example:

i = round (0.5 · 32768) = 16384

The following subsections show how to perform the basic arithmetic operations on two fixed pointnumbers, a = n2−p and b = m2−q , expressing the answer in the form c = k2−r, where p, q and rare fixed constant exponents.

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5.3. Fixed-Point Algorithm

Change of Exponent

The simplest operation to be performed on a fixed-point number is to change the exponent. Tochange the exponent from p to r the mantissa k can be calculated from n by a simple shift.Since:

n2−p = n2r−p · 2−r

the implementation is

k = n << (r-p) if (r>=p)k = n >> (p-r) if (p>r)

Addition and Subtraction

To perform the operation c = a + b, first convert a and b to have the same exponent r as c and thenadd the mantissas. This method is proved by the equation:

n2−r + m2−r = (n + m)2−r

Therefore two Q.15 numbers can be simply added:

k = n + m

Subtraction is similar.

Multiplication

The product c = a · b can be performed using a single integer multiplication. From the equation:

a · b = n2−p ·m2−q = (n ·m)−(p+q)

it follows that the product n ·m is the mantissa of the answer with exponent p + q. To convert theanswer to have exponent r, perform shifts as described above.For example, two Q.15 numbers:

k = (n * m)>>15

Division

Division c = a/b can also be performed using a single integer division. The equation is:

ab

=n2−p

m2−q =( n

m

)2q−p =

( nm

)2(r+q−p)2−r

In order not to lose precision, the multiplication must be performed before the division by m.Q.15 example:

k = (n<<15)/m

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Implementation

5.3.2. Quadrature Mixer

Like in the floating-point implementation, the sine and the cosine signal of the mixer are generatedwith an second order IIR filter. The coefficients remain the same, except that they have to betransformed to a Q.15 value according to Eq. 5.5. To avoid overflows in the delay states and theoutput value, the delay states are initialized to {0 0 0.8} or rather {0 0 26214} in Q.15 instead of {0 01} (delta function).

z-1 z-1

b1_0 b1_1

a1_2a1_1

b1_2

++

+ + ++

+-

z-1 z-1

b2_0 b2_1

a2_2a2_1

b2_2

++

+ + ++

+-

z-1

a0_0 a0_1

b0_1

+ +

+-

Cascade 0 Cascade 1 Cascade 2

z-1 z-1

b2_0 b2_1

a2_2a2_1

b2_2

++

+ + ++

+-

Cascade 2

4

Sampling Rate = 63.993 kHzBuffer Length = 128

Sampling Rate = 15.998 kHzBuffer Length = 32

ax_1

+

ax_1a

+

ax_1b

++

Figure 5.28.: Block diagram of cascaded low-pass filter

The low-pass filter designed in the floating-point implementation was fifth order. IIR filters is verysensitive to quantization errors. The filter transfer function of a filter higher than second order willchange so much due to quantization that the filter is no longer working properly. The solutionis to realize the filter with cascades of first and second order filters. Hence the quadrature mixerlow-pass filter is slitted into one first order and two second order filters (Figure 5.28).MATLAB provides functions to split the filter into cascaded second-order sections. First [z,p,k]= butter(n,Wn) obtains zero-pole-gain form, then [sos,g] =zp2sos(z,p,k,’order’,’scale’) converts the zero-pole-gain parameters to second-ordersections. Using infinity-norm scaling (scale) in conjunction with up-ordering (order) minimizesthe probability of overflow in the realization.The ax_1 coefficient of each cascade is greater than one and can therefore not be expressed as a Q.15number. The solution is to split the coefficient into two coefficients

ax_1a + ax_1b = ax_1

which are now less than one and can be expressed in the Q.15 format. The implementation willchange as shown in Figure 5.29.

z-1 z-1

b1_0 b1_1

a1_2a1_1

b1_2

++

+ + ++

+-

z-1 z-1

b2_0 b2_1

a2_2a2_1

b2_2

++

+ + ++

+-

z-1

a0_0 a0_1

b0_1

+ +

+-

Cascade 0 Cascade 1 Cascade 2

z-1 z-1

b2_0 b2_1

a2_2a2_1

b2_2

++

+ + ++

+

-

Cascade 2

4

Sampling Rate = 63.993 kHzBuffer Length = 128

Sampling Rate = 15.998 kHzBuffer Length = 32

ax_1

+

ax_1a

+

ax_1b

+

+

Figure 5.29.: Change in block diagram of

To reduce the computing load, the first downsampling is included in the last cascade of the filter.Hence the forward path of the last cascade is only executed every fourth time as in Figure 5.30.The output values are stored in the first quarter of the re_buffer and the im_buffer and thus the

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5.3. Fixed-Point Algorithm

z-1 z-1

b1_0 b1_1

a0_2a0_1

b1_2

++

+ + ++

+-

z-1 z-1

b2_0 b2_1

a2_2a2_1

b2_2

++

+ + ++

+-

z-1

a0_0 a0_1

b0_1

+ +

+-

Cascade 0 Cascade 1 Cascade 2

z-1 z-1

b2_0 b2_1

a2_2a2_1

b2_2

++

+ + ++

+-

Cascade 2

4

Sampling Rate = 63.993 kHzBuffer Length = 128

Sampling Rate = 15.998 kHzBuffer Length = 32

Figure 5.30.: Output signals and delay states of cascaded low-pass filter

buffer length is reduced from 128 to 32.

The design of the low-pass filter and the oscillator for the fixed-point implementation are donewith the MATLAB file mixer_design.m. It calculates the coefficients for the filter and the oscillator,scales them to the Q.15 value and plots them in a format to the screen that can be copied into thesource code. Afterwards it tests the filter for overflows by monitoring the delay states and outputsof every cascade. To represent a worst case scenario, a square waveform is chosen as the inputsignal. Figure 5.31 shows the plots of all the monitored signals. It shows that due to scaling, an

0 100 200

-1

-0.5

0

0.5

1

Delay Cascade0

0 100 200

-1

-0.5

0

0.5

1

Output Cascade0

0 100 200

-1

-0.5

0

0.5

1

Delay Cascade1

0 100 200

-1

-0.5

0

0.5

1

Output Cascade1

0 100 200

-1

-0.5

0

0.5

1

Delay Cascade2

0 100 200

-1

-0.5

0

0.5

1

Output SignalInput Signal

Figure 5.31.: Output signals and delay states of cascaded low-pass filter

overflow could still occur during the settling time. To preclude this the down scaling of 0.8 intro-duced through the oscillator is not undone before the filter and therefore the input signal to the

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Implementation

filter is always ≤ 0.8.

The implementation of the quadrature mixer is done in the files quad_mix.c and quad_mix.h.

5.3.3. Mixed Demodulator

The implementation of the fixed-point mixed demodulator is very close to the floating-point im-plementation. The main differences are highlighted below.The arctangent table is created with the files atan.c and antan.h. They define a constant table withthe values of the arctangent function. The MATLAB file tanTabGen.m is used to calculate the valuesof the table and write the h and c files. To reduce the computing load and avoid scaling andoverflow problems, the factor 1

T·kFM(see Eq.5.22) is included in the table.Therefore the lookup table

fulfils the equation:

out =1

T · kFM· arctan (in) (5.6)

The minimum range of the table can be calculated by using the maximum derivation of 3000 Hz:

inmax = tan (kFM · T) = tan(

2 · π · ∆FfA

)= tan

(2 · π · 3000

15998

)= 2.415

To allow easy determination of the index, the range of the table should be a power of two. There-fore the input range of the arctangent is set to 22 = 4. Only the positive part of the arctangentfunction is stored in the table, because the function is symmetrical and the negative part can bederived from the positive part.One approach is to use the value from the lookup table directly as output. Therefore the table hasto store enough values to be sufficient accurate. Another approach is to interpolate the output.This involves additional computing time, but the table size can be reduced. To further reduce theadditional computing time a second table with the gradients of the function is used for the inter-polation. The MATLAB file tanTabGenInterpol.m is used to generate these two tables. Figure 5.32shows the window plot of the direct lookup table with a table size of 128, the interpolated lookupwith two tables of 16 values, and the actual arctangent function. It shows that the interpolatedlookup is more accurate.In Section 6.2.1 various measurements with different table sizes are done and it showed that directlookup with table of 128 values and interpolated lookup with two tables of 16 values achieve agood effort and profit ratio.

Listing 5.4 shows the calculation of the argument. The signals before the division are stored inthe Q.31 format to avoid underflows and the division is scaled to a Q17.14 format. Therefore thethree local variables re_path, im_path and dem_arg are Integers (32bit).

Listing 5.4: Argument calculation fixed-point mixed demodulator1 re_path = ( im_buffer[i]*dem_z_re - re_buffer[i]*dem_z_im)<<1; /* Q.31 */2 im_path = ( re_buffer[i]*dem_z_re + im_buffer[i]*dem_z_im)<<1; /* Q.31 */34 /* shift delays */5 dem_z_re=re_buffer[i];6 dem_z_im=im_buffer[i];78 /* calculate the argument */9 dem_arg=re_path/(im_path>>14); /* Q17.14 */

5.3.4. PLL Demodulator

The fixed-point implementation of the PLL demodulator differs from the floating-point implemen-tation, specially in the calculation of the sine and cosine values of the summed demodulated signal

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5.3. Fixed-Point Algorithm

0 0.05 0.1 0.15 0.2 0.25 0.3

0

0.05

0.1

0.15

0.2

0.25Direct Lookup Table Size 128Interpolation Lookup Table Size 2⋅16Arctangent Function

Figure 5.32.: Plot arc tangent lookup table

(arg). The rest of the algorithm involves normal change from floating-point to a convenient Q for-mat.

The calculation of the demodulated value is done in the Q15 format (Listing 5.5 line 12 to 20).The following summation of the demodulated signal is limited to 2 · π . That means that the Qformat has to change from Q15 to Q3.12 (Listing 5.5 line 23 to 39):

Q3.12max = (215 − 1) · 2−12 ≈ 8 > 2 · π

The next step is to compute the sine and cosine values of the summed demodulated signal (Listing5.5 line 42 to 162). The idea is to access a buffer, which contains the sine values. To calculate sineand cosine values of an argument between −2π and −2π , it is enough to save a fourth of a sinewave. This is first done in a M-file which is later integrated to the C code. The M-file delivers anarray, called sine_buffer with the array size BUFFERSIZE_SINE. sine_buffer contains sine valuesof sine arguments in a range from 0 to π/2.

To access the sine_buffer it is necessary to calculate an index to the argument (Listing 5.5 line44 to 60). In a floating-point application the index could be calculated as:

indexshort =arg f loat

step f loat

step f loat is the step between the sine arguments, declared in the M-file:

step f loat =π

2 · (BUFFERSIZE_SINE− 1)

arg f loat is the summed demodulated signal. Because arg f loat is limited to ±2 · π , the range of thereachable index is:

indexshort =[− 2 · π

step f loat, +

2 · πstep f loat

]

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Implementation

or expressed in terms of the constant BUFFERSIZE_SINE:

indexshort = [−4 · (BUFFERSIZE_SINE− 1), +4 · (BUFFERSIZE_SINE− 1)]

The index range remains the same in the fixed point realization. To calculate the index, it is betterto use a multiplication instead of a division:

indexshort = (argQ_ f ormat ·STEP_INVERSEQ_ f ormat) >> (2 ·Q_FORMAT)

The needed Q format (Q_format) is also calculated in the M-file. It depends on the index range(BUFFERSIZE_SINE). The M-file delivers the shifting number of the Q format (Q_FORMAT). Theshifting always rounded down to the next smaller integer value. In the case that the index is nega-tive, the rounding is erroneous. That is why a negative index must be negated to become positivebefore shifting. After that the sign of the index can be changed to negative again.

Now the calculated index has to be prepared to access to the sine_buffer because the sine_bufferhas only an index range from zero to BUFFERSIZE_SINE-1 (Listing 5.5 line 62 to 162). The indexpreparation will now be explained with an example. Figure 5.33 shows a positive sine wave withbelonging arguments and indexes respectively. The fat printed part of sine wave represents theavailable sine values in sine_buffer. In Figure 5.34 the index preparation is explained pictorially.First an inquiry must be issued to find out in which area the index lies. The first picture shows thefound index area with associated sine values. The following pictures show the new index areaswith the expected values after the prior index manipulation. As described, there are two basicindex manipulations. If the index is in the index area 1 the sine_buffer access can be done directly

sine argument

sine value

0 PI/2 PI*3/2 PI*2PI

0 BUFFERSIZE_SINE-1 (BUFFERSIZE_SINE-1)*2 (BUFFERSIZE_SINE-1)*3 (BUFFERSIZE_SINE-1)*4 index

index%(BUFFERSIZE_SINE-1)

index%(BUFFERSIZE_SINE-1)

index%(BUFFERSIZE_SINE-1)

(BUFFERSIZE_SINE-1)-index

(BUFFERSIZE_SINE-1)-index

Area 1

Area 2

Area 4

Area 3

Area 1 Area 2

Area 4Area 3

Figure 5.33.: Sine values with belonging indexes

with the calculated index. An index in area 2 needs both manipulations. For indexes in area 3,only the first index manipulation is necessary but the found value after sine_buffer access has tobe multiplied with minus one. The same goes for indexes in area 4 with the exception that bothindex manipulations are also needed.

The same principe is applied to the negative sine wave as well as whole cosine wave.

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5.3. Fixed-Point Algorithmsine argument

sine value

0 PI/2 PI*3/2 PI*2PI

0 BUFFERSIZE_SINE-1 (BUFFERSIZE_SINE-1)*2 (BUFFERSIZE_SINE-1)*3 (BUFFERSIZE_SINE-1)*4 index

index%(BUFFERSIZE_SINE-1)

index%(BUFFERSIZE_SINE-1)

index%(BUFFERSIZE_SINE-1)

(BUFFERSIZE_SINE-1)-index

(BUFFERSIZE_SINE-1)-index

Area 1

Area 2

Area 4

Area 3

Area 1 Area 2

Area 4Area 3

Figure 5.34.: Index manipulation

Listing 5.5: PLL demodulator1 void pll_demodulate( short re_buffer[] , short im_buffer[] ,

short out_buffer[])2 {3 int i;4 int flag=0;56 short demo; /*index for sine_buffer access*/7 short index; /*value of demodulation*/89

10 for (i=0;i<BUFFERSIZE_DEMODULATOR;i++)11 {12 /*__calculation of demodulated value, using Q15__*/1314 i_path=(re_buffer[i]*i_path)>>15;15 q_path=(im_buffer[i]*q_path)>>15;1617 demo=q_path-i_path;18 demo=(demo*P_PLL)>>15;1920 out_buffer[i]=(demo*GAIN_PLL)>>15;212223 /*__summation of demodulated signal, using Q3.12__*/2425 demo=demo>>3;26 arg=arg+((demo*K_PLL)>>12);272829 /*__limitation of argument to 2*PI, using Q3.12__*/3031 if (arg>TWO_PI)32 {33 arg=arg-TWO_PI;34 }3536 else if (arg<-TWO_PI)37 {38 arg=arg+TWO_PI;39 }404142 /*__calculation of sine and cosine value of argument__*/4344 /*calculating of index for sine_buffer access, using

new Q format*/4546 index=arg>>REDUCTION;4748 if (index<0)49 {50 index=-index;51 flag=1;52 }5354 index=(index*STEP_INVERSE)>>(2*Q_FORMAT);5556 if (flag==1)57 {

58 index=-index;59 flag=0;60 }6162 /*access on sine_buffer with index*/6364 if (index>=0)65 {66 if (index<(BUFFERSIZE_SINE-1))67 {68 /*sine value*/69 i_path=sine_buffer[index];70 /*cosine value*/71 index=(BUFFERSIZE_SINE-1)-index;72 q_path=sine_buffer[index];73 }74 else if (index<2*(BUFFERSIZE_SINE-1))75 {76 index=index % (BUFFERSIZE_SINE-1);77 /*sine value*/78 index=(BUFFERSIZE_SINE-1)-index;79 i_path=sine_buffer[index];80 /*cosine value*/81 index=(BUFFERSIZE_SINE-1)-index;82 q_path=-sine_buffer[index];83 }84 else if (index<3*(BUFFERSIZE_SINE-1))85 {86 index=index % (BUFFERSIZE_SINE-1);87 /*sine value*/88 i_path=-sine_buffer[index];89 /*cosine value*/90 index=(BUFFERSIZE_SINE-1)-index;91 q_path=-sine_buffer[index];92 }93 else if (index<4*(BUFFERSIZE_SINE-1))94 {95 index=index % (BUFFERSIZE_SINE-1);96 /*sine value*/97 index=(BUFFERSIZE_SINE-1)-index;98 i_path=-sine_buffer[index];99 /*cosine value*/

100 index=(BUFFERSIZE_SINE-1)-index;101 q_path=sine_buffer[index];102 }103 else104 {105 index=index % (BUFFERSIZE_SINE-1);106 /*sine value*/107 i_path=sine_buffer[index];108 /*cosine value*/109 index=(BUFFERSIZE_SINE-1)-index;110 q_path=sine_buffer[index];111 }112 }113 else114 {115 if (index>-(BUFFERSIZE_SINE-1))116 {117 index=-index;

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118 /*sine value*/119 i_path=-sine_buffer[index];120 /*cosine value*/121 index=(BUFFERSIZE_SINE-1)-index;122 q_path=sine_buffer[index];123 }124 else if (index>-2*(BUFFERSIZE_SINE-1))125 {126 index=-(index % (BUFFERSIZE_SINE-1));127 /*sine value*/128 index=(BUFFERSIZE_SINE-1)-index;129 i_path=-sine_buffer[index];130 /*cosine value*/131 index=(BUFFERSIZE_SINE-1)-index;132 q_path=-sine_buffer[index];133 }134 else if (index>-3*(BUFFERSIZE_SINE-1))135 {136 index=-(index % (BUFFERSIZE_SINE-1));137 /*sine value*/138 i_path=sine_buffer[index];139 /*cosine value*/140 index=(BUFFERSIZE_SINE-1)-index;141 q_path=-sine_buffer[index];

142 }143 else if (index>-4*(BUFFERSIZE_SINE-1))144 {145 index=-(index % (BUFFERSIZE_SINE-1));146 /*sine value*/147 index=(BUFFERSIZE_SINE-1)-index;148 i_path=sine_buffer[index];149 /*cosine value*/150 index=(BUFFERSIZE_SINE-1)-index;151 q_path=sine_buffer[index];152 }153 else154 {155 index=-(index % (BUFFERSIZE_SINE-1));156 /*sine value*/157 i_path=-sine_buffer[index];158 /*cosine value*/159 index=(BUFFERSIZE_SINE-1)-index;160 q_path=sine_buffer[index];161 }162 }163 }164 }

Interpolated Lookup Table

To get more precise sine values, an interpolation can be carried out between two saved sine values.As mentioned the Q format of the index depends on the chose BUFFERSIZE_SINE. An index canbe interpreted as a floating-point in the used Q format. Without interpolation, only the integerparts are considered. With interpolation the fraction is also included to calculate the sine value.The fraction is stored in the variable rest . How many digit of the fraction are known, depends onQ_FORMAT. A linear interpolation can be done with the fraction. For that, an extra buffer has to begenerated. This buffer is also prepared in a M-file and later integrated to the C code. It is knownas the sine_grad_buffer and it contains the differences of two adjacent values of the sine_buffer.Figure 5.35 explains how the linear interpolation is implemented. The smaller the step between

sine_buffer[i]

sine_buffer[i+1]

sine_grad_buffer[i]

rest

FORMAT=2Q_FORMAT

correction

Figure 5.35.: Linear interpolation

the saved sine values, the more accurate the sine value is approximated.

correctionrest

=sine_grad_bu f f er[i]

FORMAT

correction = (sine_grad_bu f f er[i] · rest) >> Q_FORMAT

The interpolated sine value is:

interpolated_sine_value = sine_bu f f er[i] + correction

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5.3. Fixed-Point Algorithm

Listing 5.6 shows the part of sine_buffer_access with the necessary new instructions. In Listing5.6 line 14 the fraction of the index is saved in the variable rest before shifting. In Listing 5.6 theneeded correction is computed due to rest and sine_grad_buffer access (for example line 30).Attention has been paid to which sign the correction is added to the sine_buffer value. The signof rest and the values of sine_grad_buffer are always positive. Thus only the sign of the correc-tion must be manipulated. Figure 5.36 and 5.37 show two examples with different signs of thecorrection.

sine value

index

interpolated sine value

sine valuecorrection

sine value

interpolated sine value

sine value

correction

index

Figure 5.36.: Sign of correction changes

Listing 5.6: Interpolated Lookup Table1 /*__calculation of sine and cosine value of argument__*/23 /*calculating of index for sine_buffer access, using new Q

format*/45 index=arg>>REDUCTION;67 if (index<0)8 {9 index=-index;

10 flag=1;11 }1213 index=(index*STEP_INVERSE)>>Q_FORMAT;14 rest=index%FORMAT;15 index=index>>Q_FORMAT;1617 if (flag==1)18 {19 index=-index;20 flag=0;21 }2223 /*access on sine_buffer with index*/2425 if (index>=0)26 {27 if (index<(BUFFERSIZE_SINE-1))28 {29 /*sine value*/30 correction=(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*positive*/31 i_path=sine_buffer[index]+correction;32 /*cosine value*/

33 index=(BUFFERSIZE_SINE-1)-index;34 correction=-(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*negative*/35 q_path=sine_buffer[index]+correction;36 }37 else if (index<2*(BUFFERSIZE_SINE-1))38 {39 index=index % (BUFFERSIZE_SINE-1);40 /*sine value*/41 index=(BUFFERSIZE_SINE-1)-index;42 correction=-(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*negative*/43 i_path=sine_buffer[index]+correction;44 /*cosine value*/45 index=(BUFFERSIZE_SINE-1)-index;46 correction=(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*positive*/47 q_path=-(sine_buffer[index]+correction);48 }49 else if (index<3*(BUFFERSIZE_SINE-1))50 {51 index=index % (BUFFERSIZE_SINE-1);52 /*sine value*/53 correction=(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*positive*/54 i_path=-(sine_buffer[index]+correction);55 /*cosine value*/56 index=(BUFFERSIZE_SINE-1)-index;57 correction=-(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*negative*/58 q_path=-(sine_buffer[index]+correction);59 }60 else if (index<4*(BUFFERSIZE_SINE-1))61 {62 index=index % (BUFFERSIZE_SINE-1);

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sine value

index

interpolated sine value

sine valuecorrection

sine value

interpolated sine value

sine value

correction

index

Figure 5.37.: Sign of correction does not change

63 /*sine value*/64 index=(BUFFERSIZE_SINE-1)-index;65 correction=-(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*negative*/66 i_path=-(sine_buffer[index]+correction);67 /*cosine value*/68 index=(BUFFERSIZE_SINE-1)-index;69 correction=(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*positive*/70 q_path=sine_buffer[index]+correction;71 }72 else73 {74 index=index % (BUFFERSIZE_SINE-1);75 /*sine value*/76 correction=(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*positive*/77 i_path=sine_buffer[index]+correction;78 /*cosine value*/79 index=(BUFFERSIZE_SINE-1)-index;80 correction=-(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*negative*/81 q_path=sine_buffer[index]+correction;82 }83 }84 else85 {86 if (index>-(BUFFERSIZE_SINE-1))87 {88 index=-index;89 /*sine value*/90 correction=(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*positive*/91 i_path=-(sine_buffer[index]+correction);92 /*cosine value*/93 index=(BUFFERSIZE_SINE-1)-index;94 correction=-(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*negative*/95 q_path=sine_buffer[index]+correction;96 }97 else if (index>-2*(BUFFERSIZE_SINE-1))98 {99 index=-(index % (BUFFERSIZE_SINE-1));

100 /*sine value*/101 index=(BUFFERSIZE_SINE-1)-index;102 correction=-(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*negative*/103 i_path=-(sine_buffer[index]+correction);

104 /*cosine value*/105 index=(BUFFERSIZE_SINE-1)-index;106 correction=(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*positive*/107 q_path=-(sine_buffer[index]+correction);108 }109 else if (index>-3*(BUFFERSIZE_SINE-1))110 {111 index=-(index % (BUFFERSIZE_SINE-1));112 /*sine value*/113 correction=(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*positive*/114 i_path=sine_buffer[index]+correction;115 /*cosine value*/116 index=(BUFFERSIZE_SINE-1)-index;117 correction=-(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*negative*/118 q_path=-(sine_buffer[index]+correction);119 }120 else if (index>-4*(BUFFERSIZE_SINE-1))121 {122 index=-(index % (BUFFERSIZE_SINE-1));123 /*sine value*/124 index=(BUFFERSIZE_SINE-1)-index;125 correction=-(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*negative*/126 i_path=sine_buffer[index]+correction;127 /*cosine value*/128 index=(BUFFERSIZE_SINE-1)-index;129 correction=(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*positive*/130 q_path=sine_buffer[index]+correction;131 }132 else133 {134 index=-(index % (BUFFERSIZE_SINE-1));135 /*sine value*/136 correction=(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*positive*/137 i_path=-(sine_buffer[index]+correction);138 /*cosine value*/139 index=(BUFFERSIZE_SINE-1)-index;140 correction=-(sine_grad_buffer[index]*rest)>>Q_FORMAT;

/*negative*/141 q_path=sine_buffer[index]+correction;142 }143 }144 }

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5.3. Fixed-Point Algorithm

5.3.5. Out Filter

It was not possible to design a stable bandpass filter in fixed-point as in the floating-point imple-mentation. Therefore a low-pass filter was designed first. It includes the downsampling in the lastcascade. Then a high-pass filtering is applied at the lower frequency.

Low-Pass

The MATHLAB file lowpass_design_noisefilter.m is used to design the low-pass filter. The specifica-tions are given in Table 5.5. This results in a 13th order filter, which is again splited into one first

Table 5.5.: Filter specifications low-pass filterpass-band edge frequency 3500 Hzstop-band edge frequency 4000 Hzpass-band ripple 2dBstop-band ripple 20 dB

and six second order cascades. To reduce the computing load, the second downsampling is in-cluded in the last cascade of the filter as described in Section 5.3.2. The signal is again additionallydown scaled by 0.8 to avoid overflows in the filter.

High-Pass

The MATLAB file highpass_design_noisefilter.m is used to design the high-pass filter.The specifica-tions are given in Table 5.6. This filter implemented in the direct from II would have to include too

Table 5.6.: Filter specifications high-pass filterpass-band edge frequency 300 Hzstop-band edge frequency 50 Hzpass-band ripple 0.1 dBstop-band ripple 40 dB

much down scaling to avoid overflows. Therefore the implementation structure was changed tothe transposed form. This structure has the advantage, that the delay states range is quite close tothe range of the output signal. The splitting can be done by using [sos,g] =zp2sos(z,p,k,)

z-1 z-1

b2 b1

a1a2

b02

+

-++ ++

-

Figure 5.38.: Block diagram transposed filter structure

without the specific scaling argument. Because the transposed form is more sensitive to overflows

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Implementation

an additional down scaling of 0.5 is applied prior to the high-pass. The total down scaling is stillmuch smaller than the one which would be needed by the direct from II. After the high-pass thesignal is multiplied by 2 to undo the additional down scaling.

5.4. Optimization

5.4.1. Adaptive Seeking of Carrier Angular Frequency

A general problem of FM demodulation is a DC offset due to inexact angular frequency of thequadrature mixer ωM. ωM depends on the FM carrier angular frequency ωT and the sample fre-quency ωA (see Eq.5.1). Because the FM modulation is done with analog components ωT is nota constant, it fluctuates. Thus ωM is also fluctuating. This drift causes the described DC offset inthe demodulated message signal. In the analog FM demodulation this error can be suppressedwith a high-pass filter after demodulation. That can also be done in the digital FM demodulation.A smarter solution is the adaptive seeking of carrier angular frequency. To implement adaptivecontrol algorithms it is necessary to describe mathematically the error which should be corrected.For that reason the Mixed demodulator is prefered to the PLL demodulator. The PLL demodulatoris more difficult to describe mathematically, due to its non linear closed loop.

Figure 5.39 shows a system with an adaptive behavior. The following equations explains how

H(a0,a1,a2,...,aN)

an=fan(e) e(a0,a1,a2,...,aN)=fy(y1,y2)

System representedby the coefficients an

Adapting thecoefficients an due to

the errore(a0,a1,a2,...,aN)

y1

y2

errore(a0,a1,a2,...,aN)

Figure 5.39.: Adapted System

the DC offset error results because of the inexact ωM. ωMe is the actual angular frequency and ωMsthe supposed angular frequency of the quadrature mixer, the I and the Q signal of the quadraturemixer are:

A2

cos((ωMe −ωMs) · T · n + ∆F · 2 · π · T ·n

∑i=0

sN(n)) =A2

cos(η(n))

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5.4. Optimization

and:A2

sin((ωMe −ωMs) · T · n + ∆F · 2 · π · T ·n

∑i=0

sN(n)) =A2

sin(η(n))

Compare with Section 3.2.2.

After the demodulation with the mixed demodulator the demodulated signal is:

sD(n) =η(n)− η(n− 1)

T · ∆F · 2 · π =ωMe −ωMs

∆F · 2 · π + sN(n)

Compare with Section 3.3.4, especially with Eq.3.19.

Now the DC offset error is described due to ωMs:

e(ωMs) =ωMe −ωMs

∆F · 2 · πTherefore ωMe must be:

ωMe = ωMs + e(ωMs) · ∆F · 2 · πFor that, e(ωMs) must be known. A DC offset of a number sequence is calculated as:

e(ωMs) =1N

N−1

∑i=0

sD(i)

The lager N is, as exacter the error will be computed and as less computing time is needed. N alsodetermines the period of the adaptive algorithm. Thus the upper limit of N is given by the speedof the carrier angular frequency change.

ωMe is used to calculate the new coefficients of the IIR filter, which is used for sine and cosinegeneration:

bc2 = −cos(ωMe · T)bs2 = sin(ωMe · T)asc2 = −2 · cos(ωMe · T)

Compare with Section 5.2.1.

If these coefficients are regularly computed the offset error of the demodulated signal sD(n) willdisappear, due to the adaptive seeking of the carrier angular frequency.

Figure 5.40 gives an overview of the structure of the adaptive filter. The effort to implement thecalculation of the IIR Filter coefficients in fixed-point would be very big. Therefore the implemen-tation is only applied to the floating-point implementation.

The adaptive seeking of the carrier angular frequency brings some advantages: The output fil-ter can be reduced to a low-pass, because the DC offset error is corrected. It will improve thesignal quality, if the carrier frequencies of the transmitter and receiver do not match exactly.

5.4.2. Time Optimization

Texas Instruments recommends a three phase code development flow for the C6000 shown inFigure 5.41 citeProgGuide.Phase one is to translate algorithms into C Code, compile and profile the implementation to verifythe correct performance. This phase has been done in the previous section of this chapter. Phasetwo and three are matter of this section. Phase two is further divided into two steps, reducingcomputing load and using compiler specific optimizations.

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Implementation

z-1z-1

bs2

bc2

-zs

c3zs

c1zs

c2

Subs

ampl

ing

Filte

rSe

cond

dow

nsam

plin

gM

ixed

dem

odul

ator

Firs

tdo

wns

ampl

ing

Qua

drat

ure

mix

er

asc2

-+

+

cosi

ne

sine

()

0

12

N

Me

Ms

Dn

sn

FN

ωω

π=

=+

⋅∆⋅

asc2

=-2c

os(ω

MeT

)

bs2=

sin(

ωM

eT)

Adap

tive

IIR fi

lter f

orco

sine

and

sin

ege

nera

tion

Algo

rithm

for a

dapt

ive

IIR fi

lter

ωM

Μe

=

bc2=

-cos

(ωM

eT)

Figure 5.40.: Adaptive seeking of carrier angular frequency

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5.4. Optimization

Code Development Flow to Increase Performance

4-2

4.1 Code Development Flow to Increase Performance

You can achieve the best performance from your C6000 code if you follow thisflow when you are writing and debugging your code:

Yes

No

Complete

Yes

No

Efficientenough?

Write C/C++ codePhase 1:Develop C/C++code

Phase 2:Refine C/C++code

Phase 3:Write linearassembly

More C/C++ optimizations?

No

Yes

No

Yes

Complete

Compile

Profile

Refine C/C++ code

Compile

Profile

Complete

Write linear assembly

Profile

Assembly optimize

Efficientenough?

Efficientenough?

Figure 5.41.: development flow

Reducing Computing Load (Phase 2 - Step 1)

The implementation is reviewed to reduce the computing load of the implemented algorithms.The following changes are applied:

• The scaling of the low-pass filter in the quadrature mixer is included in the output of oscilla-tors of the quadrature mixer. Thus the two numerators of the oscillator IIR filter (see Eq. 5.3

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Implementation

and Eq. 5.4) are multiplied by the scale factor of the low-pass filter.

• The scaling of the low-pass filter in the out filter is included in the arctangent lookup table.All the values in the arctangent lookup table are multiplied with the scaling factor. Thus thelookup table of the optimized implementation fulfils the equation:

out = lp_scale · 1T · kFM

· arctan (in)

• The scaling of high-pass filter in the out filter is included last cascade’s forward feed of thelow-pass filter in the out filter . Hence the numerator of the last cascade is multiplied withthe scale factor.

This changes reduce the used multiplications and therefore the computing load the gain in pro-cessing speed is measured and commented in Chapter 6.4.

Compiler Specific Optimizations (Phase 2 - Step 2)

The C6000 Compiler provides several keywords, pragma directives , and intrinsics to pass infor-mation to the compiler and optimizer.

Pragma directives tell the compile how to treat a certain function, object, or section of code.

Intrinsics are special functions that map directly to inlined C67x instructions or tell the optimizerthat a expression is true to give hints to the optimizer, to optimize the C code quickly.

The Restrict Keyword To help the compiler determine memory dependencies, pointers, refer-ences, or arrays can be qualified with the restrict keyword. The restrict keyword is a type qualifier.Its use represents a guarantee by the programmer that within the scope of the pointer declara-tion the object pointed to can be accessed only by that pointer. This practice helps the compileroptimize certain sections of the code because aliasing information can be more easily determined.The restrict keyword is applied to all the function definitions of the implementation, because allthe buffers passed to the functions are not aliasing.

void quad_mix( short in_buffer[restrict] , short re_buffer[restrict] , short im_buffer[restrict])

void mixed_demodulate( short re_buffer[restrict] , short im_buffer[restrict] , short out_buffer[restrict])

void pll_demodulate( short re_buffer[restrict] , short im_buffer[restrict] , short out_buffer[restrict])

void out_filter( short out_buffer[restrict] , short out_buffer_down[restrict])

The MUST_ITERATE Pragma The MUST_ITERATE pragma specifies to the compiler certainproperties of a loop. The maximum and the minimum trip count can be specified for a loop.In the implementation all loop counts are constants and therefore the compiler can retrieve theneeded information without the explicit declaration of the MUST_ITERATE pragma.

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5.4. Optimization

The DATA_MEM_BANK Pragma The DATA_MEM_BANK pragma aligns a symbol or variableto a specified C6000 internal data memory bank boundary. All the buffers used are aligned that nomemory stall occurs (two access to the same memory bank).

#pragma DATA_MEM_BANK (in_buffer_A, 0);short in_buffer_A[BUFFERSIZE_INPUT];#pragma DATA_MEM_BANK (in_buffer_B, 0);short in_buffer_B[BUFFERSIZE_INPUT];

#pragma DATA_MEM_BANK (re_buffer, 2);short re_buffer[BUFFERSIZE_INPUT];#pragma DATA_MEM_BANK (im_buffer, 4);short im_buffer[BUFFERSIZE_INPUT];

#pragma DATA_MEM_BANK (out_buffer, 0);short out_buffer[BUFFERSIZE_DEMODULATOR];#pragma DATA_MEM_BANK (out_buffer_A, 6);short out_buffer_A[BUFFERSIZE_OUTPUT];#pragma DATA_MEM_BANK (out_buffer_B, 6);short out_buffer_B[BUFFERSIZE_OUTPUT];

This also assures that the buffers are word-aligned.

The _nassert Intrinsic The _nassert intrinsic generates no code. It tells the optimizer that theexpression declared with the assert function is true. This gives a hint to the compiler as to whatoptimizations might be valid.In the implementation we use the _nassert intrinsic to tell the compiler that the buffers passed tothe functions are word-aligned. The WORD_ALIGNEDmacro is defined as followed

#define WORD_ALIGNED(x) (_nassert((( int )(x) & 0x3) == 0))

and is used in the functions.WORD_ALIGNED(XX_buffer);

All this information helps the compiler and optimizer to perform better loop unrolling and soft-ware pipelining to parallelize loop iterations, Section6.4 outlines the time improvements due tothese optimizations.

Software pipelining is a technique used to schedule instructions from a loop so that multipleiterations execute in parallel. The parallel resources on the DSP make it possible to initiatea new loop iteration before previous iterations finish. The goal of software pipelining is tostart a new loop iteration as soon as possible.

Writing Linear Assembly (Phase 3)

In this phase, the time-critical areas are extracted from the C code and rewritten in linear assembly.The assembly optimizer is used to optimize this code. The code is written without being concernedwith the pipeline structure or with assigning registers, with the optimizer will handle.This phase is quite time intensive and therefore only the quadrature mixer is rewritten in linearassembly. The mixer algorithm runs at the highest frequency and uses the most computing time.The rewriting should show the improvement against the optimized C implementations.The complete quad_mix function is transformed to linear assembly. Linear assembly providesdirectives to write a C callable assembly function. The function has to start with the directive.cproc and ends with .endproc . Hence the structure of the quadrature mixer function is

_quad_mix: .cproc in_s , re_b_s , im_b_s....endproc

The time improvement against the C optimized code is rather small compared to the time investedfor the rewriting.The exact timings are measured in Chapter 6.4. Also the clarity of the code sinksand makes it harder for reuse.

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Implementation

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6. Tests And Results

To test and verify the implementations various measurements are carried out and described below.The instruments used are described in Appendix A.3

6.1. Spectrum

The spectrum of a signal gives a general statement about the signal. The Neutrik A2-D can calcu-late the Fast Fourier Transformation (FFT) of the measured signal.

Figure 6.1.: FFT print of demodulated signal

Figure 6.1 shows the FFT print of the demodulated signal with fixed-point mixed demodulator,direct lookup. The spectrum of the other implemented algorithms are quite similar. Comparedto Figure 6.2, which shows the spectrum of a pure sine signal generated with the DSP, it can beseen that the noise floor is mainly introduced by the demodulation algorithm and not by the useddevices. Figure 6.3 shows the spectrum of the same signal used in Figure 6.1 over the maximalrange the A2-D can handle. The Noise reduction between 3200 Hz and 4000 Hz is introduced bythe DAC interpolation filter. The noise above 4000 Hz is the noise level introduced by the devices.This noise level is more than 20dB lower than the noise level introduced by the demodulationalgorithms and will therefore not distort the following measurements.

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Tests And Results

Figure 6.2.: FFT print of DSP generated sine wave

Figure 6.3.: FFT print of demodulated signal for the range of 0 to 20kHz

6.2. Signal Quality (SINAD)

In the simulations (Chapter 4) the SINAD was measured to make a statement about the signalquality. Therefore the SINAD is also measured for the DSP implementation.The Neutrik A2-D has a THD+N Function, which measures the total Harmonic Distortion andnoise by inserting a band-reject (notch) filter into the signal path (Figure 6.4). The THD+N value is

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6.2. Signal Quality (SINAD)

calculated according to Eq. 6.1.

THD + N =(Distortion + Noise)

Signal + (Distortion + Noise)(6.1)

This definition is equal to the definition of the SINAD (see Eq. C.2 in the appendix) used in the

Figure 6.4.: Principle of THD+N Measurement

simulations. Hence the results of the THD+N Function are further referenced as SINAD to keepthe same reference to the simulation.

6.2.1. Mixed Demodulator

The quality of the output signal depends a lot on the accuracy of the implementation of the arct-angent function. First the implementation with the direct table lookup for the arctangent functionis measured with different table sizes. The input FM signal is generated with the HP functiongenerator (Appendix A.3.1), with the following parameters:

Carrier frequency fT 10.7 MHzFrequency deviation∆F 3000 HzMessage signal frequency 100-3700 Hz

Figure 6.5 shows the plot of the SINAD measured for tables’ sizes of 32, 64, 128, 256, and 512. Itshows that a table size greater than 128 does not increase the signal quality much. Thus the tablesize for the direct lookup table is set to 128.

Second the implementation with the interpolation is measured with different table sizes and thesame input signal parameters. Figure 6.6 shows the plot of the SINAD measured for tables’ sizesof 8, 16, and 32. It shows that a table size 16 is the most optimal.

Figure 6.7 shows the comparison of the two implemented versions of the arctangent functionand the floating-point implementation. The floating-point implementation uses the arctangent

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Tests And Results

SINAD dB

-38.0-36.0-34.0-32.0-30.0-28.0-26.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

SIN

AD

[dB

]Table Size 32 Table Size 64 Table Size 128 Table Size 256 Table Size 512

Figure 6.5.: SINAD of fixed-point mixed demodulator with various table sizes for direct lookup

SINAD dB

-38.0-37.0-36.0-35.0-34.0-33.0-32.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

SIN

AD

[dB

]

Table Size 8 Table Size 16 Table Size 32

Figure 6.6.: SINAD of fixed-point mixed demodulator with various table sizes for interpolated lookup

SINAD dB

-38.0-37.0-36.0-35.0-34.0-33.0-32.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

SIN

AD

[dB

]

Interpolation with Table Size 16 Direct with Table Size 128 Floating-Point Implementation

Figure 6.7.: SINAD comparison of direct and interpolated lookup for fixed-point mixed demodulator and thefloating-point implementation

function of the standard math library, which provides several trigonometric, exponential, and hy-perbolic math functions. The direct lookup uses a lookup table with 128 values and the interpo-lated lookup uses two tables with 16 values in each of them. It shows that the interpolated versionachieves better results although it needs less storage. This advantage is paid by the additionalcomputing time used to perform the interpolation.

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6.2. Signal Quality (SINAD)

6.2.2. PLL Demodulator

The signal quality of the PLL demodulator depends on the implementation of the sine and cosinefunction used in the loop and the constants P_PLL and K_PLL. First the implementation with thedirect lookup is measured for different table sizes. The input FM signal is generated with the HPfunction generator (Appendix A.3.1), with the following parameters:

Carrier frequency fT 10.7 MHzFrequency deviation∆F 3000 HzMessage signal frequency 100-3700 Hz

SINAD dB

-40.0

-35.0

-30.0

-25.0

-20.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

SIN

AD

[dB

]

Table Size 16 Table Size 32 Table Size 64 Table Size 128

Figure 6.8.: SINAD of fixed-point PLL demodulator with various table sizes for direct lookup

Figure 6.8 shows the plot of the SINAD measured for tables’ sizes of 16, 32, 64, 128. It shows thata table size of 64 is the most appropriate for the direct lookup implementation.

Second the implementation with the interpolation is measured with different table sizes and thesame input signal parameters. Figure 6.9 shows the plot of the SINAD measured for table sizes of

SINAD dB

-40.0

-35.0

-30.0

-25.0

-20.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

SIN

AD

[dB

]

Table Size 16 Table Size 32 Table Size 64 Table Size 128

Figure 6.9.: SINAD of fixed-point PLL demodulator with various table sizes for interpolated lookup

16, 32, 64, and 128.Figure 6.10 shows the comparison of the direct lookup, the interpolated lookup and the floating-point implementation which uses the math library functions. The direct lookup uses a lookuptable with 64 values and the interpolated lookup uses two tables with 32 values in each of them.It shows that the interpolated version is not achieving a better results although it uses the sameamount of storage and even more computing time. A general problem of a linear sine interpolationis described pictorially in Figure 6.11. The bigger the step between two saved sine values is chosen,

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Tests And Results

SINAD dB

-40.0

-35.0

-30.0

-25.0

-20.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

SIN

AD

[dB

]Interpolation with Table Size 32 Direct with Table Size 64 Floating-Point Implementation

Figure 6.10.: SINAD comparison of direct and interpolated lookup for fixed-point PLL demodulator and thefloating-point implementation

sine_buffer[i]

sine_buffer[i+1]

correction

exact sine value

interpolatedsine value

error

Figure 6.11.: Error of linear interpolation

the bigger is the error of interpolation. After the careful investigation, it is found that this fact isnot responsible for the less than expected improvement. The main reason is that the PLL outputis not directly dependent on the sine and cosine values. Thus an exact sine and cosine calculationwith an interpolation does not bring along the expected improvement. Therefore the direct lookupimplementation is the best choice and will be used.

6.2.3. Comparison of Mixed and PLL Demodulator

Figure 6.12 compares the different demodulation implementations. The floating- and the fixed-point implementation of the mixed demodulator show nearly the same behavior. The fixed-pointimplementation of the PLL has shown a worse signal quality than that of the floating-point imple-mentation for lower frequencies. In general the PLL shows a worse behavior for low frequenciesthan that of the mixed demodulator, especially around 1000 Hz. All the implementations show aslight decrease of signal quality around the frequency of 1000 Hz.

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6.3. Robustness (S/N)

SINAD dB

-40.0

-35.0

-30.0

-25.0

-20.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

SIN

AD

[dB

]

mixed floating-point PLL floating-point mixed fixed-point PLL fixed-point

Figure 6.12.: SINAD comparison of different demodulator implementations

6.3. Robustness (S/N)

To test the robustness of the implementations noise is added to the FM signal before it is applied tothe demodulator and the signal-to-noise ratio (S/N) is measured at the demodulated signal. Thenoise is generated with a second function generater.With Neutrik A2-D the S/N can not be measured directly, but it can be determined from theTHD+N measurement (see Section 6.2), when everything other than the signal (S) is considered asnoise (NT), including the distortions (D).

1− (THD + N)(THD + N)

=1− D+N

S+D+ND+N

S+D+N

=S + D + N − (D + N)

D + N=

SD + N

=S

NT

This calculation is equal to the one used in the simulations.The implementations are tested with two different noise levels. For the first the S/N of the FMsignal is set to 20dB and for the second it is set to 15dB. Figure 6.13 shows the oscilloscope view ofthe FM signal without noise as it is generated by the function generator. Figure 6.14 shows the FMsignal with added noise which is applied to the input for the robustness measurements.

Figure 6.13.: Oscilloscope print FM sig-nal normal

Figure 6.14.: Oscilloscope print FM sig-nal with noise added

Figure 6.15 shows the spectrum of the demodulated signal with an FM input signal which has anS/N ratio of 20dB. The fixed-point mixed implementation with the direct table lookup is used.Compared to Figure 6.1 which shows the same spectrum for an FM signal without noise, it showsclearly that the noise naturally grows. A slight deformation of the noise due to the derivation canalso be observed.

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Tests And Results

Figure 6.15.: Spectrum of an demodulated signal with an S/N ratio of 20dB by the FM signal

6.3.1. Mixed Demodulator

For the mixed demodulator algorithm the robustness of the fixed-point implementation with thedirect lookup and the one with the interpolated lookup is measured. Further also the floating-point implementation is tested. Figure 6.16 shows the results, when the input FM signal has a S/N

S/N dB

15.0

20.0

25.0

30.0

35.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

S/N

[dB

]

Floating-Point Fixed-Point Direct Lookup Fixed-Point Interpolated Input S/N

Figure 6.16.: S/N of the mixed demodulated signal with a S/N of 20dB at the input FM signal

of 20dB. Figure 6.16 shows the results, when the input FM signal has a S/N of 15dB. Both figuresalso show the S/N of the input FM signal as a reference.It can be seen that all the implementations have an almost identical behavior. The S/N ratio isimproved compared to the input ratio for all frequencies. It is slightly better for higher frequenciesthan for lower ones.

6.3.2. PLL Demodulator

For the PLL demodulator algorithm the fixed-point with the direct lookup and the floating-pointimplementation are tested with noise added to the input signal. Figure 6.16 shows the results,when the input FM signal has a S/N of 20dB. Figure 6.16 shows the results, when the input FM

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6.3. Robustness (S/N)

S/N dB

10.0

15.0

20.0

25.0

30.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

S/N

[dB

]

Floating-Point Fixed-Point Direct Lookup Fixed-Point Interpolated Input S/N

Figure 6.17.: S/N of the mixed demodulated signal with a S/N of 15dB at the FM input signalS/N dB

15.0

20.0

25.0

30.0

35.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

S/N

[dB

]

Floating-Point Fixed-Point Direct Lookup Input S/N

Figure 6.18.: S/N of the PLL demodulated signal with a S/N of 20dB at the input FM signalS/N dB

10.012.014.016.018.020.022.024.026.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

S/N

[dB

]

Floating-Point Fixed-Point Direct Lookup Input S/N

Figure 6.19.: S/N of the PLL demodulated signal with a S/N of 15dB at the FM input signal

signal has a S/N of 15dB. Again both figures also show the S/N of the input FM signal for refer-ence.

6.3.3. Comparison of Mixed and PLL Demodulator

Figure 6.20 compares the different fixed-point demodulation implementations. The mixed demod-ulator algorithm is more robust than the PLL demodulator algorithm. It can be seen that the PLLshows a poor behavior at around 1000 Hz, which also could be observed by the signal qualitymeasurements in Section 6.2.

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Tests And Results

SINAD dB

10.0

15.0

20.0

25.0

30.0

35.0

0 500 1000 1500 2000 2500 3000 3500 4000Frequency [HZ]

SIN

AD

[dB

]Mixed Dem. -20dB Mixed Dem. -15dB PLL Dem. -20dB PLL Dem. -15dB

Figure 6.20.: S/N of the PLL demodulated signal with a S/N of 15dB at the FM input signal

6.4. Computing Time

6.4.1. Demodulation Functions

To benchmark the implementation each of the called functions is timed. This is made with theDSP/BIOS STS module (statistics objects manager) and the CLK_gethtime function of theDSP/BIOS. CLK_gethtim e returns the number of high resolution clock cycles that have occurred.The time measurement are included between preprocessor directives to easily turn it on and off.Therefore function calls look like:

#if FM_DEM_CF_FUNC_TIME_STSSTS_set(&mix_sts,CLK_gethtime());

#endifquad_mix(in_buffer_ptr,re_buffer,im_buffer);#if FM_DEM_CF_FUNC_TIME_STS

STS_delta(&mix_sts,CLK_gethtime());#endif

#if FM_DEM_CF_FUNC_TIME_STSSTS_set(&dem_sts,CLK_gethtime());

#endif#if (FM_DEMODULATOR==FM_PLL_DEM)

pll_demodulate(re_buffer,im_buffer,out_buffer);#elif (FM_DEMODULATOR==FM_MIXED_DEM)

mixed_demodulate(re_buffer,im_buffer,out_buffer);#else

#error No demodulator algorithm defined#endif#if FM_DEM_CF_FUNC_TIME_STS

STS_delta(&dem_sts,CLK_gethtime());#endif

#if FM_DEM_CF_FUNC_TIME_STSSTS_set(&filter_sts,CLK_gethtime());

#endifout_filter(out_buffer,out_buffer_ptr);#if FM_DEM_CF_FUNC_TIME_STS

STS_delta(&filter_sts,CLK_gethtime());#endif

STS_set can be used in conjunction with STS_delta to benchmark program performance.STS_set saves a value as the previous value in an STS object. STS_delta subtracts this savedvalue from the value it is passed.

The functions of the different implementations of the phases explained in Section 5.4.2 are com-piled with the different optimization levels of the compiler. Additionally the debug information isturned off combined with the highest optimization level (-o3 & no Debug).

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6.4. Computing Time

-o0

• Performs control-flow-graph simplification

• Allocates variables to registers

• Performs loop rotation

• Eliminates unused code

• Simplifies expressions and statements

• Expands calls to functions declared inline

-o1 Performs all -o0 optimizations, and:

• Performs local copy/constant propagation

• Removes unused assignments

• Eliminates local common expressions

-o2 Performs all -o1 optimizations, and:

• Performs software pipelining

• Performs loop optimizations

• Eliminates global common subexpressions

• Eliminates global unused assignments

• Converts array references in loops to incrementedpointer form

• Performs loop unrolling

-o3 Performs all -o2 optimizations, and:

• Removes all functions that are never called

• Simplifies functions with return values that are neverused

• Inlines calls to small functions

• Reorders function declarations so that the attributesof called functions are known when the caller is opti-mized

• Propagates arguments into function bodies when allcalls pass the same value in the same argument posi-tion

• Identifies file-level variable characteristics

The results are shown in Figures 6.21 to 6.25. It shows that the demodulation functions did notimprove as much as the quadrature mixer and out filter functions. In the mixed demodulator thisis caused by the division which is as a function call. Therefore a branch occurs in the loop andthe optimizer is not able to parallelize the loop with software pipelining. In the PLL demodulatorimplementation the if-then-else structure to determine the sine and cosine also makes it impossibleto perform those optimization.

050

100150200250300350400450

compiler optimization level

time

[µs]

simple C impl. (Phase 1) 421 356 298 194 193 163.4optimized C (Phase2 Step1) 392 337 282 174 174 147.4comp. spez. C (Phase2 Step2) 391 338 261 37 37 35.9Linear Assembly (Phase3) 203 202 131 29 29 27.1

none -o0 -o1 -o2 -o3 -o3 & no Debug

Figure 6.21.: Time measurement results Quadrature mixer ( quad_mix )

Figure 6.26 compares the performance of mixed demodulation function with direct lookup, themixed demodulation function with interpolated lookup and the PLL demodulation function. Thecomparison is carried out with the most time optimized implementation. The difference betweenthe direct lookup and the interpolated lookup implementation of the mixed demodulator is verysmall, less than 9% when compiled with the highest optimization level. Hence the additionalcomputing load due to the interpolation is rather small compared to the benefit of less storage andbetter signal quality (see Section 6.2.1).The PLL demodulator uses clearly more computing time then the two mixed demodulators al-though it does not use a division. The computing load is introduced by the complex if-then-elsestructure to perform the sine and cosine functions.

87

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Tests And Results

0

5

10

15

20

25

30

35

compiler optimization level

time

[µs]

simple C impl. (Phase 1) 32 23 19 17 17 12.6optimized C (Phase2 Step1) 32 23 19 17 17 12.6comp. spez. C (Phase2 Step2) 32 23 19 17 16 12.4

none -o0 -o1 -o2 -o3 -o3 & no Debug

Figure 6.22.: Time measurement results mixed demodulator direct lookup ( mixed_demodulate )

0

5

10

15

20

25

30

35

40

compiler optimization level

time

[µs]

simple C impl. (Phase 1) 35 34 21 19 19 13.5optimized C (Phase2 Step1) 35 34 21 19 19 13.5comp. spez. C (Phase2 Step2) 35 34 21 19 19 13.5

none -o0 -o1 -o2 -o3 -o3 & no Debug

Figure 6.23.: Time measurement results mixed demodulator interpolated lookup ( mixed_demodulate )

0

10

20

30

40

50

60

70

compiler optimization level

time

[µs]

simple C impl. (Phase 1) 64 43 33 31 31 21.6optimized C (Phase2 Step1) 64 43 33 31 31 21.6comp. spez. C (Phase2 Step2) 63 41 33 31 31 21.6

none -o0 -o1 -o2 -o3 -o3 & no Debug

Figure 6.24.: Time measurement results PLL demodulator direct lookup ( pll_demodulate )

88

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6.4. Computing Time

020406080

100120140160180200

compiler optimization level

time

[µs]

simple C impl. (Phase 1) 189 140 103 48 48 46.4optimized C (Phase2 Step1) 162 120 91 47 47 45.1comp. spez. C (Phase2 Step2) 175 126 95 16 16 15.6

none -o0 -o1 -o2 -o3 -o3 & no Debug

Figure 6.25.: Time measurement results out filter ( out_filter )

0

10

20

30

40

50

60

70

compiler optimization level

time

[µs]

mixed_demodulate 32 23 19 17 16 12.4mixed_demodulate (inter.) 35 34 21 19 19 13.5pll_demodulate 63 41 33 31 31 21.6

none -o0 -o1 -o2 -o3 -o3 & no Debug

Figure 6.26.: Time comparison of the demodulation functions

89

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Tests And Results

6.4.2. Interrupt Routines

To measure the executing time of the interrupt routines (EDMA interrupt ,DAC interrupt anddemodulate software interrupt (SWI)) the same measurement proceed as in Section 6.4.1 is applied.At the beginning of the routine a STS_set call is added. The STS_delta call is included at theend of the routine.

3.3 1.0

55.9

3.3 1.0

57.1

3.3 1.0

69.6

0.010.020.030.040.050.060.070.080.0

EDMA INT ADC INT SWI INTinterrupt routine

time

[µs]

mixed direct mixed interpolated pll

Figure 6.27.: Executing time of interrupt routines

The results are shown in Figure 6.27. The executing time for the hardware interrupt routines(EDMA INT , DAC INT) is for all implementations the same, because they are implementedequally, the difference is in the software interrupt where the actual demodulation is performed.The execution time of the hardware interrupts is very short compared to the time used by the soft-ware interrupt. This is as mentioned in Section 5.1.6 because the hardware interrupts are kept asshort as possible and all the computing is executed in the software interrupt.

6.4.3. CPU Processing Load

The DSP/BOIS tool CPU Load Graph displays a graph of the target CPU processing load. TheCPU load is defined as the amount of time not spent performing the low-priority task that runswhen no other thread needs to run (idle loop). Thus all the other instrumenting is turned off andthe CPU load graph shows the CPU load introduced by the FM demodulation.Figure 6.28 shows the CPU processing load for the time optimized implementations compiledwith the highest optimization level. All the implemented algorithms use less than 6% of the CPUprocessing. The difference between the different implementations is less than 0.1%.

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6.4. Computing Time

5.30 5.31 5.360.00

10.0020.0030.0040.0050.0060.0070.0080.0090.00

100.00

CPU

pro

cess

ing

load

[%]

mixed direct mixed interpolated pll

Figure 6.28.: CPU processing load

91

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Tests And Results

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7. Conclusions and Recommendations

The given and planned objectives have been achieved. The mixed and the PLL demodulator al-gorithms are implemented on a DSP. The implementations are optimized in computing load andhave been tested for signal quality and robustness.

The PLL demodulator function needs nearly twice as much computing time as the mixed demod-ulator function. Hence the total computing time of the PLL implementation is about 20% higherthan the one of the mixed demodulator. Also the signal quality of the PLL is worse. There aresome distortions around 1000Hz. The distortion are due to the non-linear closed loop.For the given specifications, the mixed demodulator is clear a better choice. The difference in com-puting time between the implementation with the direct lookup and the interpolated lookup tableis smaller than 3%, but the used storage space is lower and the signal quality is better. Thereforethe implementation with the interpolated lookup table is preferred.The PLL would be useful for applications with a lower frequency range. That would reduce thesignal size in the PLL and so avoid the distortions. A smaller derivation brings along the sameeffect.

The CPU processing load is lower than 6% for all the optimized implementations. This couldstill be reduced by also rewriting the demodulation and the filter functions in linear assembly oreven hand optimized assembly.An implementation of the adaptive seeking of the carrier angular frequency in fixed-point wouldimprove the signal quality. The output filter could then be reduced to a low-pass filter becausethere is no DC offset yet. That will also decrease the computing time.Some improvements could be done in the PLL implementation. In the lookup table includes onlythe values of a fourth of sine wave. That brings along more queries and calculations to calculatethe sine values. If more sine values are stored in the lookup table less queries and calculations areneeded. Hence the computing time will be reduced but the needed storage space increases.

The floating-point implementations are not as slow as excepted. In this work the floating-pointimplementations are not time optimized. Because the latest DSP generations support both thefloating-point and fixed-point, it is worth optimizing them. The effort of a floating-point imple-mentation is much lesser than a fixed-point implementation.

Singapore 11.1.2002 Christoph Haller Franz Schnyder

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Conclusions and Recommendations

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A. Equipment

A.1. Hardware

A.1.1. DSP Board

Name No. TMS320C6711DSK

Manufacturer Texas Instruments

Description DSP Starter Kit : The DSK is a parallel port interfaced platform that allows TI, its cus-tomers, and third-parties, to efficiently develop and test applications for the C6711. The DSKconsists of a C6711-based printed circuit board that will serve as a hardware reference designfor TI’s customers’ products. With extensive host PC and target DSP software support, in-cluding bundled TI tools, the DSK provides ease-of-use and capabilities that are attractive toDSP engineers.

Key Features

• 150-MHz C6711DSP capable of executing 900 million floating-point operations per sec-ond (MFLOPS)

• Dual clock support; CPU at 150MHz and external memory interface (EMIF) at 100MHz

• Parallel port controller (PPC) interface to standard parallel port on a host PC (EEP orbi-directional SPP support)

• 16M Bytes of 100 MHz synchronous dynamic random access memory (SDRAM)

• 128K Bytes of flash programmable and erasable read only memory (ROM)

• 8-bit memory-mapped I/O port

• Embedded JTAG emulation via the parallel port and external XDS510 support

• Host port interface (HPI) access to all DSP memory via the parallel port

• 16-bit audio codec

• Onboard switching voltage regulators for 1.8 volts direct current (VDC) and 3.3 VDC

• Six light emitting diode (LED) indicators (one power-on indicator, one TBC-in-use indi-cator, one reset-active indicator, and three user-defined indicators)

• External desktop operation utilizing an external power supply and IEEE1284 parallelcable or an XDS510 emulator. Power supply and IEEE1284 parallel cable are providedwith the DSK.

• Expansion memory and peripheral connectors for daughterboard support

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Equipment

A.1.2. Analog-to-Digital Converter

Name No. THS1408EVM

Manufacturer Texas Instruments

Description Analog Digital Converter: The THS1408 evaluation module (EVM) provides a plat-form for evaluating the THS1408 analog-to-digital converter (ADC) under various signal,reference, and supply conditions.

Key Features

• 14-Bit Resolution

• 8 MSPS

• Internal Reference

• Timing Compatible with TMS320C6000 DSP

A.2. Software

A.2.1. DSP IDE

Name No. Code Composer Studio

Version 2.00.00

Manufacturer Texas Instruments

Description Integrated Development Environment (IDE) : Code Composer Studio (CCS) softwareis a fully IDE supporting Texas Instruments industry leading DSP platforms. Code ComposerStudio integrates all host and target tools in a unified environment to simplify DSP systemconfiguration and application design. This easy to use development environment allows DSPdesigners of all experience levels full access to all phases of the code development process.

A.2.2. MATLAB

Name No. MATLAB & SIMULINK

Version 6.0.0.88 Release 12

Manufacturer The MathWorks

Description MATLAB is a high-performance language for technical computing. It integrates com-putation, visualization, and programming in an easy-to-use environment where problemsand solutions are expressed in familiar mathematical notation.

A.3. Signal And Measure Instruments

A.3.1. Signal Generator

Name No. 33120A

Manufacturer Hewlett Packard

Description 15 MHz Function / Arbitrary Waveform Generator

96

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A.3. Signal And Measure Instruments

A.3.2. Oscilloscope

Name No. 54645A

Manufacturer Hewlett Packard

Description 100 MHz Oscilloscope (200 MSa/s)

A.3.3. Audio Measurement System

Name No. A2-D Audio Measurement System

Manufacturer Neutrik Cortex Instruments

Description High performance two-channel audio test set. With a high performance analyzerproviding a wide variety of measurement functions.

97

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Equipment

98

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B. Abbreviations and Symbols

B.1. Formula Symbols

b bandwidth HzfA sample rate HzfN message frequency HzfT carrier frequency HzJn(x) bessel functionk harmonic distortionkFM FM Constantq quantization intervalsbasis complex baseband signalsD demodulated message signalsFM FM modulated signalsN message signalsimag Imaginary baseband signal (cos)sreal Real baseband signal (cos)sT carrierS/N signal to noise ratio dBT sample time sec∆F frequency derivationφFM FM argument functionωT carrier frequency rad/secωN message frequency rad/secµ Modulation index

99

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Abbreviations and Symbols

B.2. AbbreviationsADC Analog to Digital ConverterBSL Board Support LibraryCCS Code Composer Studioclk ClockCPU Center Processing UnitCSL Chip Support LibraryDAC Digital to Analog ConverterDSK DSP Starter KitDSP Digital Signal ProcessorEDMA Enhanced Direct Memory AccessEMIF External Memory InterfaceEq EquationEVM Evaluation ModuleFFT Fast Fourier TransformFIR Finite Inpulse ResponseFM Frequency ModulationGSM-R Global System for Mobile Communication - RailwayHSR Fachhochschule RapperswilHW HardwareHWI Hardware InterruptI InphaseIDE Integrated Development EnvironmentIIR Infinite Inpulse ResponseINT InterruptIRQ Interrupt RequestMcBSP Multichannel Buffered Serial PortNTU Nanyang Technological UniversityPLL Phase-Locked LoopPMR Private (Professional) Mobile RadioQ QuadraturephaseS/N Signal to Noise RatioSINAD Signal, Noise and DistortionSWI Software InterruptTCC Transfer Complete CodeTERRA Terrestrial Trunked RadioTERRAPOL Digital PMR technologyTHD+N Total Harmonic Distortion and NoiseTi Texas InstrumentsVCO Voltage Controlled OscillatorVHF Very High Frequency

100

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C. Simulation Measure Algorithms

C.1. Harmonic distortion k and SINAD

A statement about the signal quality can be done by the harmonic distortion factor k. It shows therate of nonlinear distortions in a signal. It is defined as:

k =

√√√√ A22· f + A2

3· f + A24· f · · ·

A2f + A2

2· f + A23· f + A2

4· f · · ·(C.1)

It is rather difficult to measure all the single amplitudes of the oscillation. Therefore the followingis used:

k =

√Ptot − Pf

Ptot(C.2)

The power is calculated over a time period. Ptot is the power of the hole signal. To calculatethe power Ptot − Pf the signal is first filtered with a band-stop and calculated afterwards. Theso calculated factor corresponds to the harmonic distortion if there are just the harmonics andno noise. If this is not the case, not only the harmonics are included, but also the noise. The socalculated factor is called SINAD ( signal, noise and distortion ).For the simulation the formula can be written as:

k =

√√√√ TTsim

· ∑ (s (n) ∗ BSP (z))2

TTsim

· s2 (n)=

√∑ (s (n) ∗ hBSP (n))2

s2 (n)

A MATLAB function was kfaktor created.

kfaktor.m

function k=kfaktor(signal,f0,fa)

% k=kfaktor(signal,f0,fa)%% Berechnet den Klirrfaktor k eines Signals mit frequenz f0 welches% mit einer Frequenz von fa abgetastet wurde mit der Hilfe einer% Bandsperre bei f0% Wichtig signal muss mindestens 2000 Werte beinhalten

buffer= size (signal);buffer=buffer(1); %SignallaengefN=fa/2; %BezugsfrequenzN=1000; %FIR Filterl"ange

if (buffer < (2*N))error (’Signal Vektor muss mindestens 2000 Werte enthalten’ );end

%FIR BandsperreB=fir1(N,[(f0-100)/fN (f0+100)/fN ],’stop’ ,kaiser(N+1,8));

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Simulation Measure Algorithms

signal2= filter (B,1,signal);

%Abschneiden des Einschwingen des Filterssignal = signal(N:buffer);signal2 = signal2(N:buffer);

k=sqrt (( sum(signal2.^2))/( sum(signal.^2)));

C.2. Signal to noise ratio S/N

Also to measure the signal to noise ratio a MATLAB function snr was programmed. It calculatesthe S/N ration in dB. With a bandpass the message signal is filtered out of the hole signal. This issubtracted from the hole signal. The result is the noise.

snr.m

function sn=snr(signal,f0,fa)% sn=snr(signal,f0,fa) [in dB]%% snr berechnet den Signal Noise abstand in einem signal% das mit fa abgetastet ist f0 ist die Frequenz des Signal oder% die Start- und und Endfrequenz des [fstart fstop] Signals.% sn ist eine Angabe in dB.

buffer= size (signal);buffer=buffer(1); %SignallaengefN=fa/2; %BezugsfrequenzN=1000; %FIR Filterl"ange

if (buffer < (2*N))error (’Signal Vektor muss mindestens 2000 Werte enthalten’ );end

%Filter berechnungif ( size (f0)==[ 1 2])

B=fir1(N,[(f0(1))/fN (f0(2))/fN],kaiser(N+1,8));else

B=fir1(N,[(f0-100)/fN (f0+100)/fN],kaiser(N+1,8));endreinsignal = filter (B,1,signal); noise = signal-reinsignal;

%Abschneiden des Einschwingen des Filtersreinsignal = reinsignal(N:buffer); noise = noise(N:buffer); signal = signal(N:

buffer);

psig= sum(reinsignal.^2); pnoi= sum(noise.^2);sn=psig/pnoi; sn=10* log10 (sn);

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D. Bibliography

D.1. English Books

[1] N. Kehtarnavaz and B. Simsek, C6x-Based Digital Signal Processing, Prentice Hall, New Jersey2000.

[2] N. Dahnoun, DSP implementation using the TMS320C6000 DSP platform, Prentice Hall, HarlowEngland 2000.

[3] MathWorks, Simulink r Dynamic System Simulation for Matlab r (Version 4), MathWorks, NatickNovember 2000.

D.2. German Books

[4] P. Gerdsen and P. Kröger, Digitale Signalverarbeitung in der Nachrichtenübertragung, Springer-Verlag, Berlin-Heidelberg 1993.

[5] Dr. A. Schüeli, Digitale Signalverarbeitung, Rapperswil, Version 2001.

[6] K. D. Kammeyer and K. Kroschel, Digitale Signalverarbeitung, Teuber Studienbücher, Stuttgart1996.

[7] E. Pehl, Digitale und analoge Nachrichtenübertragung, Hüntig, Heidelberg 1998.

[8] E. Stadler, Modulationsverfahren, Vogel-Verlag ,Würzburg 1976.

[9] H.D. Lüke, Signalübertragung, Springer-Verlag, Berlin-Heidelberg 1985.

D.3. Texas Instruments Documentation

[10] SPRA509 Aaron Kofi Aboagye, Overflow Avoidance Techniques in Cascaded IIR Filter Implemen-tations on the TMS320 DSP’s Texas Instruments , May 1999.

[11] SLAU045A , THS14xx/5691 EVM for the THS14xx ADC and THS56xx DAC Families User’s GuideTexas Instruments , September 2000.

[12] SLAS248 , Data Sheet THS1408 Analog-to-Digital Converter Texas Instruments , December 1999.

[13] SLAS202B , Data Manual TLC320AD535C/I Dual Channel Voice/Data Codec Texas Instruments ,2000.

[14] SPRS088B , Data Sheet TMS320C6711, TMS320C6711B floating-point digital signal processorsTexas Instruments , February 1999.

103

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Bibliography

[15] SPRU198F , TMS320C6000 Programmer’s Guide Texas Instruments , February 2001.

[16] SPRU190D , TMS320C6000 PeripheralsReference Guide Texas Instruments , February 2001.

[17] SPRU401B , TMS320C6000 Chip Support Library API UserŠs Guide Texas Instruments , April2001.

[18] SPRU432 , TMS320C6000 DSK Board Support Library API UserŠs Guide Texas Instruments ,October 2000.

104

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E. Simulink models

E.1. Baseband-Delaydemodulator

Idealer Basisband-Verzögerungsdemodulator

Callback Routines:InitFcn -> init_verzoegerungIdeal.m StopFcn -> stop_verzoegerungIdeal.m

asin

arkussinus

imag

To Workspace7

real

To Workspace6

imagnorm

To Workspace5

realnorm

To Workspace4

fmsignal

To Workspace3

tvec

To Workspace2

outsignal

To Workspace1

insignal

To Workspace

s

Real (Cos)

Imag (Sin)

QuadraturMischer

Quad Mischer

Product1

Product

1/(T*K)

Normierung auf 1

1

Gain2

sN sFMFMModulator

FM Modulator

Out1

Eingangssignal

z-1

Delay1

z-1

Delay

Clock

In1

In2

Out1

Out2

ReelerAmplituden

Normalisierer

Amplituden Normalisierer1

PUSH

Alle Graphen Schliessen

sFM

sImag

sReal

sN

sRealNV

sImagNV

sRealN

SImagN

Figure E.1.: Blockschaltbild Simulink Aufbau Idealer Baseband-Delaydemodulator

105

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Simulink models

DSP

Bas

isba

nd-V

erzö

geru

ngsd

emod

ulat

orC

allb

ack

Rou

tines

:In

itFcn

-> in

it_ve

rzoe

geru

ngQ

ant.m

Stop

Fcn

-> s

top_

verz

oege

rung

Qua

nt.m

imag

To W

orks

pace

7

real

To W

orks

pace

6

imag

norm

To W

orks

pace

5

real

norm

To W

orks

pace

4

fmsi

gnal

To W

orks

pace

3

tvec

To W

orks

pace

2

outs

igna

l

To W

orks

pace

1

insi

gnal

To W

orks

pace

Satu

ratio

n7

Satu

ratio

n6

Satu

ratio

n5

Satu

ratio

n4

Satu

ratio

n3

Satu

ratio

n2

Satu

ratio

n1

Satu

ratio

n

Qua

ntiz

er9

Qua

ntiz

er7

Qua

ntiz

er6

Qua

ntiz

er5

Qua

ntiz

er4

Qua

ntiz

er3

Qua

ntiz

er2

Qua

ntiz

er1

s

Rea

l (C

os)

Imag

(Sin

)

Qua

drat

urM

isch

er

Qua

d M

isch

er

Prod

uct1

Prod

uct

1/(T

*K)

Nor

mie

rung

au

f 1

1 Gai

n2

sNsF

MFM

Mod

ulat

or

FM M

odul

ator

Out

1

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angs

sign

al

butte

r

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ital I

IRFi

lter

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ay1

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ay

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ck

asin

Tabe

lle

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ssin

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belle

2

In1

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1

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2

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ler

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itude

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orm

alis

iere

r

Ampl

itude

n N

orm

alis

iere

r

PUSH

Alle

Gra

phen

Sch

liess

en

sRea

l

sIm

ag

sRea

lNV

sIm

agN

V

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M

Figure E.2.: Blockschaltbild Simulink Aufbau DSP Baseband-Delaydemodulator

106

Page 127: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

E.1. Baseband-Delaydemodulator

DSP

Bas

isba

nd-V

erzö

geru

ngsd

emod

ulat

or m

it N

oise

Cal

lbac

k R

outin

es:

InitF

cn ->

init_

verz

oege

rung

Noi

se.m

Stop

Fcn

-> s

top_

verz

oege

rung

Noi

se.m

fmU

nois

e

To W

orks

pace

4

fmsi

gnal

To W

orks

pace

3

tvec

To W

orks

pace

2

nois

e

To W

orks

pace

10

outs

igna

l

To W

orks

pace

1

insi

gnal

To W

orks

pace

Satu

ratio

n7

Satu

ratio

n6

Satu

ratio

n5

Satu

ratio

n4

Satu

ratio

n3

Satu

ratio

n2

Satu

ratio

n1

Satu

ratio

n

Qua

ntiz

er9

Qua

ntiz

er7

Qua

ntiz

er6

Qua

ntiz

er5

Qua

ntiz

er4

Qua

ntiz

er3

Qua

ntiz

er2

Qua

ntiz

er1

s

Rea

l (C

os)

Imag

(Sin

)

Qua

drat

urM

isch

er

Qua

d M

isch

er

Prod

uct1

Prod

uct

1/(T

*K)

Nor

mie

rung

au

f 1

Gau

ssia

n

Gau

ssia

n N

oise

Gen

erat

or

1 Gai

n2

sNsF

MFM

Mod

ulat

or

FM M

odul

ator

Out

1

Eing

angs

sign

al

butte

r

Dig

ital I

IRFi

lter1

z-1

Del

ay1

z-1

Del

ay

Clo

ck

asin

Tabe

lle

Arku

ssin

usTa

belle

2

In1

In2

Out

1

Out

2

Ree

ler

Ampl

itude

nN

orm

alis

iere

r

Ampl

itude

n N

orm

alis

iere

r

PUSH

Alle

Gra

phen

Sch

liess

en

sRea

l

sIm

ag

sRea

lNV

sIm

agN

V

sNsF

M

Figure E.3.: Blockschaltbild Simulink Aufbau DSP Baseband-Delaydemodulator mit gausschem Rauschen

107

Page 128: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Simulink models

E.2. Phase-Adapter-Demodulator

Idea

ler P

hase

nwan

dler

Dem

odul

ator

Cal

lbac

k R

outin

es:

InitF

cn ->

init_

phas

enw

andl

erId

eal.m

Stop

Fcn

-> s

top_

phas

enw

andl

erId

eal.m

1/(T

*K)

norm

ieru

ng a

uf 1

imag

To W

orks

pace

7

real

To W

orks

pace

6

fmsi

gnal

To W

orks

pace

3

tvec

To W

orks

pace

2

outs

igna

l

To W

orks

pace

1

insi

gnal

To W

orks

pace

s

Rea

l (C

os)

Imag

(Sin

)

Qua

drat

urM

isch

er

Qua

d M

isch

er

1 Gai

n2sN

sFM

FMM

odul

ator

FM M

odul

ator

Out

1

Eing

angs

sign

al

Div

ison

z-1

Del

ay

Clo

ck

atan

Arku

stan

gens

PUSH

Alle

Gra

phen

Sch

liess

en

sFM

sN

sRea

l

sIm

ag

Figure E.4.: Blockschaltbild Simulink Aufbau Idealer Phase-Adapter-Demodulator

108

Page 129: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

E.3. Phasenregelschleife

E.3. Phasenregelschleife

Dem

odul

ierte

s N

achr

icht

ensi

gnal

-K-

kFM

-1 gain

sin

Trig

onom

etric

Func

tion1

cos

Trig

onom

etric

Func

tion

t2

To W

orks

pace

2

t1

To W

orks

pace

1

t

To W

orks

pace

s

Rea

l (C

os)

Imag

(Sin

)

Qua

drat

urM

isch

er

Qua

drat

urm

isch

erPr

oduc

t1

Prod

uct

2

PN

achr

icht

ensi

gnal

sNsF

MFM

Mod

ulat

or

FM M

odul

ator

T z-1

Dis

cret

e-Ti

me

Inte

grat

or

Clo

ck

Figure E.5.: Blockschaltbild Simulink Aufbau Idealer PLL

109

Page 130: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Simulink models

Dem

odul

ierte

s N

achr

icht

ensi

gnal

Qua

ntiz

er 5

Satu

ratio

n

-K-

kFM

-1 gain

sin

Trig

onom

etric

Func

tion1

cos

Trig

onom

etric

Func

tion

t2

To W

orks

pace

2

t1

To W

orks

pace

1

t

To W

orks

pace

Satu

ratio

n1

Qua

ntiz

er7

Qua

ntiz

er6

Qua

ntiz

er4

Qua

ntiz

er3

Qua

ntiz

er2

Qua

ntiz

er1

Qua

ntiz

er

s

Rea

l (C

os)

Imag

(Sin

)

Qua

drat

urM

isch

er

Qua

drat

urm

isch

er

Prod

uct1

Prod

uct

-K- P

Nac

hric

hten

sign

al

sNsF

MFM

Mod

ulat

or

FM M

odul

ator

T z-1

Dis

cret

e-Ti

me

Inte

grat

or

butte

r

Dig

ital I

IRFi

lter D

esig

n

Clo

ck

Figure E.6.: Blockschaltbild Simulink Aufbau DSP PLL

110

Page 131: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

E.3. Phasenregelschleife

Dem

odul

ierte

s N

achr

icht

ensi

gnal

Qua

ntiz

er 5

Satu

ratio

n

-K-

kFM

-1 gain

sin

Trig

onom

etric

Func

tion1

cos

Trig

onom

etric

Func

tion

t3

To W

orks

pace

3

t2

To W

orks

pace

2

t1

To W

orks

pace

1

t

To W

orks

pace

Satu

ratio

n1

Qua

ntiz

er7

Qua

ntiz

er6

Qua

ntiz

er4

Qua

ntiz

er3

Qua

ntiz

er2

Qua

ntiz

er1

Qua

ntiz

er

s

Rea

l (C

os)

Imag

(Sin

)

Qua

drat

urM

isch

er

Qua

drat

urm

isch

er

Prod

uct1

Prod

uct

-K- P

Nac

hric

hten

sign

al

Gau

ssia

n

Gau

ssia

n N

oise

Gen

erat

or

sNsF

MFM

Mod

ulat

or

FM M

odul

ator

T z-1

Dis

cret

e-Ti

me

Inte

grat

or

butte

r

Dig

ital I

IRFi

lter D

esig

n

Clo

ck

Figure E.7.: Blockschaltbild Simulink Aufbau DSP PLL mit gausschem Rauschen

111

Page 132: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Simulink models

E.4. Mix Demodulator

Idea

ler M

ix D

emod

ulat

orC

allb

ack

Rou

tines

:

InitF

cn ->

init_

mix

Idea

l.mSt

opFc

n ->

sto

p_m

ixId

eal.m

imag

To W

orks

pace

7

real

To W

orks

pace

6

fmsi

gnal

To W

orks

pace

3

tvec

To W

orks

pace

2

outs

igna

l

To W

orks

pace

1

insi

gnal

To W

orks

pace

s

Rea

l (C

os)

Imag

(Sin

)

Qua

drat

urM

isch

er

Qua

d M

isch

er

Prod

uct3

Prod

uct2

Prod

uct1

Prod

uct

1/(T

*K)

Nor

mie

rung

auf 1

1 Gai

n2

sNsF

MFM

Mod

ulat

or

FM M

odul

ator

Out

1

Eing

angs

sign

al

Div

isio

nz-1

Del

ay1

z-1

Del

ay

Clo

ck

atan

Arku

stan

gens

PUSH

Alle

Gra

phen

Sch

liess

en

sFM

sIm

ag

sRea

l

sN

sRea

lNV

sRea

lNV

sIm

agN

V

sIm

agN

VsI

mag

NV

Figure E.8.: Blockschaltbild Simulink Aufbau Idealer Mix Demodulator

112

Page 133: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

E.4. Mix Demodulator

DSP

Mix

Dem

odul

ator

Cal

lbac

k R

outin

es:

InitF

cn ->

init_

mix

Qua

nt.m

Stop

Fcn

-> s

top_

mix

Qua

nt.m

imag

To W

orks

pace

7

real

To W

orks

pace

6

help

var

To W

orks

pace

4

fmsi

gnal

To W

orks

pace

3

tvec

To W

orks

pace

2

outs

igna

l

To W

orks

pace

1

insi

gnal

To W

orks

pace

Satu

ratio

n7

Satu

ratio

n6

Satu

ratio

n5

Satu

ratio

n4

Satu

ratio

n3

Satu

ratio

n2Sa

tura

tion1

Qua

ntiz

er8

Qua

ntiz

er7

Qua

ntiz

er6

Qua

ntiz

er5

Qua

ntiz

er4

Qua

ntiz

er3

Qua

ntiz

er2

Qua

ntiz

er10

Qua

ntiz

er1

s

Rea

l (C

os)

Imag

(Sin

)

Qua

drat

urM

isch

er

Qua

d M

isch

er

Prod

uct3

Prod

uct2

Prod

uct1

Prod

uct

1/(T

*K)

Nor

mie

rung

auf 1

1 Gai

n2

sNsF

MFM

Mod

ulat

or

FM M

odul

ator

Out

1

Eing

angs

sign

al

Div

isio

n

butte

r

Dig

ital I

IRFi

lter1

z-1

Del

ay1

z-1

Del

ay

Clo

ck

atan

Tabe

lle

Arku

stan

gend

sTa

belle

PUSH

Alle

Gra

phen

Sch

liess

en

sFM

sIm

ag

sRea

l

sN

sRea

lNV

sRea

lNV

sIm

agN

V

sIm

agN

V

sIm

agN

V

Figure E.9.: Blockschaltbild Simulink Aufbau DSP Mix Demodulator

113

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Simulink models

DSP

Mix

Dem

odul

ator

mit

Noi

seC

allb

ack

Rou

tines

:

InitF

cn ->

init_

mix

Noi

se.m

Stop

Fcn

-> s

top_

mix

Noi

se.m

fmU

nois

e

To W

orks

pace

4

fmsi

gnal

To W

orks

pace

3

tvec

To W

orks

pace

2

nois

e

To W

orks

pace

10

outs

igna

l

To W

orks

pace

1

insi

gnal

To W

orks

pace

Satu

ratio

n7

Satu

ratio

n6

Satu

ratio

n5

Satu

ratio

n4

Satu

ratio

n3

Satu

ratio

n2Sa

tura

tion1

Qua

ntiz

er8

Qua

ntiz

er7

Qua

ntiz

er6

Qua

ntiz

er5

Qua

ntiz

er4

Qua

ntiz

er3

Qua

ntiz

er2

Qua

ntiz

er10

Qua

ntiz

er1

s

Rea

l (C

os)

Imag

(Sin

)

Qua

drat

urM

isch

er

Qua

d M

isch

er

Prod

uct3

Prod

uct2

Prod

uct1

Prod

uct

1/(T

*K)

Nor

mie

rung

auf 1

Gau

ssia

n

Gau

ssia

n N

oise

Gen

erat

or

1 Gai

n2

sNsF

MFM

Mod

ulat

or

FM M

odul

ator

Out

1

Eing

angs

sign

al

Div

isio

n

butte

r

Dig

ital I

IRFi

lter2

z-1

Del

ay1

z-1

Del

ay

Clo

ck

atan

Tabe

lle

Arku

stan

gend

sTa

belle

PUSH

Alle

Gra

phen

Sch

liess

en

sIm

ag

sRea

l

sN

sRea

lNV

sRea

lNV

sIm

agN

V

sIm

agN

V

sIm

agN

V

Figure E.10.: Blockschaltbild Simulink Aufbau DSP Mix Demodulator mit gausschem Rauschen

114

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*/57

void

ths1

40

8_

init

(sh

ort

inB

uffe

rA[],

sho

rtin

Bu

ffe

rB[])

58{

59T

HS

14

08

_C

ON

FIG

de

fco

nfig

;/*

de

fau

ltco

nfig

*/60 61

/*S

etu

pth

ee

mif

pa

ram

ete

rs*/

62e

mif_

init_

TH

S1

40

8()

;63 64

/*O

pe

na

nd

init

the

Tim

er0

*/65

time

r_in

it_T

HS

14

08

();

66 67/*

Se

tup

the

ED

MA

*/68

ad

c_e

dm

a_

init

(in

Bu

ffe

rA,

inB

uffe

rB);

116

Page 137: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

69 70/*

Co

nfig

ure

the

TH

S1

40

8*/

71d

efc

on

fig.

ctrl

.co

ntr

ol_

bit

.p

wd=

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S1

40

8_

PO

W;72

de

fco

nfig

.ct

rl.

con

tro

l_b

it.

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=T

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08

_R

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ntr

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bit

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S1

40

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74d

efc

on

fig.

ctrl

.co

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=T

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14

08

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on

fig.

ctrl

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pg

a=

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PG

A;80

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d=

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TIM

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fig(

de

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ad

c_irq

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void

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d(

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94/*

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nt

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00

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97}

98 99vo

ide

mif_

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100

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set

the

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ters

for

the

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102

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103

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CT

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WR

ST

RB,

TH

S1

40

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RB);

104

EM

IF_

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ET(

CE

CT

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D,

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40

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D);10

5E

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T(C

EC

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ET

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08

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ET

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106

EM

IF_

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ET(

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109

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110

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111

2vo

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113

{11

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time

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9T

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rese

t(

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ime

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120

121

#if

TH

S1

40

8_

CF

_E

RR

OR

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ISP

122

if(

hT

ime

r0=

=IN

V)

123

{12

4L

OG

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rin

tf(&

err

or_

log

,"E

rro

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14

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:C

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ldN

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en

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er

0!"

);12

5}

126

#e

nd

if12

712

8/*

Co

nfig

ure

the

time

rd

evi

ce*/

129

op

t=

TIM

ER

_F

MK(

CT

L,F

UN

C,

TIM

ER

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TL

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C_

TO

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130

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134

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135

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136

|T

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813

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on

fig.

ctl

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pt

;14

0tim

erC

on

fig.

prd

=T

HS

14

08

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141

time

rCo

nfig

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t=

0;

142

TIM

ER

_co

nfig

(h

Tim

er0

,&tim

erC

on

fig);

143

}14

414

5vo

ida

dc_

ed

ma

_in

it(

sho

rtin

Bu

ffe

rA_

ptr

[],

sho

rtin

Bu

ffe

rB_

ptr

[])

146

{14

7E

DM

A_

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nfig

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ma

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_A

;14

8E

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ed

ma

Co

nfig

_B

;

149

150

/*o

pe

no

ne

ED

MA

Ch

an

ne

l*/

151

hE

dm

aIn

=E

DM

A_

op

en(

ED

MA

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0,E

DM

A_

OP

EN

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ET

);15

215

3#

ifT

HS

14

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ma

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DM

A_

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V)15

5{

156

LO

G_

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tf(&

err

or_

log

,"E

rro

rT

HS

14

08

:C

ou

ldN

ot

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en

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MA

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an

ne

l!"

);15

7}

158

#e

nd

if15

916

0/*

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ta

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tab

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rA

*/16

1h

Ed

ma

InL

inkA

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DM

A_

allo

cTa

ble

(-1

);16

216

3#

ifT

HS

14

08

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F_

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RO

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4if

(h

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ma

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==

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MA

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165

{16

6L

OG

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or_

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,"E

rro

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14

08

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ou

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cate

ED

MA

LIN

KA

!");

167

}16

8#

en

dif

169

170

/*G

et

alin

kta

be

lfo

rB

*/17

1h

Ed

ma

InL

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DM

A_

allo

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(-1

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HS

14

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RO

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3if

(h

Ed

ma

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inkB

==

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MA

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174

{17

5L

OG

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rin

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or_

log

,"E

rro

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14

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176

}17

7#

en

dif

178

179

/*co

nfig

ura

tion

for

in_

bu

ffe

rA*/

180

ed

ma

Co

nfig

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.o

pt

=E

DM

A_

FM

K(O

PT

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DM

A_

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T_

PR

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IGH)

181

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186

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190

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ma

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nfig

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c=

(U

int3

2)

hT

hs1

40

8.

res_

ad

dr

;19

1e

dm

aC

on

fig_

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cnt

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FE

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IZE

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dm

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on

fig_

A.

dst

=(

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dm

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idx

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196

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199

ed

ma

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DM

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200

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209

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40

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dm

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cnt

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FE

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IZE

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B.

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=(

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ffe

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FA

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T)

215

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FM

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;21

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,&e

dm

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fig_

A);

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MA

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(h

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ma

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inkA

,&e

dm

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on

fig_

A);

220

ED

MA

_co

nfig

(h

Ed

ma

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,&e

dm

aC

on

fig_

B);

221

222

/*e

na

ble

tra

nsf

er

com

ple

tion

inte

rru

pt

for

Aa

nd

B*/

223

ED

MA

_in

tEn

ab

le(

TH

S1

40

8_

BU

FF

ER

_A

_T

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224

ED

MA

_in

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ab

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40

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BU

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225

}22

622

7vo

ida

dc_

irq

_in

it()

228

{

117

Page 138: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings22

9/*

Ma

pa

nd

en

ab

leE

DM

Ain

terr

up

t*/

230

IRQ

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ap(

IRQ

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AIN

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323

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art

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);23

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el

(h

Ed

ma

In);

238

}23

924

0#

ifT

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14

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E_

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do

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08

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2{

243

Uin

t32

pe

rio

d=

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244

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245

pe

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(10

00

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TH

S1

40

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FR

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8*

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246

ret

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00

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*T

HS

14

08

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RE

Q)/(

8*

pe

rio

d);

247

248

TIM

ER

_se

tPe

rio

d(

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ime

r0,

pe

rio

d);

249

/*se

tC

ou

nt

to0

be

cau

seit

cou

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igg

er

tha

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wo

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ed

on

eo

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*/25

1T

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setC

ou

nt

(h

Tim

er0

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00

0);

252

253

retu

rnre

t;

254

}25

5#

en

dif

256

257

/*_

__

__

__

__

__

__

__

__

__

__

__

__

__

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UR

_L

ED

81#

incl

ud

e<

bsl

_le

d.

h>

82#

en

dif

83 84#

ifF

FM

_D

EM

_C

F_

INT

_T

IME

_L

ED

119

Page 140: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings85

#in

clu

de

<b

sl_

led

.h

>86

#e

nd

if87 88

#if

FM

_D

EM

_C

F_

INT

_T

IME

_S

TS

89#

incl

ud

e<

clk

.h

>90

#in

clu

de

<st

s.

h>

91e

xte

rnfa

rS

TS

_O

bj

da

c_st

s;

92e

xte

rnfa

rS

TS

_O

bj

de

mo

du

late

_st

s;

93e

xte

rnfa

rS

TS

_O

bj

ed

ma

_st

s;

94#

en

dif

95 96#

ifF

M_

DE

M_

CF

_F

UN

C_

TIM

E_

ST

S97

#in

clu

de

<cl

k.

h>

98#

incl

ud

e<

sts

.h

>99

ext

ern

far

ST

S_

Ob

jm

ix_

sts

;10

0e

xte

rnfa

rS

TS

_O

bj

de

m_

sts

;10

1e

xte

rnfa

rS

TS

_O

bj

filte

r_st

s;

102

ext

ern

far

ST

S_

Ob

jd

ow

n_

on

e_

sts

;10

3e

xte

rnfa

rS

TS

_O

bj

do

wn

_tw

o_

sts

;10

4#

en

dif

105

106

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

107

DS

P/B

IOS

ext

ern

varib

les

108

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

109

110

ext

ern

far

SW

I_O

bj

de

mo

du

late

_sw

i;

111

ext

ern

HW

I_e

na

ble

();

112

ext

ern

HW

I_d

isa

ble

();

113

114

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

115

glo

ba

lva

rib

les

116

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

117

118

sho

rtin

_b

uffe

r_A

[B

UF

FE

RS

IZE

_IN

PU

T];

119

sho

rtin

_b

uffe

r_B

[B

UF

FE

RS

IZE

_IN

PU

T];

120

121

floa

tin

_b

uffe

r[

BU

FF

ER

SIZ

E_

INP

UT]

;12

212

3flo

at

re_

bu

ffe

r[

BU

FF

ER

SIZ

E_

INP

UT]

;12

4flo

at

im_

bu

ffe

r[

BU

FF

ER

SIZ

E_

INP

UT]

;12

512

6flo

at

re_

bu

ffe

r_d

ow

n_

on

e[

BU

FF

ER

SIZ

E_

DE

MO

DU

LA

TO

R];

127

floa

tim

_b

uffe

r_d

ow

n_

on

e[

BU

FF

ER

SIZ

E_

DE

MO

DU

LA

TO

R];

128

129

floa

to

ut_

bu

ffe

r_d

ow

n_

on

e[

BU

FF

ER

SIZ

E_

DE

MO

DU

LA

TO

R];

130

floa

to

ut_

bu

ffe

r_d

ow

n_

two

[B

UF

FE

RS

IZE

_O

UT

PU

T];13

113

2sh

ort

ou

t_b

uffe

r_A

[B

UF

FE

RS

IZE

_O

UT

PU

T];13

3sh

ort

ou

t_b

uffe

r_B

[B

UF

FE

RS

IZE

_O

UT

PU

T];13

413

513

613

7sh

ort

*in

_b

uffe

r_p

tr;

138

sho

rt*

ou

t_b

uffe

r_p

tr;

139

Bo

ol

a_

inE

DM

A=

TR

UE;

140

sho

rto

utc

ou

nte

r=

0;

141

142

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

143

the

ma

infu

nct

ion

144

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

145

void

ma

in()

146

{14

7H

WI_

dis

ab

le()

;14

814

9#

ifF

M_

DE

M_

CF

_D

EB

UG

150

LO

G_

prin

tf(&

de

bu

g_

log

,"In

fo:

Be

gin

Of

ma

in")

;15

1#

en

dif

152

153

CS

L_

init

();

/*o

nch

ipin

it*/

154

BS

L_

init

();

/*o

nb

oa

rdin

it*/

155

156

ths1

40

8_

init

(in

_b

uffe

r_A

,in

_b

uffe

r_B

);15

7co

de

c_in

it()

;15

815

9H

WI_

en

ab

le()

;16

016

1th

s14

08

_st

art

();

162

cod

ec_

sta

rt()

;16

316

4#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

LE

D

165

LE

D_

off

(L

ED

_A

LL)

;16

6#

en

dif

167

168

#if

FM

_D

EM

_C

F_

DE

BU

G16

9L

OG

_p

rin

tf(&

de

bu

g_

log

,"In

fo:

En

dO

fm

ain

");

170

#e

nd

if17

1}

172

173

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

174

ha

rdw

are

inte

rru

pt

fun

ctio

ns

175

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

176

177

void

ed

ma

Int

(vo

id)

178

{17

9#

ifF

M_

DE

M_

CF

_IN

T_

OC

CU

R_

LE

D18

0L

ED

_to

gg

le(

LE

D_

2);

181

#e

nd

if18

218

3#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

LE

D18

4L

ED

_o

n(

LE

D_

2);

185

#e

nd

if18

618

7#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

ST

S18

8S

TS

_se

t(&

ed

ma

_st

s,

CL

K_

ge

thtim

e()

);18

9#

en

dif

190

191

/*re

set

ou

tco

un

ter

*/19

2o

utc

ou

nte

r=

0;

193

194

/*se

lect

ED

MA

cha

nn

el

*/19

5if

(E

DM

A_

intT

est

(T

HS

14

08

_B

UF

FE

R_

A_

TC

C))19

6{

197

#if

FM

_D

EM

_C

F_

DE

BU

G19

8L

OG

_p

rin

tf(&

de

bu

g_

log

,"In

_A

");

199

#e

nd

if20

0/*

Cle

ar

tra

nsf

er

com

ple

tion

inte

rru

pt

flag

*/20

1E

DM

A_

intC

lea

r(

TH

S1

40

8_

BU

FF

ER

_A

_T

CC);

202

203

/*se

tb

uffe

rp

oin

ters

*/20

4a

_in

ED

MA

=F

AL

SE;

205

in_

bu

ffe

r_p

tr=

in_

bu

ffe

r_A

;20

6o

ut_

bu

ffe

r_p

tr=

ou

t_b

uffe

r_A

;20

720

8/*

po

stso

ftw

are

inte

rru

pt

->st

art

de

mo

du

latio

n*/

209

SW

I_p

ost

(&d

em

od

ula

te_

swi

);21

0}

211

if(

ED

MA

_in

tTe

st(

TH

S1

40

8_

BU

FF

ER

_B

_T

CC))

212

{21

3#

ifF

M_

DE

M_

CF

_D

EB

UG

214

LO

G_

prin

tf(&

de

bu

g_

log

,"In

_B

");

215

#e

nd

if21

6/*

Cle

ar

tra

nsf

er

com

ple

tion

inte

rru

pt

flag

*/21

7E

DM

A_

intC

lea

r(

TH

S1

40

8_

BU

FF

ER

_B

_T

CC);

218

219

/*se

tb

uffe

rp

oin

ters

*/22

0a

_in

ED

MA

=T

RU

E;22

1in

_b

uffe

r_p

tr=

in_

bu

ffe

r_B

;22

2o

ut_

bu

ffe

r_p

tr=

ou

t_b

uffe

r_B

;22

322

4/*

po

stso

ftw

are

inte

rru

pt

->st

art

de

mo

du

latio

n*/

225

SW

I_p

ost

(&d

em

od

ula

te_

swi

);22

6}

227

228

#if

FM

_D

EM

_C

F_

INT

_T

IME

_S

TS

229

ST

S_

de

lta(&

ed

ma

_st

s,

CL

K_

ge

thtim

e()

);23

0#

en

dif

231

232

#if

FM

_D

EM

_C

F_

INT

_T

IME

_L

ED

233

LE

D_

off

(L

ED

_2)

;23

4#

en

dif

235

}23

623

7vo

idd

acI

nt

(vo

id)

238

{23

9#

ifF

M_

DE

M_

CF

_IN

T_

OC

CU

R_

LE

D24

0L

ED

_to

gg

le(

LE

D_

1);

241

#e

nd

if24

224

3#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

LE

D24

4L

ED

_o

n(

LE

D_

1);

120

Page 141: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

245

#e

nd

if24

624

7#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

ST

S24

8S

TS

_se

t(&

da

c_st

s,

CL

K_

ge

thtim

e()

);24

9#

en

dif

250

251

/*in

terp

ola

tea

mis

sin

gsa

mp

le*/

252

if(

ou

tco

un

ter

>1

5)

253

{25

4#

ifF

M_

DE

M_

CF

_IN

T_

OC

CU

R_

LE

D25

5L

ED

_to

gg

le(

LE

D_

3);

256

#e

nd

if25

7/*

sele

ctth

eb

uffe

r*/

258

if(

a_

inE

DM

A)

259

{26

0A

D5

35

_H

WI_

write

(o

utA

D5

35

h,(

(o

ut_

bu

ffe

r_A

[15

]+o

ut_

bu

ffe

r_B

[0])

/2))

;26

1#

ifF

M_

DE

M_

CF

_D

EB

UG

262

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

Ae

rro

r:%

d",

ou

tco

un

ter

);26

3#

en

dif

264

}e

lse

265

{26

6A

D5

35

_H

WI_

write

(o

utA

D5

35

h,(

(o

ut_

bu

ffe

r_B

[15

]+o

ut_

bu

ffe

r_A

[0])

/2))

;26

7#

ifF

M_

DE

M_

CF

_D

EB

UG

268

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

Be

rro

r:%

d",

ou

tco

un

ter

);26

9#

en

dif

270

}27

1}

els

e/*

ou

tpu

ta

valu

e*/

272

{27

3/*

sele

ctth

eb

uffe

r*/

274

if(

a_

inE

DM

A)

275

{27

6A

D5

35

_H

WI_

write

(o

utA

D5

35

h,

ou

t_b

uffe

r_A

[o

utc

ou

nte

r])

;27

7#

ifF

M_

DE

M_

CF

_D

EB

UG

278

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

A:%

d",

ou

tco

un

ter

);27

9#

en

dif

280

}e

lse

281

{28

2A

D5

35

_H

WI_

write

(o

utA

D5

35

h,

ou

t_b

uffe

r_B

[o

utc

ou

nte

r])

;28

3#

ifF

M_

DE

M_

CF

_D

EB

UG

284

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

B:%

d",

ou

tco

un

ter

);28

5#

en

dif

286

}28

7/*

up

da

teo

utc

ou

nte

r*/

288

ou

tco

un

ter

++

;28

9}

290

291

#if

FM

_D

EM

_C

F_

INT

_T

IME

_S

TS

292

ST

S_

de

lta(&

da

c_st

s,

CL

K_

ge

thtim

e()

);29

3#

en

dif

294

295

#if

FM

_D

EM

_C

F_

INT

_T

IME

_L

ED

296

LE

D_

off

(L

ED

_1)

;29

7#

en

dif

298

}29

930

0/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--30

1so

ftw

are

inte

rru

pt

fun

ctio

ns

302

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

303

304

void

de

mo

du

late

Sw

iFu

nc

(vo

id)

305

{30

6in

ti

;30

730

8#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

LE

D30

9L

ED

_o

n(

LE

D_

3);

310

#e

nd

if31

131

2#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

ST

S31

3S

TS

_se

t(&

de

mo

du

late

_st

s,

CL

K_

ge

thtim

e()

);31

4#

en

dif

315

316

for

(i

=0

;i

<B

UF

FE

RS

IZE

_IN

PU

T;i

++

)31

7{

318

in_

bu

ffe

r_p

tr[

i]=

in_

bu

ffe

r_p

tr[

i]<

<2

;31

9}

320

321

/*co

nve

rtsh

ort

toflo

at*

/32

2fo

r(

i=

0;

i<

BU

FF

ER

SIZ

E_

INP

UT;

i+

+)

323

{32

4in

_b

uffe

r[

i]=

((flo

at

)in

_b

uffe

r_p

tr[

i])

/32

76

7;

325

}32

632

7#

ifF

M_

DE

M_

CF

_F

UN

C_

TIM

E_

ST

S32

8S

TS

_se

t(&

mix

_st

s,

CL

K_

ge

thtim

e()

);32

9#

en

dif

330

qu

ad

_m

ix(

in_

bu

ffe

r,

re_

bu

ffe

r,

im_

bu

ffe

r);

331

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

332

ST

S_

de

lta(&

mix

_st

s,

CL

K_

ge

thtim

e()

);33

3#

en

dif

334

335

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

336

ST

S_

set

(&d

ow

n_

on

e_

sts

,C

LK

_g

eth

time

());

337

#e

nd

if33

8d

ow

nsa

mp

le_

on

e(

re_

bu

ffe

r,

im_

bu

ffe

r,

re_

bu

ffe

r_d

ow

n_

on

e,

im_

bu

ffe

r_d

ow

n_

on

e);

339

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

340

ST

S_

de

lta(&

do

wn

_o

ne

_st

s,

CL

K_

ge

thtim

e()

);34

1#

en

dif

342

343

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

344

ST

S_

set

(&d

em

_st

s,

CL

K_

ge

thtim

e()

);34

5#

en

dif

346

#if

(F

M_

DE

MO

DU

LA

TO

R=

=F

M_

PL

L_

DE

M)34

7p

ll_d

em

od

ula

te(

re_

bu

ffe

r_d

ow

n_

on

e,

im_

bu

ffe

r_d

ow

n_

on

e,

ou

t_b

uffe

r_d

ow

n_

on

e);

348

#e

lif(

FM

_D

EM

OD

UL

AT

OR

==

FM

_M

IXE

D_

DE

M)34

9m

ixe

d_

de

mo

du

late

(re

_b

uffe

r_d

ow

n_

on

e,

im_

bu

ffe

r_d

ow

n_

on

e,

ou

t_b

uffe

r_d

ow

n_

on

e);

350

#e

lse

351

#e

rro

rN

od

em

od

ula

tor

alg

orith

md

efin

ed

352

#e

nd

if35

3#

ifF

M_

DE

M_

CF

_F

UN

C_

TIM

E_

ST

S35

4S

TS

_d

elta

(&d

em

_st

s,

CL

K_

ge

thtim

e()

);35

5#

en

dif

356

357

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

358

ST

S_

set

(&fil

ter_

sts

,C

LK

_g

eth

time

());

359

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Page 142: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

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122

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Page 146: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

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e:

fm_

de

m_

ma

in.c

5d

ate

:n

ov

20

01

6b

y:

c.h

alle

r7

f.sc

hn

yde

r8

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

9*/

10 11/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--12

de

mo

du

lato

rd

efin

e13

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

14#

de

fine

FM

_M

IXE

D_

DE

M1

015

#d

efin

eF

M_

PL

L_

DE

M2

016 17

#d

efin

eF

M_

DE

MO

DU

LA

TO

RF

M_

MIX

ED

_D

EM

18 19/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--20

incl

ud

es

21--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

*/22 23

#in

clu

de

<st

d.

h>

24#

incl

ud

e<

swi

.h

>25

#in

clu

de

<cs

l.

h>

26#

incl

ud

e<

bsl

.h

>27 28

#in

clu

de

"glo

ba

l_se

ttin

gs.

h"

29#

incl

ud

e"a

dc_

TH

S1

40

8.h

"

126

Page 147: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

30#

incl

ud

e"d

ac_

cod

ec.

h"

31#

incl

ud

e"q

ua

d_

mix

.h"

32#

incl

ud

e"o

ut_

filte

r.h

"33

#if

(F

M_

DE

MO

DU

LA

TO

R=

=F

M_

PL

L_

DE

M)34

#in

clu

de

"pll_

de

mo

du

late

.h"

35#

elif

(F

M_

DE

MO

DU

LA

TO

R=

=F

M_

MIX

ED

_D

EM)

36#

incl

ud

e"m

ixe

d_

de

mo

du

late

.h"

37#

els

e38

#e

rro

rN

od

em

od

ula

tor

alg

orith

md

efin

ed

39#

en

dif

40 41/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--42

de

bu

gd

efin

es

43--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

*/44

#d

efin

eF

M_

DE

M_

CF

_D

EB

UG

045

/*to

prin

tco

mm

en

tsto

de

bu

g_

log

*/46 47

#d

efin

eF

M_

DE

M_

CF

_IN

T_

OC

CU

R_

LE

D0

48/*

Le

dto

gg

les

wh

en

an

inte

rru

pt

occ

urs

*/49

/*L

ED

1co

de

cin

terr

up

t(o

utp

ut)

*/50

/*L

ED

2e

dm

ain

terr

up

t(in

pu

t)*/

51/*

LE

D3

timm

ing

err

or

*/52 53

#d

efin

eF

M_

DE

M_

CF

_IN

T_

TIM

E_

LE

D0

54/*

Le

dO

Nb

yin

terr

up

tst

art

OF

Fa

tth

ee

nd

*/55

/*L

ED

1co

de

cin

terr

up

t(o

utp

ut)

*/56

/*L

ED

2e

dm

ain

terr

up

t(in

pu

t)*/

57/*

LE

D3

soft

wa

rein

terr

up

t*/

58 59#

de

fine

FM

_D

EM

_C

F_

INT

_T

IME

_S

TS

060

/*E

na

ble

ST

SO

bje

cts:

*/61

/*-d

ac_

sts

*/62

/*-d

em

od

ula

te_

sts

*/63

/*-e

dm

a_

sts

*/64

/*to

me

asu

reth

ed

ura

tion

time

of

the

inte

rru

pts

*/65 66

#d

efin

eF

M_

DE

M_

CF

_F

UN

C_

TIM

E_

ST

S1

67/*

En

ab

leS

TS

Ob

ject

s:*/

68/*

-mix

_st

s*/

69/*

-de

m_

sts

*/70

/*-f

ilte

r_st

s*/

71/*

tom

ea

sure

the

du

ratio

ntim

eo

fth

efu

nct

ion

s*/

72 73#

ifF

M_

DE

M_

CF

_D

EB

UG

74#

incl

ud

e<

log

.h

>75

ext

ern

far

LO

G_

Ob

jd

eb

ug

_lo

g;

76#

en

dif

77 78#

ifF

FM

_D

EM

_C

F_

INT

_O

CC

UR

_L

ED

79#

incl

ud

e<

bsl

_le

d.

h>

80#

en

dif

81 82#

ifF

FM

_D

EM

_C

F_

INT

_T

IME

_L

ED

83#

incl

ud

e<

bsl

_le

d.

h>

84#

en

dif

85 86#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

ST

S87

#in

clu

de

<cl

k.

h>

88#

incl

ud

e<

sts

.h

>89

ext

ern

far

ST

S_

Ob

jd

ac_

sts

;90

ext

ern

far

ST

S_

Ob

jd

em

od

ula

te_

sts

;91

ext

ern

far

ST

S_

Ob

je

dm

a_

sts

;92

#e

nd

if93 94

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

95#

incl

ud

e<

clk

.h

>96

#in

clu

de

<st

s.

h>

97e

xte

rnfa

rS

TS

_O

bj

mix

_st

s;

98e

xte

rnfa

rS

TS

_O

bj

de

m_

sts

;99

ext

ern

far

ST

S_

Ob

jfil

ter_

sts

;10

0#

en

dif

101

102

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

103

DS

P/B

IOS

ext

ern

varib

les

104

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

105

106

ext

ern

far

SW

I_O

bj

de

mo

du

late

_sw

i;

107

ext

ern

HW

I_e

na

ble

();

108

ext

ern

HW

I_d

isa

ble

();

109

110

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

111

glo

ba

lva

rib

les

112

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

113

114

sho

rtin

_b

uffe

r_A

[B

UF

FE

RS

IZE

_IN

PU

T];

115

sho

rtin

_b

uffe

r_B

[B

UF

FE

RS

IZE

_IN

PU

T];

116

117

sho

rtre

_b

uffe

r[

BU

FF

ER

SIZ

E_

INP

UT]

;11

8sh

ort

im_

bu

ffe

r[

BU

FF

ER

SIZ

E_

INP

UT]

;11

912

0sh

ort

ou

t_b

uffe

r[

BU

FF

ER

SIZ

E_

DE

MO

DU

LA

TO

R];

121

sho

rto

ut_

bu

ffe

r_A

[B

UF

FE

RS

IZE

_O

UT

PU

T];12

2sh

ort

ou

t_b

uffe

r_B

[B

UF

FE

RS

IZE

_O

UT

PU

T];12

312

412

512

6sh

ort

*in

_b

uffe

r_p

tr;

127

sho

rt*

ou

t_b

uffe

r_p

tr;

128

Bo

ol

a_

inE

DM

A=

TR

UE;

129

sho

rto

utc

ou

nte

r=

0;

130

131

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

132

the

ma

infu

nct

ion

133

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

134

void

ma

in()

135

{13

6H

WI_

dis

ab

le()

;13

713

8#

ifF

M_

DE

M_

CF

_D

EB

UG

139

LO

G_

prin

tf(&

de

bu

g_

log

,"In

fo:

Be

gin

Of

ma

in")

;14

0#

en

dif

141

142

CS

L_

init

();

/*o

nch

ipin

it*/

143

BS

L_

init

();

/*o

nb

oa

rdin

it*/

144

145

ths1

40

8_

init

(in

_b

uffe

r_A

,in

_b

uffe

r_B

);14

6co

de

c_in

it()

;14

714

8H

WI_

en

ab

le()

;14

915

0th

s14

08

_st

art

();

151

cod

ec_

sta

rt()

;15

215

3#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

LE

D15

4L

ED

_o

ff(

LE

D_

AL

L);

155

#e

nd

if15

615

7#

ifF

M_

DE

M_

CF

_D

EB

UG

158

LO

G_

prin

tf(&

de

bu

g_

log

,"In

fo:

En

dO

fm

ain

");

159

#e

nd

if16

0}

161

162

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

163

ha

rdw

are

inte

rru

pt

fun

ctio

ns

164

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

165

166

void

ed

ma

Int

(vo

id)

167

{16

8#

ifF

M_

DE

M_

CF

_IN

T_

OC

CU

R_

LE

D16

9L

ED

_to

gg

le(

LE

D_

2);

170

#e

nd

if17

117

2#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

LE

D17

3L

ED

_o

n(

LE

D_

2);

174

#e

nd

if17

517

6#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

ST

S17

7S

TS

_se

t(&

ed

ma

_st

s,

CL

K_

ge

thtim

e()

);17

8#

en

dif

179

180

/*re

set

ou

tco

un

ter

*/18

1o

utc

ou

nte

r=

0;

182

183

/*se

lect

ED

MA

cha

nn

el

*/18

4if

(E

DM

A_

intT

est

(T

HS

14

08

_B

UF

FE

R_

A_

TC

C))18

5{

186

#if

FM

_D

EM

_C

F_

DE

BU

G18

7L

OG

_p

rin

tf(&

de

bu

g_

log

,"In

_A

");

188

#e

nd

if18

9/*

Cle

ar

tra

nsf

er

com

ple

tion

inte

rru

pt

flag

*/

127

Page 148: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings19

0E

DM

A_

intC

lea

r(

TH

S1

40

8_

BU

FF

ER

_A

_T

CC);

191

192

/*se

tb

uffe

rp

oin

ters

*/19

3a

_in

ED

MA

=F

AL

SE;

194

in_

bu

ffe

r_p

tr=

in_

bu

ffe

r_A

;19

5o

ut_

bu

ffe

r_p

tr=

ou

t_b

uffe

r_A

;19

619

7/*

po

stso

ftw

are

inte

rru

pt

->st

art

de

mo

du

latio

n*/

198

SW

I_p

ost

(&d

em

od

ula

te_

swi

);19

9}

200

if(

ED

MA

_in

tTe

st(

TH

S1

40

8_

BU

FF

ER

_B

_T

CC))

201

{20

2#

ifF

M_

DE

M_

CF

_D

EB

UG

203

LO

G_

prin

tf(&

de

bu

g_

log

,"In

_B

");

204

#e

nd

if20

5/*

Cle

ar

tra

nsf

er

com

ple

tion

inte

rru

pt

flag

*/20

6E

DM

A_

intC

lea

r(

TH

S1

40

8_

BU

FF

ER

_B

_T

CC);

207

208

/*se

tb

uffe

rp

oin

ters

*/20

9a

_in

ED

MA

=T

RU

E;21

0in

_b

uffe

r_p

tr=

in_

bu

ffe

r_B

;21

1o

ut_

bu

ffe

r_p

tr=

ou

t_b

uffe

r_B

;21

221

3/*

po

stso

ftw

are

inte

rru

pt

->st

art

de

mo

du

latio

n*/

214

SW

I_p

ost

(&d

em

od

ula

te_

swi

);21

5}

216

217

#if

FM

_D

EM

_C

F_

INT

_T

IME

_S

TS

218

ST

S_

de

lta(&

ed

ma

_st

s,

CL

K_

ge

thtim

e()

);21

9#

en

dif

220

221

#if

FM

_D

EM

_C

F_

INT

_T

IME

_L

ED

222

LE

D_

off

(L

ED

_2)

;22

3#

en

dif

224

}22

522

6vo

idd

acI

nt

(vo

id)

227

{22

8#

ifF

M_

DE

M_

CF

_IN

T_

OC

CU

R_

LE

D22

9L

ED

_to

gg

le(

LE

D_

1);

230

#e

nd

if23

123

2#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

LE

D23

3L

ED

_o

n(

LE

D_

1);

234

#e

nd

if23

523

6#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

ST

S23

7S

TS

_se

t(&

da

c_st

s,

CL

K_

ge

thtim

e()

);23

8#

en

dif

239

240

/*in

terp

ola

tea

mis

sin

gsa

mp

le*/

241

if(

ou

tco

un

ter

>1

5)

242

{24

3#

ifF

M_

DE

M_

CF

_IN

T_

OC

CU

R_

LE

D24

4L

ED

_to

gg

le(

LE

D_

3);

245

#e

nd

if24

6/*

sele

ctth

eb

uffe

r*/

247

if(

a_

inE

DM

A)

248

{24

9A

D5

35

_H

WI_

write

(o

utA

D5

35

h,(

(o

ut_

bu

ffe

r_A

[15

]+o

ut_

bu

ffe

r_B

[0])

/2))

;25

0#

ifF

M_

DE

M_

CF

_D

EB

UG

251

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

Ae

rro

r:%

d",

ou

tco

un

ter

);25

2#

en

dif

253

}e

lse

254

{25

5A

D5

35

_H

WI_

write

(o

utA

D5

35

h,(

(o

ut_

bu

ffe

r_B

[15

]+o

ut_

bu

ffe

r_A

[0])

/2))

;25

6#

ifF

M_

DE

M_

CF

_D

EB

UG

257

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

Be

rro

r:%

d",

ou

tco

un

ter

);25

8#

en

dif

259

}26

0}

els

e/*

ou

tpu

ta

valu

e*/

261

{26

2/*

sele

ctth

eb

uffe

r*/

263

if(

a_

inE

DM

A)

264

{26

5A

D5

35

_H

WI_

write

(o

utA

D5

35

h,

ou

t_b

uffe

r_A

[o

utc

ou

nte

r])

;26

6#

ifF

M_

DE

M_

CF

_D

EB

UG

267

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

A:%

d",

ou

tco

un

ter

);26

8#

en

dif

269

}e

lse

270

{27

1A

D5

35

_H

WI_

wri

te(

ou

tAD

53

5h

,o

ut_

bu

ffe

r_B

[o

utc

ou

nte

r])

;27

2#

ifF

M_

DE

M_

CF

_D

EB

UG

273

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

B:%

d",

ou

tco

un

ter

);27

4#

en

dif

275

}27

6/*

up

da

teo

utc

ou

nte

r*/

277

ou

tco

un

ter

++

;27

8}

279

280

#if

FM

_D

EM

_C

F_

INT

_T

IME

_S

TS

281

ST

S_

de

lta(&

da

c_st

s,

CL

K_

ge

thtim

e()

);28

2#

en

dif

283

284

#if

FM

_D

EM

_C

F_

INT

_T

IME

_L

ED

285

LE

D_

off

(L

ED

_1)

;28

6#

en

dif

287

}28

828

9/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--29

0so

ftw

are

inte

rru

pt

fun

ctio

ns

291

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

292

293

void

de

mo

du

late

Sw

iFu

nc

(vo

id)

294

{29

5in

ti

;29

629

7#

ifF

M_

DE

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T_

TIM

E_

LE

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n(

LE

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de

mo

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CL

K_

ge

thtim

e()

);30

3#

en

dif

304

305

for

(i

=0

;i

<B

UF

FE

RS

IZE

_IN

PU

T;i

++

)30

6{

307

in_

bu

ffe

r_p

tr[

i]=

in_

bu

ffe

r_p

tr[

i]<

<2

;30

8}

309

310

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

311

ST

S_

set

(&m

ix_

sts

,C

LK

_g

eth

time

());

312

#e

nd

if31

3q

ua

d_

mix

(in

_b

uffe

r_p

tr,

re_

bu

ffe

r,

im_

bu

ffe

r);

314

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

315

ST

S_

de

lta(&

mix

_st

s,

CL

K_

ge

thtim

e()

);31

6#

en

dif

317

318

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

319

ST

S_

set

(&d

em

_st

s,

CL

K_

ge

thtim

e()

);32

0#

en

dif

321

#if

(F

M_

DE

MO

DU

LA

TO

R=

=F

M_

PL

L_

DE

M)32

2p

ll_d

em

od

ula

te(

re_

bu

ffe

r,

im_

bu

ffe

r,

ou

t_b

uffe

r);

323

#e

lif(

FM

_D

EM

OD

UL

AT

OR

==

FM

_M

IXE

D_

DE

M)32

4m

ixe

d_

de

mo

du

late

(re

_b

uffe

r,

im_

bu

ffe

r,

ou

t_b

uffe

r);

325

#e

lse

326

#e

rro

rN

od

em

od

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tor

alg

orith

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efin

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327

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if32

8#

ifF

M_

DE

M_

CF

_F

UN

C_

TIM

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elta

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em

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e()

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0#

en

dif

331

332

#if

FM

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NC

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set

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ter_

sts

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LK

_g

eth

time

());

334

#e

nd

if33

5o

ut_

filte

r(

ou

t_b

uffe

r,

ou

t_b

uffe

r_p

tr);

336

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

337

ST

S_

de

lta(&

filte

r_st

s,

CL

K_

ge

thtim

e()

);33

8#

en

dif

339

340

#if

FM

_D

EM

_C

F_

INT

_T

IME

_S

TS

341

ST

S_

de

lta(&

de

mo

du

late

_st

s,

CL

K_

ge

thtim

e()

);34

2#

en

dif

343

344

#if

FM

_D

EM

_C

F_

INT

_T

IME

_L

ED

345

LE

D_

off

(L

ED

_3)

;34

6#

en

dif

347

}

128

Page 149: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

quad

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effic

ien

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an

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sin

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req

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31

39

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sho

rtg

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07

6;

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s*/

28sh

ort

ge

n_

b1

_si

n=

31

48

6;

/*si

n*/

29sh

ort

ge

n_

a1

=-1

81

52

;/*

sin

/co

s*/

30 31/*

de

lay

varia

be

ls*/

32sh

ort

ge

n_

z[3

]=

{0,0

,26

21

3};

/*fir

stva

lue

(de

ltafu

nct

ion

)*/

33/*

0.8

toa

void

ove

rflo

ws

*/34 35

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

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----

36co

effic

ien

tso

fm

ixe

rlo

w-p

ass

(mix

_lp

)37

----

----

----

----

----

----

----

----

----

----

----

----

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----

----

----

--*/

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Ord

er

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ass

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nd

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30

0.0

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z*/

40/*

Sto

p-b

an

d:

60

dB

@1

90

00

.00

Hz

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#d

efin

eM

IX_

LP

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AS

CA

DE

S3

43sh

ort

con

stm

ix_

lp_

a[][3

]={

/*a

_i_

1a

a_

i_1

ba

_i_

2*/

44{

-80

92

,-8

09

2,

0},

45{

-17

44

4,

-17

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4,

11

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6},

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90

7,

-21

90

7,

22

40

6},

47};

48 49sh

ort

con

stm

ix_

lp_

b[][3

]={

/*b

_i_

0b

_i_

1b

_i_

2*/

50{

45

23

,4

52

3,

0},

51{

27

25

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45

0,

27

25

},52

{8

53

7,

17

07

4,

85

37

},53

};54 55

sho

rtco

nst

mix

_lp

_sc

ale

=1

65

83

;/*

16

58

3to

avo

ido

verf

low

s*/

56 57/*

de

lay

varia

be

ls*/

58sh

ort

mix

_lp

_z_

re[][3

]={

59{

0,0

,0},

60{

0,0

,0},

61{

0,0

,0},

62};

63sh

ort

mix

_lp

_z_

im[][3

]={

64{

0,0

,0},

65{

0,0

,0},

66{

0,0

,0},

67};

68 69/*

----

----

----

----

----

----

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----

----

----

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----

----

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imp

lem

en

tatio

no

ffu

nct

ion

71--

----

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----

----

----

----

----

----

*/72

void

qu

ad

_m

ix(

sho

rtin

_b

uffe

r[]

,sh

ort

re_

bu

ffe

r[]

,sh

ort

im_

bu

ffe

r[])

73{

74in

ti

,k

;75 76

/*_

_si

ne

an

dco

sin

eg

en

era

tion

__

*/77 78

for

(i

=0

;i

<B

UF

FE

RS

IZE

_IN

PU

T;i

++

)79

{80

/*fe

ed

ba

ck*/

81g

en

_z

[0]=

-(((

ge

n_

a1

*g

en

_z

[1])

>>

15

)+

ge

n_

z[2

]);

82 83/*

fore

wa

rd*/

84re

_b

uffe

r[

i]=

ge

n_

z[0

]+

((g

en

_b

1_

cos

*g

en

_z

[1])

>>

15

);85

im_

bu

ffe

r[

i]=

(g

en

_b

1_

sin

*g

en

_z

[1])

>>

15

;86 87

/*sh

iftd

ela

ys*/

88g

en

_z

[2]=

ge

n_

z[1

];89

ge

n_

z[1

]=g

en

_z

[0];

90}

91 92/*

__

mix

ing

an

dsc

alin

g_

_*/

93 94fo

r(

i=

0;

i<

BU

FF

ER

SIZ

E_

INP

UT;

i+

+)

95{

96/*

mix

ing

*/97

re_

bu

ffe

r[

i]=

(re

_b

uffe

r[

i]*

in_

bu

ffe

r[

i])

>>

15

;98

im_

bu

ffe

r[

i]=

(im

_b

uffe

r[

i]*

in_

bu

ffe

r[

i])

>>

15

;99 100

/*sc

alin

ga

nd

ne

go

fim

_p

ath

*/10

1re

_b

uffe

r[

i]=

(re

_b

uffe

r[

i]*

mix

_lp

_sc

ale

)>>

15

;10

2im

_b

uffe

r[

i]=

-((

im_

bu

ffe

r[

i]*

mix

_lp

_sc

ale

)>>

15

);10

3}

104

105

/*_

_lo

w-p

ass

filte

rin

g_

_*/

106

107

/*--

Ca

sca

de

0(f

irst

Ord

er)

--*/

108

for

(i

=0

;i

<B

UF

FE

RS

IZE

_IN

PU

T;i

++

)10

9{

110

/*fe

ed

ba

ck*/

111

mix

_lp

_z_

re[0

][0

]=

re_

bu

ffe

r[

i]-

((

mix

_lp

_a

[0][0

]*m

ix_

lp_

z_re

[0][1

]+

/*a

_1

a*z

1*/

129

Page 150: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings11

2m

ix_

lp_

a[0

][1

]*m

ix_

lp_

z_re

[0][1

]/*

a_

1b

*z1

*/11

3)>

>1

5);

114

115

mix

_lp

_z_

im[0

][0

]=

im_

bu

ffe

r[

i]-

((

mix

_lp

_a

[0][0

]*m

ix_

lp_

z_im

[0][1

]+

/*a

_1

a*z

1*/

116

mix

_lp

_a

[0][1

]*m

ix_

lp_

z_im

[0][1

]/*

a_

1b

*z1

*/11

7)>

>1

5);

118

119

/*fo

rew

ard

*/12

0re

_b

uffe

r[

i]=

(m

ix_

lp_

b[0

][0

]*m

ix_

lp_

z_re

[0][0

]+/*

b_

0*

z0*/

121

mix

_lp

_b

[0][1

]*m

ix_

lp_

z_re

[0][1

]/*

b_

1*

z1*/

122

)>>

15

;12

312

4im

_b

uffe

r[

i]=

(m

ix_

lp_

b[0

][0

]*m

ix_

lp_

z_im

[0][0

]+/*

b_

0*

z0*/

125

mix

_lp

_b

[0][1

]*m

ix_

lp_

z_im

[0][1

]/*

b_

1*

z1*/

126

)>>

15

;12

712

8/*

shift

de

lays

*/12

9m

ix_

lp_

z_re

[0][1

]=m

ix_

lp_

z_re

[0][0

];13

013

1m

ix_

lp_

z_im

[0][1

]=m

ix_

lp_

z_im

[0][0

];13

2}

133

134

/*--

Ca

sca

de

1(S

eco

nd

Ord

er)

--*/

135

for

(i

=0

;i

<B

UF

FE

RS

IZE

_IN

PU

T;i

++

)13

6{

137

/*fe

ed

ba

ck*/

138

mix

_lp

_z_

re[1

][0

]=

re_

bu

ffe

r[

i]-

((

mix

_lp

_a

[1][0

]*m

ix_

lp_

z_re

[1][1

]+

/*a

_1

a*z

1*/

139

mix

_lp

_a

[1][1

]*m

ix_

lp_

z_re

[1][1

]+

/*a

_1

b*z

1*/

140

mix

_lp

_a

[1][2

]*m

ix_

lp_

z_re

[1][2

]/*

a_

2*z

2*/

141

)>>

15

);14

214

3m

ix_

lp_

z_im

[1][0

]=

im_

bu

ffe

r[

i]-

((

mix

_lp

_a

[1][0

]*m

ix_

lp_

z_im

[1][1

]+

/*a

_1

a*z

1*/

144

mix

_lp

_a

[1][1

]*m

ix_

lp_

z_im

[1][1

]+

/*a

_1

b*z

1*/

145

mix

_lp

_a

[1][2

]*m

ix_

lp_

z_im

[1][2

]/*

a_

2*z

2*/

146

)>>

15

);14

714

8/*

fore

wa

rd*/

149

re_

bu

ffe

r[

i]=

(m

ix_

lp_

b[1

][0

]*m

ix_

lp_

z_re

[1][0

]+/*

b_

0*

z0*/

150

mix

_lp

_b

[1][1

]*m

ix_

lp_

z_re

[1][1

]+/*

b_

1*

z1*/

151

mix

_lp

_b

[1][2

]*m

ix_

lp_

z_re

[1][2

]/*

b_

2*

z2*/

152

)>>

15

;15

315

4im

_b

uffe

r[

i]=

(m

ix_

lp_

b[1

][0

]*m

ix_

lp_

z_im

[1][0

]+/*

b_

0*

z0*/

155

mix

_lp

_b

[1][1

]*m

ix_

lp_

z_im

[1][1

]+/*

b_

1*

z1*/

156

mix

_lp

_b

[1][2

]*m

ix_

lp_

z_im

[1][2

]/*

b_

2*

z2*/

157

)>>

15

;15

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9/*

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de

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216

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166

167

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er)

--*/

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173

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174

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177

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178

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186

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190

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195

196

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197

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F.23

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_37

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F.24

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1-

jan

20

02

130

Page 151: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

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F.25

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F.26

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Page 153: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

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133

Page 154: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings4

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3{

134

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F.1. C Listings

164

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135

Page 156: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

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174

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178

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for

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183

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136

Page 157: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

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40 41 42 43/*

----

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LE

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ject

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tom

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105

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111

112

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114

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115

116

#p

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118

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[B

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120

121

#p

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ma

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_M

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AN

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122

sho

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512

6#

pra

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ou

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127

sho

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DE

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LA

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128

#p

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AN

K(o

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ffe

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);12

9sh

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PU

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0#

pra

gm

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ou

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uffe

r_B

,6

);

137

Page 158: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings13

1sh

ort

ou

t_b

uffe

r_B

[B

UF

FE

RS

IZE

_O

UT

PU

T];13

213

313

413

5sh

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*in

_b

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136

sho

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ou

t_b

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tr;

137

Bo

ol

a_

inE

DM

A=

TR

UE;

138

sho

rto

utc

ou

nte

r=

0;

139

140

/*--

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----

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----

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----

141

the

ma

infu

nct

ion

142

----

----

----

----

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----

----

----

----

----

----

----

----

----

----

----

--*/

143

void

ma

in()

144

{14

5H

WI_

dis

ab

le()

;14

614

7#

ifF

M_

DE

M_

CF

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EB

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148

LO

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prin

tf(&

de

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log

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fo:

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gin

Of

ma

in")

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9#

en

dif

150

151

CS

L_

init

();

/*o

nch

ipin

it*/

152

BS

L_

init

();

/*o

nb

oa

rdin

it*/

153

154

ths1

40

8_

init

(in

_b

uffe

r_A

,in

_b

uffe

r_B

);15

5co

de

c_in

it()

;15

615

7in

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r_A

[0]=

10

;15

815

9H

WI_

en

ab

le()

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016

1th

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08

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art

();

162

cod

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sta

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;16

316

416

5#

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M_

CF

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T_

TIM

E_

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6L

ED

_o

ff(

LE

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AL

L);

167

#e

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if16

816

9#

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M_

DE

M_

CF

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EB

UG

170

LO

G_

prin

tf(&

de

bu

g_

log

,"In

fo:

En

dO

fm

ain

");

171

#e

nd

if17

2}

173

174

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

175

ha

rdw

are

inte

rru

pt

fun

ctio

ns

176

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

177

178

void

ed

ma

Int

(vo

id)

179

{18

0#

ifF

M_

DE

M_

CF

_IN

T_

OC

CU

R_

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_to

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182

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318

4#

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CF

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T_

TIM

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5L

ED

_o

n(

LE

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2);

186

#e

nd

if18

718

8#

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M_

DE

M_

CF

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T_

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9S

TS

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t(&

ed

ma

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CL

K_

ge

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e()

);19

0#

en

dif

191

192

/*re

set

ou

tco

un

ter

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3o

utc

ou

nte

r=

0;

194

195

/*se

lect

ED

MA

cha

nn

el

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6if

(E

DM

A_

intT

est

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HS

14

08

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UF

FE

R_

A_

TC

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7{

198

#if

FM

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F_

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BU

G19

9L

OG

_p

rin

tf(&

de

bu

g_

log

,"In

_A

");

200

#e

nd

if20

1/*

Cle

ar

tra

nsf

er

com

ple

tion

inte

rru

pt

flag

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2E

DM

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intC

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TH

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40

8_

BU

FF

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CC);

203

204

/*se

tb

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rp

oin

ters

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5a

_in

ED

MA

=F

AL

SE;

206

in_

bu

ffe

r_p

tr=

in_

bu

ffe

r_A

;20

7o

ut_

bu

ffe

r_p

tr=

ou

t_b

uffe

r_A

;20

820

9/*

po

stso

ftw

are

inte

rru

pt

->st

art

de

mo

du

latio

n*/

210

SW

I_p

ost

(&d

em

od

ula

te_

swi

);

211

}21

2if

(E

DM

A_

intT

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(T

HS

14

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_B

UF

FE

R_

B_

TC

C))21

3{

214

#if

FM

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EM

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F_

DE

BU

G21

5L

OG

_p

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tf(&

de

bu

g_

log

,"In

_B

");

216

#e

nd

if21

7/*

Cle

ar

tra

nsf

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com

ple

tion

inte

rru

pt

flag

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8E

DM

A_

intC

lea

r(

TH

S1

40

8_

BU

FF

ER

_B

_T

CC);

219

220

/*se

tb

uffe

rp

oin

ters

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1a

_in

ED

MA

=T

RU

E;22

2in

_b

uffe

r_p

tr=

in_

bu

ffe

r_B

;22

3o

ut_

bu

ffe

r_p

tr=

ou

t_b

uffe

r_B

;22

422

5/*

po

stso

ftw

are

inte

rru

pt

->st

art

de

mo

du

latio

n*/

226

SW

I_p

ost

(&d

em

od

ula

te_

swi

);22

7}

228

229

#if

FM

_D

EM

_C

F_

INT

_T

IME

_S

TS

230

ST

S_

de

lta(&

ed

ma

_st

s,

CL

K_

ge

thtim

e()

);23

1#

en

dif

232

233

#if

FM

_D

EM

_C

F_

INT

_T

IME

_L

ED

234

LE

D_

off

(L

ED

_2)

;23

5#

en

dif

236

}23

723

8vo

idd

acI

nt

(vo

id)

239

{24

0#

ifF

M_

DE

M_

CF

_IN

T_

OC

CU

R_

LE

D24

1L

ED

_to

gg

le(

LE

D_

1);

242

#e

nd

if24

324

4#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

LE

D24

5L

ED

_o

n(

LE

D_

1);

246

#e

nd

if24

724

8#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

ST

S24

9S

TS

_se

t(&

da

c_st

s,

CL

K_

ge

thtim

e()

);25

0#

en

dif

251

252

/*in

terp

ola

tea

mis

sin

gsa

mp

le*/

253

if(

ou

tco

un

ter

>1

5)

254

{25

5#

ifF

M_

DE

M_

CF

_IN

T_

OC

CU

R_

LE

D25

6L

ED

_to

gg

le(

LE

D_

3);

257

#e

nd

if25

8/*

sele

ctth

eb

uffe

r*/

259

if(

a_

inE

DM

A)

260

{26

1A

D5

35

_H

WI_

write

(o

utA

D5

35

h,(

(o

ut_

bu

ffe

r_A

[15

]+o

ut_

bu

ffe

r_B

[0])

/2))

;26

2#

ifF

M_

DE

M_

CF

_D

EB

UG

263

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

Ae

rro

r:%

d",

ou

tco

un

ter

);26

4#

en

dif

265

}e

lse

266

{26

7A

D5

35

_H

WI_

write

(o

utA

D5

35

h,(

(o

ut_

bu

ffe

r_B

[15

]+o

ut_

bu

ffe

r_A

[0])

/2))

;26

8#

ifF

M_

DE

M_

CF

_D

EB

UG

269

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

Be

rro

r:%

d",

ou

tco

un

ter

);27

0#

en

dif

271

}27

2}

els

e/*

ou

tpu

ta

valu

e*/

273

{27

4/*

sele

ctth

eb

uffe

r*/

275

if(

a_

inE

DM

A)

276

{27

7A

D5

35

_H

WI_

write

(o

utA

D5

35

h,

ou

t_b

uffe

r_A

[o

utc

ou

nte

r])

;27

8#

ifF

M_

DE

M_

CF

_D

EB

UG

279

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

A:%

d",

ou

tco

un

ter

);28

0#

en

dif

281

}e

lse

282

{28

3A

D5

35

_H

WI_

write

(o

utA

D5

35

h,

ou

t_b

uffe

r_B

[o

utc

ou

nte

r])

;28

4#

ifF

M_

DE

M_

CF

_D

EB

UG

285

LO

G_

prin

tf(&

de

bu

g_

log

,"O

ut

B:%

d",

ou

tco

un

ter

);28

6#

en

dif

287

}28

8/*

up

da

teo

utc

ou

nte

r*/

289

ou

tco

un

ter

++

;29

0}

138

Page 159: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

291

292

#if

FM

_D

EM

_C

F_

INT

_T

IME

_S

TS

293

ST

S_

de

lta(&

da

c_st

s,

CL

K_

ge

thtim

e()

);29

4#

en

dif

295

296

#if

FM

_D

EM

_C

F_

INT

_T

IME

_L

ED

297

LE

D_

off

(L

ED

_1)

;29

8#

en

dif

299

}30

030

1/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--30

2so

ftw

are

inte

rru

pt

fun

ctio

ns

303

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

304

305

void

de

mo

du

late

Sw

iFu

nc

(vo

id)

306

{30

7in

ti

;30

830

9#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

LE

D31

0L

ED

_o

n(

LE

D_

3);

311

#e

nd

if31

231

3#

ifF

M_

DE

M_

CF

_IN

T_

TIM

E_

ST

S31

4S

TS

_se

t(&

de

mo

du

late

_st

s,

CL

K_

ge

thtim

e()

);31

5#

en

dif

316

317

for

(i

=0

;i

<B

UF

FE

RS

IZE

_IN

PU

T;i

++

)31

8{

319

in_

bu

ffe

r_p

tr[

i]=

in_

bu

ffe

r_p

tr[

i]<

<2

;32

0}

321

322

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

323

ST

S_

set

(&m

ix_

sts

,C

LK

_g

eth

time

());

324

#e

nd

if32

5q

ua

d_

mix

(in

_b

uffe

r_p

tr,

re_

bu

ffe

r,

im_

bu

ffe

r);

326

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

327

ST

S_

de

lta(&

mix

_st

s,

CL

K_

ge

thtim

e()

);32

8#

en

dif

329

330

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

331

ST

S_

set

(&d

em

_st

s,

CL

K_

ge

thtim

e()

);33

2#

en

dif

333

#if

(F

M_

DE

MO

DU

LA

TO

R=

=F

M_

PL

L_

DE

M)33

4p

ll_d

em

od

ula

te(

re_

bu

ffe

r,

im_

bu

ffe

r,

ou

t_b

uffe

r);

335

#e

lif(

FM

_D

EM

OD

UL

AT

OR

==

FM

_M

IXE

D_

DE

M)33

6m

ixe

d_

de

mo

du

late

(re

_b

uffe

r,

im_

bu

ffe

r,

ou

t_b

uffe

r);

337

#e

lse

338

#e

rro

rN

od

em

od

ula

tor

alg

orith

md

efin

ed

339

#e

nd

if34

0#

ifF

M_

DE

M_

CF

_F

UN

C_

TIM

E_

ST

S34

1S

TS

_d

elta

(&d

em

_st

s,

CL

K_

ge

thtim

e()

);34

2#

en

dif

343

344

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

345

ST

S_

set

(&fil

ter_

sts

,C

LK

_g

eth

time

());

346

#e

nd

if34

7o

ut_

filte

r(

ou

t_b

uffe

r,

ou

t_b

uffe

r_p

tr);

348

#if

FM

_D

EM

_C

F_

FU

NC

_T

IME

_S

TS

349

ST

S_

de

lta(&

filte

r_st

s,

CL

K_

ge

thtim

e()

);35

0#

en

dif

351

352

#if

FM

_D

EM

_C

F_

INT

_T

IME

_S

TS

353

ST

S_

de

lta(&

de

mo

du

late

_st

s,

CL

K_

ge

thtim

e()

);35

4#

en

dif

355

356

#if

FM

_D

EM

_C

F_

INT

_T

IME

_L

ED

357

LE

D_

off

(L

ED

_3)

;35

8#

en

dif

359

}

quad

_mix

List

ing

F.35

:Fix

ed-P

oint

Opt

imiz

ed::

quad

_mix

.h1

/*_

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

_

2Q

UA

DR

AT

UR

EM

IXE

R-

VE

RS

ION

FIX

ED

PO

INT

13 4

file

:q

ua

d_

mix

.h5

da

te:

oct

20

01

-ja

n2

00

26

by

:c.

ha

ller

7f.

sch

nyd

er

8_

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

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_9

*/10 11

#ifn

de

f_

QU

AD

_M

IX_

12#

de

fine

_Q

UA

D_

MIX

_13 14

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

15in

clu

de

s16

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

17#

incl

ud

e"g

lob

al_

settin

gs.

h"

18 19/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--20

glo

ba

lfu

nct

ion

s21

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

22/*

23th

esi

gn

al

inth

ein

_b

uffe

ris

qu

ad

ratu

rem

ixe

dto

the

two

24b

uffe

rsre

_b

uffe

ra

nd

im_

bu

ffe

ra

nd

isa

lso

do

wn

sam

ple

db

y25

DO

WN

SA

MP

LE

_O

NE

26 27P

ara

me

ters

:28

in_

bu

ffe

rb

uff

er

with

inp

ut

sig

na

l29

re_

bu

ffe

rb

uff

er

of

sig

na

lm

ixe

dw

ithco

sin

e30

ou

t_b

uffe

rb

uff

er

of

sig

na

lm

ixe

dw

ithsi

ne

31*/

32e

xte

rnvo

idq

ua

d_

mix

(sh

ort

in_

bu

ffe

r[]

,sh

ort

re_

bu

ffe

r[]

,sh

ort

im_

bu

ffe

r[]);

33 34#

en

dif

/*_

QU

AD

_M

IX_

*/35 36

/*_

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

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__

__

__

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_37

EN

DO

FT

HE

FIL

E38

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

*/

List

ing

F.36

:Fix

ed-P

oint

Opt

imiz

ed::

quad

_mix

.c1

/*_

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

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__

__

__

__

__

__

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_2

QU

AD

RA

TU

RE

MIX

ER

-V

ER

SIO

NF

IXE

DP

OIN

T1

3 4fil

e:

qu

ad

_m

ix.c

5d

ate

:o

ct2

00

1-

jan

20

02

6b

y:

c.h

alle

r7

f.sc

hn

yde

r8

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

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__

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9*/

10 11/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

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incl

ud

es

13--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

*/14

#in

clu

de

"qu

ad

_m

ix.h

"15 16

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

17g

lob

al

varib

les

18--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

*/19 20

/*--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

21co

effic

ien

tso

fsi

ne

an

dco

sin

eo

szila

tor

22--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

*/23

/*F

req

ue

ncy

:1

31

39

.93

HZ

*/24 25

sho

rtg

en

_b

0_

cos

=1

65

83

;/*

cos*

/26

sho

rtg

en

_b

1_

cos

=-4

59

3;

/*co

s*/

27sh

ort

ge

n_

b1

_si

n=

-15

93

4;

/*si

n*/

28sh

ort

ge

n_

a1

=-1

81

52

;/*

sin

/co

s*/

29 30/*

de

lay

vari

ab

els

*/31

sho

rtg

en

_z

[3]

={0

,0,2

62

13

};/*

0.8

for

first

valu

eo

fd

elta

fun

ctio

n*/

32 33/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--34

coe

ffic

ien

tso

fm

ixe

rlo

w-p

ass

(mix

_lp

)35

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

36/*

Ord

er

:5

*/37

/*P

ass

-ba

nd

:2

dB

@6

30

0.0

0H

z*/

38/*

Sto

p-b

an

d:

60

dB

@1

90

00

.00

Hz

*/39

139

Page 160: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings40

#d

efin

eM

IX_

LP

_C

AS

CA

DE

S3

41sh

ort

mix

_lp

_a

[][3

]={

/*a

_i_

1a

a_

i_1

ba

_i_

2*/

42{

-80

92

,-8

09

2,

0},

43{

-17

44

4,

-17

44

4,

11

16

6},

44{

-21

90

7,

-21

90

7,

22

40

6},

45};

46 47sh

ort

mix

_lp

_b

[][3

]={

/*b

_i_

0b

_i_

1b

_i_

2*/

48{

45

23

,4

52

3,

0},

49{

27

25

,5

45

0,

27

25

},50

{8

53

7,

17

07

4,

85

37

},51

};52 53

/*S

calin

gin

clu

de

din

ou

tpu

to

fo

szis

*/54 55

/*d

ela

yva

ria

be

ls*/

56sh

ort

mix

_lp

_z_

re[][3

]={

57{

0,0

,0},

58{

0,0

,0},

59{

0,0

,0},

60};

61sh

ort

mix

_lp

_z_

im[][3

]={

62{

0,0

,0},

63{

0,0

,0},

64{

0,0

,0},

65};

66 67/*

de

lay

varia

be

ls*/

68sh

ort

as_

mix

_lp

_z_

re[][3

]={

69{

0,0

,0},

70{

0,0

,0},

71{

0,0

,0},

72};

73sh

ort

as_

mix

_lp

_z_

im[][3

]={

74{

0,0

,0},

75{

0,0

,0},

76{

0,0

,0},

77};

78 79/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--80

imp

lem

en

tatio

no

ffu

nct

ion

81--

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

*/82 83

/*im

ple

me

nta

tion

inlin

ea

ra

sse

mb

lyin

84fil

eq

ua

d_

mix

_lin

_a

ss!!!

*/85 86

/*_

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

_87

EN

DO

FT

HE

FIL

E88

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

*/

mix

ed_d

emod

ulat

e

List

ing

F.37

:Fix

ed-P

oint

Opt

imiz

ed::

mix

ed_d

emod

ulat

e.h

1/*

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

__

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Page 161: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

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Page 162: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

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142

Page 163: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

132

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143

Page 164: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings35

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144

Page 165: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.1. C Listings

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Page 166: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

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146

Page 167: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.2. Linear Assembly Listings

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+z1

*a1

b)

190

SU

Bim

_in

,im

_z_

0,

im_

z_0

191

192

;fo

rew

ard

of

filte

r19

3M

PY

re_

z_0

,re

_b

_0

,re

_p

rod

1;

z0*b

019

4M

PY

im_

z_0

,im

_b

_0

,im

_p

rod

119

519

6M

PY

re_

z_1

,re

_b

_1

,re

_in

;z1

*b1

197

MP

Yim

_z_

1,

im_

b_

1,

im_

in19

819

9A

DD

re_

in,

re_

pro

d1

,re

_in

;z0

*b0

+z1

*b1

200

AD

Dim

_in

,im

_p

rod

1,

im_

in20

120

2S

HR

re_

in,

15

,re

_in

;b

ack

toQ

15

203

SH

Rim

_in

,1

5,

im_

in20

420

5;

shift

de

lays

206

MV

re_

z_0

,re

_z_

120

7M

Vim

_z_

0,

im_

z_1

208

209

;st

ore

ou

tpu

tva

lue

sa

md

set

Po

inte

rto

ne

xtva

lue

210

ST

Hre

_in

,*

re_

b+

+21

1S

TH

im_

in,

*im

_b

++

212

213

;in

cre

me

nt

cou

nte

ra

nd

bra

nch

till

loo

pcn

t=0

214

[cn

t]

SU

Bcn

t,

1,

cnt

215

[cn

t]

BM

IX_

LO

OP

_C

021

621

7;

sto

red

ela

yst

ate

s21

8M

VK

L_

mix

_lp

_z_

re,

ptr

_re

219

MV

KL

_m

ix_

lp_

z_im

,p

tr_

im22

0M

VK

H_

mix

_lp

_z_

re,

ptr

_re

221

MV

KH

_m

ix_

lp_

z_im

,p

tr_

im22

222

3S

TH

re_

z_1

,*+

+p

tr_

re22

4S

TH

im_

z_1

,*+

+p

tr_

im22

522

6;-

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

---

227

;ca

sca

de

1(s

eco

nd

ord

er)

228

;---

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

-22

923

0;

cop

ya

dd

ress

of

inp

ut

bu

ffe

rs23

1M

Vre

_b

_s

,re

_b

232

MV

im_

b_

s,

im_

b23

323

4;

loa

dco

effic

ien

ts23

5M

VK

L_

mix

_lp

_a

,p

tr_

re23

6M

VK

L_

mix

_lp

_b

,p

tr_

im23

7M

VK

H_

mix

_lp

_a

,p

tr_

re23

8M

VK

H_

mix

_lp

_b

,p

tr_

im23

924

0A

DD

6,

ptr

_re

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tr_

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1A

DD

6,

ptr

_im

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tr_

im24

224

3L

DH

*p

tr_

re+

+,

re_

a_

1_

a24

4L

DH

*p

tr_

im+

+,

re_

b_

024

5L

DH

*p

tr_

re+

+,

re_

a_

1_

b24

6L

DH

*p

tr_

im+

+,

re_

b_

124

7L

DH

*p

tr_

re+

+,

re_

a_

224

8L

DH

*p

tr_

im+

+,

re_

b_

224

925

0M

Vre

_a

_1

_a

,im

_a

_1

_a

251

MV

re_

b_

0,

im_

b_

025

2M

Vre

_a

_1

_b

,im

_a

_1

_b

253

MV

re_

b_

1,

im_

b_

125

4M

Vre

_a

_2

,im

_a

_2

255

MV

re_

b_

2,

im_

b_

225

625

7;

loa

dd

ela

yst

ate

s25

8M

VK

L_

mix

_lp

_z_

re,

ptr

_re

259

MV

KL

_m

ix_

lp_

z_im

,p

tr_

im26

0M

VK

H_

mix

_lp

_z_

re,

ptr

_re

261

MV

KH

_m

ix_

lp_

z_im

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tr_

im26

226

3A

DD

6,

ptr

_re

,p

tr_

re;r

ed

ire

ctp

oin

ter

toco

eff

264

AD

D6

,p

tr_

im,

ptr

_im

265

266

LD

H*+

+p

tr_

re,

re_

z_1

267

LD

H*+

+p

tr_

im,

im_

z_1

268

269

LD

H*+

+p

tr_

re,

re_

z_2

270

LD

H*+

+p

tr_

im,

im_

z_2

271

272

;se

tup

loo

p27

3M

VK

12

8,

cnt

274

275

276

277

MIX

_L

OO

P_

C1:

.trip

12

8,

12

8;

loo

pw

ithm

in1

28

iter

an

dm

ax

12

8ite

r27

827

9;

loa

din

pu

tva

lue

s28

0L

DH

*re

_b

,re

_in

281

LD

H*

im_

b,

im_

in28

228

3;

fee

db

ack

of

filte

r28

4M

PY

re_

z_1

,re

_a

_1

_a

,re

_p

rod

1;

z1*

a1

a28

5M

PY

im_

z_1

,im

_a

_1

_a

,im

_p

rod

128

628

7M

PY

re_

z_1

,re

_a

_1

_b

,re

_p

rod

2;

z1*

a1

b28

8M

PY

im_

z_1

,im

_a

_1

_b

,im

_p

rod

228

929

0M

PY

re_

z_2

,re

_a

_2

,re

_z_

0;

z2*

a2

291

MP

Yim

_z_

2,

im_

a_

2,

im_

z_0

292

293

AD

Dre

_z_

0,

re_

pro

d1

,re

_z_

0;

z1*a

1a

+z2

*a2

294

AD

Dim

_z_

0,

im_

pro

d1

,im

_z_

029

529

6A

DD

re_

z_0

,re

_p

rod

2,

re_

z_0

;z1

*a1

a+

z1*a

1b

+z2

*a2

297

AD

Dim

_z_

0,

im_

pro

d2

,im

_z_

029

829

9S

HR

re_

z_0

,1

5,

re_

z_0

;b

ack

toQ

15

300

SH

Rim

_z_

0,

15

,im

_z_

030

130

2S

UB

re_

in,

re_

z_0

,re

_z_

0;

in-(

z1*a

1a

+z1

*a1

b+

z2*a

2)

303

SU

Bim

_in

,im

_z_

0,

im_

z_0

304

305

;fo

rew

ard

of

filte

r30

6M

PY

re_

z_0

,re

_b

_0

,re

_p

rod

1;

z0*b

030

7M

PY

im_

z_0

,im

_b

_0

,im

_p

rod

1

147

Page 168: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings30

830

9M

PY

re_

z_1

,re

_b

_1

,re

_p

rod

2;

z1*b

131

0M

PY

im_

z_1

,im

_b

_1

,im

_p

rod

231

131

2M

PY

re_

z_2

,re

_b

_2

,re

_in

;z2

*b2

313

MP

Yim

_z_

2,

im_

b_

2,

im_

in31

431

5A

DD

re_

in,

re_

pro

d1

,re

_in

;z0

*b0

+z2

*b2

316

AD

Dim

_in

,im

_p

rod

1,

im_

in31

731

8A

DD

re_

in,

re_

pro

d2

,re

_in

;z0

*b0

+z1

*b1

+z2

*b2

319

AD

Dim

_in

,im

_p

rod

2,

im_

in32

032

1S

HR

re_

in,

15

,re

_in

;b

ack

toQ

15

322

SH

Rim

_in

,1

5,

im_

in32

332

4;

shift

de

lays

325

MV

re_

z_1

,re

_z_

232

6M

Vim

_z_

1,

im_

z_2

327

328

MV

re_

z_0

,re

_z_

132

9M

Vim

_z_

0,

im_

z_1

330

331

;st

ore

ou

tpu

tva

lue

sa

md

set

Po

inte

rto

ne

xtva

lue

332

ST

Hre

_in

,*

re_

b+

+33

3S

TH

im_

in,

*im

_b

++

334

335

;in

cre

me

nt

cou

nte

ra

nd

bra

nch

till

loo

pcn

t=0

336

[cn

t]

SU

Bcn

t,

1,

cnt

337

[cn

t]

BM

IX_

LO

OP

_C

133

833

9;

sto

red

ela

yst

ate

s34

0M

VK

L_

mix

_lp

_z_

re,

ptr

_re

341

MV

KL

_m

ix_

lp_

z_im

,p

tr_

im34

2M

VK

H_

mix

_lp

_z_

re,

ptr

_re

343

MV

KH

_m

ix_

lp_

z_im

,p

tr_

im34

434

5A

DD

6,

ptr

_re

,p

tr_

re34

6A

DD

6,

ptr

_im

,p

tr_

im34

734

8S

TH

re_

z_1

,*+

+p

tr_

re34

9S

TH

re_

z_2

,*+

+p

tr_

re35

035

1S

TH

im_

z_1

,*+

+p

tr_

im35

2S

TH

im_

z_2

,*+

+p

tr_

im35

335

4;-

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

---

355

;ca

sca

de

2(s

eco

nd

ord

er)

356

;---

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

-35

7;

cop

ya

dd

ress

of

inp

ut

bu

ffe

rs35

8M

Vre

_b

_s

,re

_b

359

MV

im_

b_

s,

im_

b36

036

1;lo

ad

coe

ffic

ien

ts36

2M

VK

L_

mix

_lp

_a

,p

tr_

re36

3M

VK

L_

mix

_lp

_b

,p

tr_

im36

436

5M

VK

H_

mix

_lp

_a

,p

tr_

re36

6M

VK

H_

mix

_lp

_b

,p

tr_

im36

736

8A

DD

6,

ptr

_re

,p

tr_

re36

9A

DD

6,

ptr

_im

,p

tr_

im37

037

1A

DD

6,

ptr

_re

,p

tr_

re37

2A

DD

6,

ptr

_im

,p

tr_

im37

337

4L

DH

*p

tr_

re+

+,

re_

a_

1_

a37

5L

DH

*p

tr_

im+

+,

re_

b_

037

6L

DH

*p

tr_

re+

+,

re_

a_

1_

b37

7L

DH

*p

tr_

im+

+,

re_

b_

137

8L

DH

*p

tr_

re+

+,

re_

a_

237

9L

DH

*p

tr_

im+

+,

re_

b_

238

038

1M

Vre

_a

_1

_a

,im

_a

_1

_a

382

MV

re_

b_

0,

im_

b_

038

3M

Vre

_a

_1

_b

,im

_a

_1

_b

384

MV

re_

b_

1,

im_

b_

138

5M

Vre

_a

_2

,im

_a

_2

386

MV

re_

b_

2,

im_

b_

238

7

388

;lo

ad

de

lay

sta

tes

389

MV

KL

_m

ix_

lp_

z_re

,p

tr_

re39

0M

VK

L_

mix

_lp

_z_

im,

ptr

_im

391

MV

KH

_m

ix_

lp_

z_re

,p

tr_

re39

2M

VK

H_

mix

_lp

_z_

im,

ptr

_im

393

394

AD

D6

,p

tr_

re,

ptr

_re

395

AD

D6

,p

tr_

im,

ptr

_im

;a

dd

12

396

397

AD

D6

,p

tr_

re,

ptr

_re

398

AD

D6

,p

tr_

im,

ptr

_im

;a

dd

12

399

400

LD

H*+

+p

tr_

re,

re_

z_1

401

LD

H*+

+p

tr_

im,

im_

z_1

402

403

LD

H*+

+p

tr_

re,

re_

z_2

404

LD

H*+

+p

tr_

im,

im_

z_2

405

406

;se

tup

loo

p40

7M

VK

12

8,

cnt

408

409

MIX

_L

OO

P_

C2:

.trip

12

8,

12

8;

loo

pw

ithm

in1

28

iter

an

dm

ax

12

8ite

r41

041

1;

loa

din

pu

tva

lue

s41

2L

DH

*re

_b

,re

_in

413

LD

H*

im_

b+

+,

im_

in41

441

5;

fee

db

ack

of

filte

r41

6M

PY

re_

z_1

,re

_a

_1

_a

,re

_p

rod

1;

z1*

a1

a41

7M

PY

im_

z_1

,im

_a

_1

_a

,im

_p

rod

141

841

9M

PY

re_

z_1

,re

_a

_1

_b

,re

_p

rod

2;

z1*

a1

b42

0M

PY

im_

z_1

,im

_a

_1

_b

,im

_p

rod

242

142

2M

PY

re_

z_2

,re

_a

_2

,re

_z_

0;

z2*

a2

423

MP

Yim

_z_

2,

im_

a_

2,

im_

z_0

424

425

AD

Dre

_z_

0,

re_

pro

d1

,re

_z_

0;

z1*a

1a

+z2

*a2

426

AD

Dim

_z_

0,

im_

pro

d1

,im

_z_

042

742

8A

DD

re_

z_0

,re

_p

rod

2,

re_

z_0

;z1

*a1

a+

z1*a

1b

+z2

*a2

429

AD

Dim

_z_

0,

im_

pro

d2

,im

_z_

043

043

1S

HR

re_

z_0

,1

5,

re_

z_0

;b

ack

toQ

15

432

SH

Rim

_z_

0,

15

,im

_z_

043

343

4S

UB

re_

in,

re_

z_0

,re

_z_

0;

in-(

z1*a

1a

+z1

*a1

b+

z2*a

2)

435

SU

Bim

_in

,im

_z_

0,

im_

z_0

436

437

;fo

rew

ard

of

filte

r43

8A

ND

0x7

,re

_b

,p

tr_

re;

do

forw

ard

on

lye

very

4th

time

439

AD

D0

x2,

re_

b,

re_

b;

red

ire

ctp

oin

ter

440

441

442

[!p

tr_

re]

MP

Yre

_z_

0,

re_

b_

0,

re_

pro

d1

;z0

*b0

443

[!p

tr_

re]

MP

Yim

_z_

0,

im_

b_

0,

im_

pro

d1

444

445

[!p

tr_

re]

MP

Yre

_z_

1,

re_

b_

1,

re_

pro

d2

;z1

*b1

446

[!p

tr_

re]

MP

Yim

_z_

1,

im_

b_

1,

im_

pro

d2

447

448

[!p

tr_

re]

MP

Yre

_z_

2,

re_

b_

2,

re_

in;

z2*b

244

9[!

ptr

_re

]M

PY

im_

z_2

,im

_b

_2

,im

_in

450

451

[!p

tr_

re]

AD

Dre

_in

,re

_p

rod

1,

re_

in;

z0*b

0+

z2*b

245

2[!

ptr

_re

]A

DD

im_

in,

im_

pro

d1

,im

_in

453

454

[!p

tr_

re]

AD

Dre

_in

,re

_p

rod

2,

re_

in;

z0*b

0+

z1*b

1+

z2*b

245

5[!

ptr

_re

]A

DD

im_

in,

im_

pro

d2

,im

_in

456

457

[!p

tr_

re]

SH

Rre

_in

,1

5,

re_

in;

ba

ckto

Q1

545

8[!

ptr

_re

]S

HR

im_

in,

15

,im

_in

459

460

;st

ore

ou

tpu

t46

1[!

ptr

_re

]S

TH

re_

in,

*re

_b

_s

++

462

[!p

tr_

re]

ST

Him

_in

,*

im_

b_

s+

+46

346

4;

shift

de

lays

465

MV

re_

z_1

,re

_z_

246

6M

Vim

_z_

1,

im_

z_2

467

148

Page 169: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.3. MATLAB Listings

468

MV

re_

z_0

,re

_z_

146

9M

Vim

_z_

0,

im_

z_1

470

471

;in

cre

me

nt

cou

nte

ra

nd

bra

nch

till

loo

pcn

t=0

472

[cn

t]

SU

Bcn

t,

1,

cnt

473

[cn

t]

BM

IX_

LO

OP

_C

247

447

5;

sto

red

ela

yst

ate

s47

6M

VK

L_

mix

_lp

_z_

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Page 170: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

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150

Page 171: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.3. MATLAB Listings

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up

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me)

);

151

Page 172: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings89

fprin

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^15

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)/2

;46

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Sig

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ut

Sig

na

l’,4

);14

3h

old

off

152

Page 173: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

F.3. MATLAB Listings

List

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F.53

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__

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_9 10

fa=

15

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8*2

93

*4);

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fp=

35

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;%

pa

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an

de

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12fs

=fa

/4;

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fre

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;%

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;%

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p-b

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15 16[

n,

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bu

tto

rd(

fp*2

/fa

,fs

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fa,

dp

,d

s);

%d

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rmin

eth

eo

rde

r17 18

[b

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]=b

utte

r(

n,

Wn)

;%

de

term

ine

dire

ctco

effic

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ts19

fre

qz

(b

,a

,25

6,

fa)

20 21[

z,

p,

k]=

bu

tte

r(

n,

Wn)

;%

de

rerm

ine

seco

nd

ord

er

coe

ffic

ien

ts22

[co

eff

,g

]=zp

2so

s(

z,

p,

k,’u

p’,’

inf’)

;23 24

coe

ffsa

ve=

coe

ff;

25ic

oe

ff=

coe

ff;

26 27N

s=si

ze(

coe

ff,1

);28 29

for

i=

1:

Ns

30ic

oe

ff(

i,:)=

rou

nd

(ic

oe

ff(

i,:)*

2^1

5);

31e

nd

32 33fp

rin

tf(’/*

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--\n

’);

34fp

rin

tf(’

coe

ffic

ien

tso

fn

ois

elo

w-p

ass

(no

_lp

)a

fte

rd

em

od

ula

tion

\n’);

35fp

rin

tf(’

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

--*/

\n’);

36fp

rin

tf(’

/*O

rde

r:

%2

i*/

\n’,

n);

37fp

rin

tf(’

/*P

ass

-ba

nd

:%

2i

dB

@%

6.2

fH

z*/

\n’,

dp

,fp

);38

fprin

tf(’

/*S

top

-ba

nd

:%

2i

dB

@%

6.2

fH

z*/

\n’,

ds

,fs

);39

fprin

tf(’\n

’);

40fp

rin

tf(’

#d

efin

eN

O_

LP

_C

AS

CA

DE

S%

i’,N

s);

41fp

rin

tf(’\n

’);

42fp

rin

tf(’

sho

rtn

o_

lp_

a[][2

]={

/*a

_i_

1a

_i_

2*/

\n’);

43fp

rin

tf(’

{%

6i

,%

6i

},\n

’,ic

oe

ff(:

,5:6

)’);

44fp

rin

tf(’

};\n

’);

45fp

rin

tf(’\n

’);

46fp

rin

tf(’

sho

rtn

o_

lp_

b[][3

]={

/*b

_i_

0b

_i_

1b

_i_

2*/

\n’);

47fp

rin

tf(’

{%

6i

,%

6i

,%

6i

},\n

’,ic

oe

ff(:

,1:3

)’);

48fp

rin

tf(’

};\n

’);

49fp

rin

tf(’\n

’);

50fp

rin

tf(’

sho

rtn

o_

lp_

sca

le=

%i;

\t/*

%f*

0.8

toa

void

ove

rflo

ws

*/\n

’,(ro

un

d((

g*0

.8)

*2^1

5))

,g

);51

fprin

tf(’\n

’);

52fp

rin

tf(’

/*d

ela

yva

ria

be

ls*/

\n’);

53fp

rin

tf(’

sho

rtn

o_

lp_

z[][3

]={

\n’);

54fo

ri

=1

:N

s55

fprin

tf(’

{0

,0,0

},\n

’,ic

oe

ff(:

,5:6

)’);

56e

nd

57fp

rin

tf(’

};\n

’);

58 59%

Filt

er

Te

st60

Nx=

30

0;

61y

=ze

ros

(N

s,N

x+2

);62 63

%x=

[00

(ra

nd

(1,N

x)-0

.5)*

2];

64 65t

=lin

spa

ce(0

,(1

/fa

*(N

x+1

)),

Nx+

2);

66%

x=si

n(2

*pi*

30

00

*t);

67%

x=ch

irp

(t,1

00

,t(N

x+2

),1

00

00

);68 69

x=

[01

on

es

(1,

Nx)

];70 71

xsa

ve=

x;

72 73x

=x

*g

*0.8

;74 75

d=

zero

s(

Ns,

Nx+

2);

76 77fo

rn

=3

:N

x+2

78fo

ri

=1

:N

s

79d

(i

,n

)=(

x(

n)-

coe

ff(

i,5

)*d

(i

,n

-1)-

coe

ff(

i,6

)*d

(i

,n

-2))

;80

y(

i,

n)=

(co

eff

(i

,1)*

d(

i,

n)+

coe

ff(

i,2

)*d

(i

,n

-1)+

coe

ff(

i,3

)*d

(i

,n

-2))

;81

x(

n)

=y

(i

,n

);82

en

d83

en

d84 85

figu

re86

for

i=

1:

Ns

87su

bp

lot

(2,

Ns,

i);

88p

lot

(d

(i

,:))

;89

leg

en

d([

’D’,

int2

str

(i

)]);

90 91su

bp

lot

(2,

Ns,

i+

Ns)

;92

plo

t(

y(

i,:))

;93

leg

en

d(’Y

’);

94e

nd

95 96fig

ure

97p

lot

(y

(N

s,:)

);98

ho

ldo

n99

plo

t(

xsa

ve,’r

’);

100

ho

ldo

ff

List

ing

F.54

:hig

hpas

s_de

sign

_noi

sefil

ter.m

1%

Hig

h-P

ass

Filt

er

De

sig

n-

Ve

rsio

n0

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nc

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25A

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);26

B=

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(:,1

:3);

27iA

=A

;28

iB=

B;

29 30fo

ri

=1

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c31

iA(

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(i

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2;

32iA

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i,2

)/2

;33

iA(

i,:)=

rou

nd

(iA

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34iB

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(iB

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35e

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36 37fp

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153

Page 174: Implementation of FM Demodulator Algorithms on a High … · Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor TMS320C6711 DSP ... rithms

Listings55

fprin

tf(’\n

’);

56fp

rin

tf(’

sho

rte

n_

hp

_sc

ale

=%

i;\t/*

0.5

*%f

toa

void

ove

rflo

ws

*/\n

’,(ro

un

d(

g*2

^15

/2))

,g

);57

fprin

tf(’\n

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58fp

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tf(’

#d

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N_

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tf(’\n

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60fp

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tf(’

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\n’);

61fp

rin

tf(’

sho

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62fo

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:n

c63

fprin

tf(’

{0

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64e

nd

65fp

rin

tf(’

};\n

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66 67 68 69 70n

x=

10

071

t=

linsp

ace

(0,(

1/

fa*(

nx

-1))

,n

x);

72x

=si

n(2

*p

i*3

00

*t

(1,1

:50

));

73x

=[

x,

cos

(2*

pi

*30

0*

t(1

,51

:n

x))

];74

%x=

[01

on

es(

1,n

x-2

)];

75 76 77xs

ave

=x

;78

x=

x*

g;

79 80ze

ta=

zero

s(

nc

,n

x);

81ka

pp

a=

zero

s(

nc

,n

x);

82y

=ze

ros

(n

c,

nx

);83 84

for

i=

1:

len

gth

(t

)85

for

c=

1:

nc

86y

(c

,i

)=ze

ta(

c,

i)+

(B

(c

,1)*

x(

i))

;87

zeta

(c

,i

+1

)=B

(c

,2)*

x(

i)-

A(

c,2

)*y

(c

,i

)+ka

pp

a(

c,

i);

88ka

pp

a(

c,

i+

1)=

B(

c,3

)*x

(i

)-A

(c

,3)*

y(

c,

i);

89x

(i

)=y

(c

,i

);90

en

d91

en

d92 93

alp

ha

=ze

ros

(n

c,

nx

);94

be

ta=

zero

s(

nc

,n

x);

95g

am

ma=

zero

s(

nc

,n

x);

96y2

=ze

ros

(n

c,

nx

);97 98

x=

xsa

ve;

99 100

for

i=

1:

len

gth

(t

)10

1fo

rc

=1

:n

c10

2a

lph

a(

c,

i)=

(-A

(c

,3)*

ga

mm

a(c

,i

))+

(-A

(c

,2)*

be

ta(

c,

i))

+x

(i

);10

3y2

(c

,i

)=(

B(

c,1

)*a

lph

a(

c,

i))

+(

B(

c,2

)*b

eta

(c

,i

))+

(B

(c

,3)*

ga

mm

a(c

,i

));

104

ga

mm

a(c

,i

+1

)=b

eta

(c

,i

);10

5b

eta

(c

,i

+1

)=a

lph

a(

c,

i);

106

x(

i)=

y(

c,

i);

107

en

d10

8e

nd

109

110

lab

els

=in

t2st

r([

1:

nc

]);

111

112

plo

t(

t,

xsa

ve,

t,

y);

113

leg

en

d(’in

’,’o

ut1

’,’o

ut2

’);

114

figu

re;

115

sub

plo

t(2

,1,1

)11

6p

lot

(t

,ze

ta(:

,1:

nx

))11

7le

ge

nd

(’ze

ta1

’,’ze

ta2

’);

118

sub

plo

t(2

,1,2

)11

9p

lot

(t

,ka

pp

a(:

,1:

nx

))12

0le

ge

nd

(’ka

pp

a1

’,’ka

pp

a2

’);

121

122

figu

re12

3p

lot

(t

,xs

ave

,t

,y

);12

4le

ge

nd

(’in

n’,’

ou

t1’,’

ou

t2’);

125

figu

re;

126

sub

plo

t(3

,1,1

)12

7p

lot

(t

,a

lph

a(:

,1:

nx

))12

8le

ge

nd

(’a

lph

a1

’,’a

lph

a2

’);

129

sub

plo

t(3

,1,2

)13

0p

lot

(t

,b

eta

(:,1

:n

x))

131

leg

en

d(’b

eta

1’,’

be

ta2

’);

132

sub

plo

t(3

,1,3

)13

3p

lot

(t

,g

am

ma(:,1

:n

x))

134

leg

en

d(’g

am

ma

1’,’

ga

mm

a2

’);

154