implementation of intelligent control in...

IMPLEMENTATION OF

INTELLIGENT CONTROL

IN THE FAULT RIDE THROUGH OF

GRID CONNECTED WIND GENERATORS

PHD DISSERTATION

EXTENDED SUMMARY

THEODOROS VRIONIS

UNIVERSITY OF PATRAS

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

DECEMBER 2013

ABSTRACT

3

ABSTRACT

This thesis studies the implementation of intelligent control techniques in the Fault Ride-Through

(FRT) of grid connected Wind Turbines (WTs). The proposed control systems are oriented to

meet the standards of the national Grid Codes (GCs), which require that WTs should stay

connected to the grid during and after specific fault conditions, in order to support the voltage at

the Point of Common Coupling (PCC).

The first part of the dissertation studies the issue of the fault ride-through capability of a wind

farm of induction generators, which is connected to an ac grid through an HVDC link based on

Voltage Sourced Converters (VSCs). In the latest literature, when the technology of HVDC

based on VSCs is used to connect a wind farm to the power system, the blocking of the VSCs

valves for a predefined short time interval is applied, in order to avoid the overcurrents and the

tripping of the wind turbines. This work proposes a control strategy which is implemented with

adaptive fuzzy controllers and deals with every different type of fault with a corresponding

appropriate action, blocking the converter valves for a time interval which depends on the

severity of the fault. In addition, after the deblocking of the valves, the proposed control system

activates a special controller, which alleviates the oscillations at the electrical system caused by

the blocking of the valves. In this way, the overcurrents are limited, the wind turbines manage to

remain connected and the ac voltage recovers quickly, as it is imposed by national grid codes.

The second part of the dissertation proposes a Computational Intelligence–based control strategy,

to enhance the low voltage ride-through capability of grid-connected WTs with doubly fed

induction generators (DFIGs). The conventional crowbar-based systems that were initially

applied in order to protect the rotor-side converter at the occurrence of grid faults, do not fulfill

the recent requirement of the national GCs that the WTs should supply reactive power to the grid

during and after the fault, in order to support the grid voltage. During the connection of the

crowbar, the DFIG behaves as a squirrel cage machine, absorbing reactive power from the grid.

This drawback led to the design of control systems that eliminate or even avoid the use of the

crowbar. In order to conform to the above mentioned requirement, this work proposes a control

scheme, which contributes to the optimal coordination of the two converters, aiming to attenuate

the disturbances to the system caused by the fault and ensure system stability. In order to

ABSTRACT

4

encounter the difficulties met due to the uncertainties of the system modeling and considering the

non linearity of the system, the controllers were designed based on fuzzy logic and genetic

algorithms, which are more efficient in such cases. By this concept the overcurrents at the rotor

windings and the dc side overvoltages are effectively eliminated. In addition, the FRT

requirement concerning the reactive power supply is fulfilled.

TABLE OF COMMON ABBREVIATIONS

-5-


CI Computational Intelligence

CS Control System

DFIG Double Fed Induction Generator

FC Fuzzy Controller

FDCS

Fault Detection and Confrontation

System

FL Fuzzy Logic

FRT Fault Ride Through

GA Genetic Algorithm

GC Grid Code

GSC Grid Side Converter

HVDC link High Voltage Direct Current link

IGBT Insulated Gate Bipolar Transistor

LVRT Low Voltage Ride Through

MF Membership Function

PCC Point of Common Coupling

PWM Pulse Width Modulation

RSC Rotor Side Converter

SCC Short Circuit Capacity

TSO Transmission System Operator


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VSC Voltage Source Converter

WF Wind Farm

CHAPTER 1

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CHAPTER 1:

INTRODUCTION

Nowadays, wind generation has become a substantial share of the total power generation.

According to the Global Wind Energy Council, the annual wind capacity during 2012 was almost

45 GW. In Figs 1.1-1.2 is shown the global annual and cumulative installed wind capacity from

1996 to 2012 respectively. Fig.1.3 illustrates the annual and cumulative offshore wind

installations from 1993 to 2012.

Fig. 1.1Annual installed wind capacity.

Source: Global Wind Energy Council.

Fig. 1.2 Cumulative installed wind capacity.

Source: Global Wind Energy Council.

CHAPTER 1

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Fig. 1.3 Annual and cumulative offshore wind installations.

Source: European Wind Energy Association.

As a result, Transmission System Operators (TSOs) of countries with high wind penetration have

revised their grid codes (GCs), making the requirements concerning the fault ride-through (FRT)

capability of WTs more stringent. The majority of the GCs require that the WTs should provide

low voltage ride-through (LVRT) capability for grid faults resulting in a 85% voltage drop or

even more. This means that they should stay connected to the grid during and after grid faults,

contributing to the system stability. Moreover, they should supply reactive power to the grid in

order to support the voltage recovery [1.1]-[1.5]. Fig. 1.4 outlines the FRT capability in some

European countries, USA, Canada and New Zealand [1.2]. If the voltage dip at the Point of

Common Coupling (PCC) results in a voltage below the corresponding curve shown in Fig. 1.4,

the WΤ can be disconnected. Otherwise the WT should stay connected, supporting the grid. The

majority of FRT requirements refers to symmetrical three phase faults at the ac grid.

The above mentioned requirements led the WT manufacturers to take into account the FRT

capability in the design of their control systems. At the same time, many researchers started

proposing advanced control techniques in order to fulfill the new FRT requirements.

CHAPTER 1

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Fig. 1.4 Fault Ride Through Requirements in various TSOs [1.2].

Taking into account the above requirements, this work studies the implementation of

computational intelligence to the control systems of WTs in order to enhance their FRT

capability. The first part of the dissertation studies the issue of the FRT capability of a WF of

induction generators, which is connected to an ac grid through an HVDC link based on Voltage

Sourced Converters (VSCs). This work proposes a control strategy which is implemented with

adaptive fuzzy controllers and deals with every different type of fault with a corresponding

appropriate action. The second part of the dissertation proposes a Computational Intelligence–

based control strategy, to enhance the low voltage ride-through capability of grid-connected

WTs with doubly fed induction generators (DFIGs).

CHAPTER 1

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References

[1.1] E.ON Netz GmbH, Bayreuth, “Requirements for offshore grid connections in the E.ON

Netz Network”, Updated: 1 April 2008, available at http://www.eon- netz.com.

[1.2] John Kabouris, Fotis D. Kanellos, “Impacts of Large Scale Wind Penetration on Energy

Supply Industry”, Energies 2009, 2, 1031-1041; doi:10.3390/en20401031, available:

http://www.mdpi.com/1996-1073/2/4/1031.

[1.3] M. Tsili, S. Papathanassiou, “A review of grid code technical requirements for wind

farms”, IET Renew. Power Gen., vol. 3, no. 3, pp.308 -332, 2009.

[1.4] W. Christiansen, D. T. Johnsen, “Analysis of requirements in selected Grid Codes”,

Technical Report, Section of Electric Power Engineering, Technical University of

Denmark (DTU) 2006.

[1.5] Willi Christiansen & David T. Johnsen, “Analysis of requirements in selected Grid

Codes”, Tech. Report.

http://www.eon-netz.com/

http://www.mdpi.com/1996-1073/2/4/1031

CHAPTER 2

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CHAPTER 2:

CONTROL OF AN HVDC LINK CONNECTING A WIND FARM

TO THE GRID FOR FAULT RIDE THROUGH ENHANCEMENT

2.1 Introduction

During the last decade, due to the increased energy demand and environmental concern, Wind

Farms (WFs) have penetrated to the field of power generation worldwide. Wind power is

integrated into electricity grids and is accounting for a noticeable share of the total power

generation. Suitable places for big clusters of windmills installations are uninhabited islands and

offshore platforms, because they offer high, uniform wind speed and acceptable visual impact. In

this case, the underwater transmission of power to the mainland grid has to be by cables. For long

distances ac transmission cannot be used to bring the wind power ashore, as long distance cables

produce large amounts of capacitive Vars. So dc transmission is the only applicable solution.

On the other hand, the dominating kind of wind power generators is that of asynchronous

generators, since they are robust and cost effective. Induction generators, however, do not

contribute to the regulation of grid voltage nor frequency and they are substantial absorbers of

reactive power. Furthermore, areas with good wind resources are geographically far from the

consumers and are in regions where the power grid is relatively weak. This generates many

problems such as voltage drop, voltage flicker, harmonic distortion and frequency deviation. As a

result, compensation is needed to preserve power quality in the network.

Classical HVDC links are not suitable for this type of transmission application, as they require a

high short circuit ratio between the two ends. On the contrary, the technology of HVDC based on

CHAPTER 2

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VSCs can be a feasible solution [2.1]-[2.27]. It presents the advantages of dc transmission and

due to the high switching capability of the VSCs’ IGBTs, it can instantly regulate the reactive

power and consequently the ac voltage, independently of the real power flow. So, the short circuit

ratio between the two ends of the link does not have to be high. Furthermore, the power quality

and system stability can be improved via continuously adjustable reactive power support with ac

voltage feedback control.

Recently, some papers which study the behavior of this type of link under steady state [2.28]-

[2.34] and short circuit faults [2.35]-[2.36] have been published. For the case of short circuit

faults at the ac system, these papers propose the blocking of the converter valves for a

temporary, predefined period, equal for all types of fault, in order to avoid the overcurrents and

the tripping of the Wind Turnines (WTs). This strategy, which is also applied in real projects

[2.37], accomplishes a satisfactory reduction of the overcurrents in many fault conditions, but

may not be effective enough when severe faults take place. In case where the applied blocking

period is not big enough, the overcurrents are not avoided, causing damages to the cables and

electronic devices of the VSCs, tripping of the WTs and power quality problems to the ac system.

On the other hand, in case of less severe faults, a bigger blocking period than the required one

can cause additional fluctuations to the connected electrical system.

In this chapter is proposed a control strategy that deals with every different type of fault with a

corresponding appropriate action, blocking the converter valves for a time interval which depends

on the severity of the fault. In addition, after the deblocking of the valves, the proposed control

system activates a special controller, which alleviates the oscillations at the electrical system

caused by the blocking of the valves. Comparative simulation results show that when

implementing the proposed control scheme, the cases of ac faults are optimally confronted,

avoiding the overcurrents and the tripping of the WTs and helping the power system reach a

steady state quickly.

CHAPTER 2

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2.2 Description and Control Principles of the VSC-based HVDC link

The power system studied in this chapter is shown in Fig. 2.1. It is an HVDC link based on

VSCs, which connects an offshore WF of induction generators to an ac grid.

VSC1 Station K

F

Vdc_2 Vdc_1

dc cable

PCC

P2

Vg_2 Vc_2 Vg_1

VSC2

Idc

VSC2 Station

ac grid

Wind Farm

P1

Vc_1

VSC1

Fig.

2.1 Configuration of the Power System studied.

Each converter station consists of a VSC, an interface transformer, dc capacitors and ac filters.

The two VSCs are connected with two coaxial cables. The bridge of the VSCs is of 2 levels

six-pulse type, with series-connected Insulated Gate Bipolar Transistors (IGBTs) in each valve,

Figs 2.2a, 2.2b. Each IGBT is provided with an antiparallel diode.

Valve1 Valve2 Valve3

Valve4 Valve5 Valve6

(a) ( b)

Fig. 2.2 (a) One level of a VSC bridge. (b) Structure of a VSC valve.

In each converter station, neglecting the losses at the transformer, the active and reactive power

CHAPTER 2

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flowing between the converter and the ac network is given from (2.1) and (2.2) respectively:

g _ i i

c _ i

i

V sinP V

X

(2.1)

g _ i i c _ i

c _ i

i

V cos VQ V

X

(2.2)

where Vc_i is the basic harmonic of the voltage magnitude at the VSCi side of the transformer

Vg_i is the basic harmonic of the voltage magnitude at the ac side of the transformer

δi is the phase angle between Vg_i and Vc_i

Xi is the transformer leakage reactance

i=1 in VSC1 and i=2 in VSC2.

Taking into account equations (2.1)-(2.2) and the fact that the phase angle δi can take relatively

small values, we can deduce that the real power P in each converter station can be controlled by

adjusting the phase angle δi between Vc_i and Vg_i, whereas the reactive power Q can be

controlled by adjusting the voltage magnitude of Vc_i, in relation to Vg_i. So, the main functions

of each VSC control system, is the adjustment of δi and Vc_i. The adjustment of Vc_i is regulated

through a modulation index mi of the PWM sinusoidal reference signal, whereas the

adjustment of δi is regulated through the phase angle of the PWM sinusoidal reference signal,

shown in Fig. 2.3 Consequently, the PWM method used for the firing of the converters, offers

the possibility of independent active and reactive power control in each converter. [2.27].

Basic harmonic Carrier Sinusoidal Reference Signal

time

(a)

(b)

Fig. 2.3 (a) PWM reference signals (b) Basic harmonic of the VSC output voltage.

CHAPTER 2

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In normal operation mode, the active power which is supplied to the HVDC link must be equal to

the active power received by the network at the other side of the link plus the losses. This power

balance is achieved by keeping constant the voltage at the point F (Fig. 2.1). Therefore, VSC2 is

designated the role of the dc voltage regulator at this point. For example, when the WF sends

more power to the dc link, the dc voltage at the point F increases. The control system of VSC2

detects the deviation of the dc voltage from its reference value and gives an order to increase the

phase angle of the PWM sinusoidal reference signal and consequently the phase angle of the

fundamental ac output voltage of VSC2, Vc_i, with respect to the ac voltage at the other side of

the transformer, Vg_i. Thus, according to (2.1), more power is absorbed by the ac grid, the dc

capacitors will discharge and the dc voltage will return to its reference value. As the dc voltage at

the point F is kept at a constant value, the active power flow between the two VSCs is

automatically balanced, without the need of telecommunication line between the stations.

The role of VSC1 is to drive the electrical frequency at the point K, Fig. 2.1, to its optimum

value. This is achieved by regulating the real power absorbed by VSC1, through the phase angle

of the PWM reference signal, as described in the previous paragraph. The optimum value of the

electrical speed at the point K corresponds to the maximum wind power absorption by the WF.

According to the WT curves, for each wind speed, there is a specific mechanical speed, which

corresponds to the maximum wind power absorption. This power, corresponds to a specific value

of induction generators’ slip and consequently, to a specific value of electrical speed at the point

K. For example, when the control system of VSC1 detects that the electrical frequency at the

point K is lower than its reference value, it gives an order to reduce the phase angle δ1. As a

result, VSC1 adsorbs less power and the slip of the induction generators is reduced. The energy

difference between the energy that is absorbed by the wind and the energy that is transmitted to

the link is stored as kinetic energy in the machine rotors, increasing the mechanical speed of the

rotors. This increase induces an increase at the electrical speed, as the slip has decreased. This

procedure continues, until the electrical frequency reaches its reference value.

The reactive power in each converter station can be controlled by adjusting the amplitude of the

ac voltage generated by the converter, and respectively, by adjusting the modulation index “mi”

of the PWM sinusoidal reference signal.

CHAPTER 2

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2.3 Description of the proposed control system.

A block diagram of the proposed control systems for VSC1 and VSC2 is shown in Figs. 2.4 and

2.5 respectively. They consist of two main subsystems: the Steady State Control System (SSCS),

which is active in normal operation mode, and the Fault Detection and Confrontation System

(FDCS), which is active when short circuit faults take place at the ac grid. These systems are an

improved version of the SSCS proposed in [2.38-2.39], as they are effective in both steady state

and fault conditions. All the controllers used are Fuzzy Controllers (FC).

CS2

CS1

CSblk,1

CSalv,1

VSC1 firing Control

Steady State Control System 1 (SSCS1)

Fault Detection and Confrontation System 1 (FDCS1)

Vg_1

Vg_1,ref

ΔVdc_1ΔIdc_1

ΔP1

dP1/dt

P1

ωel

ωrefCSref

m1

δ1

tblk1

δ1,pf

ωref

ωel

δ1,alv

Fault Detection ΔVdc_1

CS2

Vg_1

m1Vg_1,ref

Fig. 2.4 The proposed control system for VSC1.

CHAPTER 2

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CS4

CS3

CSblk,2

CSalv,2

VSC2 Firing Control

Steady State Control System 2 (SSCS2)

Fault Detection and Confrontation System 2 (FDCS2)

Vg_2

Vg_2,ref

ΔVdc_2

ΔIdc_2

ΔP2

dP2/dt

Vdc_2,ref

m2

δ2

tblk2

δ2,pf

Vdc_2,ref

Vdc_2

δ2,alv

Fault DetectionΔVdc_2

CS4

Vg_2

m2Vg_2,ref

Vdc_2

Fig. 2.5 The proposed control system for VSC2.

2.3.1 Steady State Control System

As it was previously mentioned, the role of VSC1 is to drive the electrical frequency at the point

K, ωel, to oscillate near its optimum value. This is achieved by regulating the real power that is

absorbed by VSC1, through the phase angle of the sinusoidal PWM reference signal, δ1. So, the

electrical frequency at the point K ωel, is compared to its current reference value, ωref. Τhe error

CHAPTER 2

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(ωel-ωref) and its derivative, d(ωel-ωref)/dt, are driven in Control System 1 (CS1), which derives the

signal Δδ1. By accumulating the successive values of Δδ1, the value of δ1 comes up according to

(2.3):

(2.3)

Input (ωel-ωref) uses five fuzzy sets: Big Negative (BN), Small Negative (SN), OK, Small

positive (SP), Big Positive (BP). Input d(ωel-ωref)/dt uses four fuzzy sets: BN, SN, SP, BP. Nine

fuzzy sets correspond to the output Δδ1: Very Big Negative (VBN), BN, Medium Negative

(MN), SN, OK, SP, Medium Positive (MP), BP, Very Big Positive (VBP). Gaussian Membership

Functions are used for all Fuzzy Sets.

The rules of the Fuzzy Controller in CS1 are the following:

If (ωel- ωref) is BP,

then Δδ1 becomes VBP.

If (ωel- ωref) is SP and d(ωel- ωref)/dt is BP,

then Δδ1 becomes BP.

If (ωel- ωref) is SP and d(ωel- ωref)/dt is SP,

then Δδ1 becomes MP.

If (ωel- ωref) is SP and d(ωel- ωref)/dt is SN,

then Δδ1 becomes OK.

If (ωel- ωref) is SP and d(ωel- ωref)/dt is BN,


If (ωel- ωref) is ΟΚ and d(ωel- ωref)/dt is BP,

then Δδ1 becomes SP.

If (ωel- ωref) is ΟΚ and d(ωel- ωref)/dt is SP,


If (ωel- ωref) is ΟΚ and d(ωel- ωref)/dt is SN,


If (ωel- ωref) is ΟΚ and d(ωel- ωref)/dt is BN,

then Δδ1 becomes SN.

If (ωel- ωref) is SN and d(ωel- ωref)/dt is BP,

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If (ωel- ωref) is SN and d(ωel- ωref)/dt is SP,


If (ωel- ωref) is SN and d(ωel- ωref)/dt is SN,

then Δδ1 becomes MN.

If (ωel- ωref) is SN and d(ωel- ωref)/dt is BN,

then Δδ1 becomes BN.

If (ωel- ωref) is BN,

then Δδ1 becomes VBN.

The current optimum value of the electrical speed, ωref, is computed on-line through a Maximum

Power Point Tracking (MPPT) technique. The realization of this technique is achieved by

changing the reference value of the frequency at the point K by Δωref and monitoring the

corresponding change of the WF real power output, ΔP1. If an increment of ωref causes an

increment to the WF real power P1, the search is continued to the same direction. Otherwise, the

direction of the search is reversed. Finally, this searching method drives ωref to oscillate near the

optimum value for the current wind speed. The inputs of the control system which tracks the

optimum value of ωref, CSref, are the previous variation of ωref, Δωrefp and the variation of the real

power which was caused by the Δωref,p ΔP. Its output is the current variation of ωref, Δωref.

Input Δωrefp uses three fuzzy sets: Negative (N), OK, Positive (P). Input ΔP uses five fuzzy sets:

Big Negative (BN),Small Negative (SN), OK, Small Positive (SP), Big Positive (BP). Seven

fuzzy sets are used for the output Δωref: Very Big Negative (VBN), BN, SN, OK, SP, BP, Very

Big Positive (VBP). Gaussian Membership Functions are used for all Fuzzy Sets.

The rules of the Fuzzy Controller in CSref are the following:

If ΔΡ is BN and Δωrefp is N,

then Δωref becomes BP.

If ΔΡ is BN and Δωrefp is OK ,

then Δωref becomes VBN.

If ΔΡ is BN and Δωrefp is P,

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then Δωref becomes BN.

If ΔΡ is SN and Δωrefp is N,

then Δωref becomes SP.

If ΔΡ is SN and Δωrefp is OK,


If ΔΡ is SN and Δωrefp is P,

then Δωref becomes SN.

If ΔΡ is OK,

then Δωref becomes OK.

If ΔΡ is SP and Δωrefp is N,

then Δωref becomes SN.

If ΔΡ is SP and Δωrefp is OK,


If ΔΡ is SP and Δωrefp is P,

then Δωref becomes SP.

If ΔΡ is BP and Δωrefp is N,


If ΔΡ είναι BP and Δωrefπ is OK,

then Δωref becomes VBP.

If ΔΡ is BP and Δωrefp is P,


The active power at the sending end of the dc link must be equal to the active power at the

receiving end of the link plus the losses. As it was described in 2.2, VSC2 achieves this power

balance by keeping constant the dc voltage at the point F, Vdc_2 (Fig. 2.1), through CS3. The

inputs of CS3 are the deviation of the Vdc_2 from its reference value, (Vdc_2-Vdc_2,ref) and

its derivative. Its output is the variation of the phase angle of the sinusoidal PWM reference

signal, Δδ2. By accumulating the successive values of Δδ2, the value of δ2 comes up.

Input (Vdc_2-Vdc_2,ref) uses five fuzzy sets: Big Negative (BN), Small Negative (SN), OK, Small

positive (SP), Big Positive (BP). Input d(Vdc_2-Vdc_2,ref) /dt uses four fuzzy sets: BN, SN, SP, BP.

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Nine fuzzy sets correspond to the output Δδ2: Very Big Negative (VBN), BN, Medium Negative



The rules of the Fuzzy Controller in CS2 are the following:

If (Vdc_2-Vdc_2,ref) is BP,

then Δδ2 becomes VBP.

If (Vdc_2-Vdc_2,ref)is SP and d(Vdc_2-Vdc_2,ref)/dt is BP,

then Δδ2 becomes BP.

If (Vdc_2-Vdc_2,ref)is SP and d(Vdc_2-Vdc_2,ref)/dt is SP,

then Δδ2 becomes MP.

If (Vdc_2-Vdc_2,ref) is SP and d(Vdc_2-Vdc_2,ref)/dt is SN,


If (Vdc_2-Vdc_2,ref) is SP and d(Vdc_2-Vdc_2,ref)/dt is BN,


If (Vdc_2-Vdc_2,ref) is ΟΚ and d(Vdc_2-Vdc_2,ref)dt is BP,

then Δδ2 becomes SP.

If (Vdc_2-Vdc_2,ref) is ΟΚ and d(Vdc_2-Vdc_2,ref)/dt is SP,


If (Vdc_2-Vdc_2,ref) is ΟΚ and d(Vdc_2-Vdc_2,ref)/dt is SN,


If (Vdc_2-Vdc_2,ref) is ΟΚ and d(Vdc_2-Vdc_2,ref)/dt BN,

then Δδ2 becomes SN.

If (Vdc_2-Vdc_2,ref) is SN and d(Vdc_2-Vdc_2,ref)/dt is BP,


If (Vdc_2-Vdc_2,ref) is SN and d(Vdc_2-Vdc_2,ref)/dt is SP,


If (Vdc_2-Vdc_2,ref) is SN and d(Vdc_2-Vdc_2,ref)/dt is SN,

then Δδ2 becomes MN.

If (Vdc_2-Vdc_2,ref)is SN and d(Vdc_2-Vdc_2,ref)/dt is BN,

then Δδ2 becomes BN.

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If (Vdc_2-Vdc_2,ref)is BN,

then Δδ2 becomes VBN.

Both VSCs regulate the ac voltage at their sides. The amplitude of the ac voltage is compared to

its reference value and the error and its derivative are passed to a CS( CS2 and CS4 as shown in

Figs 2.4 and 2.5 respectively), whose output is the modulation index of the PWM reference

signal and consequently, the magnitude of the ac voltage generated by the VSCs.

CS2 and CS4 have the same structure, so they will be presented in parallel above, assuming that i

is equal to 1 for VSC1 and equal to 2 for VSC2.

Input (Vg_i-Vg_i,ref) uses five fuzzy sets: Big Negative (BN), Small Negative (SN), OK, Small

positive (SP), Big Positive (BP). Input d(Vg_i-Vg_i,ref) /dt uses four fuzzy sets: BN, SN, SP, BP.

Nine fuzzy sets correspond to the output Δmi: Very Big Negative (VBN), BN, Medium Negative



The rules of the Fuzzy Controller in CS2 and CS4 are the following:

If (Vg_i-Vg_i,ref) is BP,

then Δmi becomes VBN.

If (Vg_i-Vg_i,ref) is SP and d(Vg_i-Vg_i,ref) /dt is BP,

then Δmi becomes BN.

If (Vg_i-Vg_i,ref) is SP and d(Vg_i-Vg_i,ref) /dt is SP,

then Δmi becomes MN.

If (Vg_i-Vg_i,ref) is SP and d(Vg_i-Vg_i,ref) /dt is SN,

then Δmi becomes OK.

If (Vg_i-Vg_i,ref) is SP and d(Vg_i-Vg_i,ref)/dt is BN,


If (Vg_i-Vg_i,ref) is ΟΚ and d(Vg_i-Vg_i,ref) /dt is BP,

then Δmi becomes SN.

If (Vg_i-Vg_i,ref) is ΟΚ and d(Vg_i-Vg_i,ref) /dt is SP,

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If (Vg_i-Vg_i,ref) is ΟΚ and d(Vg_i-Vg_i,ref) /dt is SN,


If (Vg_i-Vg_i,ref) is ΟΚ and d(Vg_i-Vg_i,ref) /dt BN,

then Δmi becomes SP.

If (Vg_i-Vg_i,ref) is SN and d(Vg_i-Vg_i,ref) /dt is BP,


If (Vg_i-Vg_i,ref) is SN and d(Vg_i-Vg_i,ref) /dt is SP,


If (Vg_i-Vg_i,ref) is SN and d(Vg_i-Vg_i,ref) /dt is SN,

then Δmi becomes MP.

If (Vg_i-Vg_i,ref) is SN and d(Vg_i-Vg_i,ref) /dt is BN,

then Δmi becomes BP.

If (Vg_i-Vg_i,ref) is BN,

then Δmi becomes VBP.

2.3.2 Fault Detection and Confrontation System.

The FDCS in each converter station, Figs 2.4-2.5, is designed in order to detect and confront all

the types of short circuit faults at the ac grid. It estimates the severity of each fault and takes the

appropriate action, according to the “fault severity level”. The FDCSs of the two VSCs have the

same structure, so they will be presented in parallel in this paragraph, assuming that the index i is

equal to 1 for VSC1 and equal to 2 for VSC2. Their action stages are described below.

1) Fault detection: When an ac fault occurs, Vdc_i suddenly increases considerably, as the power

which cannot flow to the ac grid is stored to the dc capacitors of the link. The Fault Detection

system detects the fault by monitoring this deviation of Vdc_i from its steady state value. As a

result, the SSCSi is blocked and the FDCSi is activated.

2) Fault severity estimation and computation of the blocking period duration: When the FDCSi

is activated, it blocks the firing of VSCi for a short time interval, in order to avoid the

overcurrents at the valves. This technique is already used in real projects, using a standard

CHAPTER 2

-24-

blocking period equal for all types of faults. The proposed control system applies a variable

blocking period, according to the severity of the fault. In some cases, the duration of the blocking

period can be crucial to the behavior of the system just after the deblocking of the VSCs. A very

big blocking period can cause an additional fluctuation to the system, whereas a very short

blocking period may not achieve a satisfactory overcurrent reduction. The optimum duration of

the blocking period, tblki, is a function of the severity of the fault, as severe faults cause higher

overcurrents, so they demand bigger blocking periods.

tblki is derived from a Fuzzy Controller in CSblk,i (Figs. 2.4-2.5). Its inputs are the deviations of

the dc voltage and the dc current from their previous values, ΔVdc_i and ΔΙdc_i respectively. Its

output is the duration of the blocking period, tblki. As it was mentioned in the previous

paragraph, when the fault occurs, Vdc_i suddenly increases. The bigger the deviation of Vdc_i from

its pre-fault value, the more severe the fault is, so the bigger tblki should be. In addition, if the

increase of Vdc_i is accompanied by an increase of the dc current, Idc_i, the fault is even more

severe, so tblki should become even bigger. On the contrary, if Idc is decreased, tblki does not

need to be further increased. The rules which are used by the FC of CSblk,i to compute the

optimum tblki are given below. Three subsets are used for input ΔVdc_i: Small Positive (SP),

Medium Positive (MP), and Big Positive (BP). The input ΔIdc requires two inputs: Positive (P)

and Negative (N). The fuzzy sets for the output are Very Small (VS), Small (S), Big (B) and Very

Big (VB). All the controllers are designed using Gaussian MFs.

When ΔVdc_i is SP and ΔIdc_i is N, then tblk,i is VS

When ΔVdc_i is SP and ΔIdc_i is P, then tblk,i is S

When ΔVdc_i is MP and ΔIdc_i is N, then tblk,i is S

When ΔVdc_i is MP and ΔIdc_i is P, then tblk,i is B

When ΔVdc_i is BP and ΔIdc_i is N, then tblk,i is B

When ΔVdc_i is BP and ΔIdc_i is P, then tblk,i is VB

3) Mitigation of the fault consequences: After the deblocking of the VSCi valves, the “mitigation

period” starts. The electrical system has not yet reached its steady state, so the values of ωel and

Vdc_2 deviate substantially from their reference values. These deviations would mislead SSCS i,

which would produce very big values of the signal “Δδi”, leading to a substantial increase of the

CHAPTER 2

-25-

signal “δi”. In fact, the signal “δi” should not change significantly, as the power that is produced

by the WF is equal to its pre-fault value. Its values should be near its pre-fault value just before

the occurrence of the fault. Furthermore, during the “mitigation period”, the role of the signal “δi”

should not be to achieve maximum power acquisition from the wind, but to eliminate the

fluctuations in the electrical system. In order to achieve this, the value of “δi” during the

“mitigation period” stops being produced by SSCSi and is directly derived from a CS of FDCSi,

CSalv,i, (Figs. 2.4-2.5). CSalv,i produces directly the values of “δi”, unlike CSs of SSCSi, which

produce the values of “δi”, by adding the successive values of “Δδi”. This controller follows the

main principles of the controllers of the SSCSi, but it is designed to produce a “δi” order which is

near its pre-fault value and which contributes to the mitigation of the fault disturbances and to the

stability of the control system. This value of alleviating “δi” will be mentioned below as “δi,alv”.

CSalv,i consists of two main controllers (Fig. 2.6): FCalv,i, which produces the values of “δi,alv”

and FCreg,i, which regulates on-line the parameters of FCalv,i output MFs during the blocking

period, in order to optimize its performance.

Fig. 2.6 Structure of CSalv,i.

In FCalv,1, input1,1 is (ωel-ωref) and input2,1 is d(ωel-ωref)/dt. “δ1,pf” is the pre-fault value of “δ1” just

before the occurrence of the fault. It is used as a parameter for the design of FCalv,1 MFs.

Respectively, in FCalv,2, input1,2 is (Vdc_2-Vdc_2,ref), input2,2 is d(Vdc_2-Vdc_2,ref)/dt and “δ2,pf” is the

pre-fault value of “δ2” which is used for the design of FCalv,2 MFs. ωel, ωref and Vdc_2, Vdc_2,ref

were chosen in order to achieve the power balance at the system, whereas “δi,pf” was chosen in

order to produce signals “δi,alv” near the post-fault value of “δi”. The output of FCalv,i is “δi,alv”.

In both converter stations, five fuzzy subsets are needed for the input1,i: Negative Big (NB),

Negative Small (NS), OK, Positive Small (PS), and Positive Big (PB). For input2,i the fuzzy sets

needed are Negative (N) and Positive (P). The fuzzy sets required for the output “δi,alv” are: Extra

Small (ES), Very Small (VS), Small (S), OK, Big (B), Very Big (VB), Extra Big (EB). The fuzzy

subsets of FCalv,i inputs and output are represented using Gaussian MFs.

CHAPTER 2

-26-

The initial MFs for “δi,alv” are shown in Fig. 2.7. The term initial is used because these MFs are

regulated on-line during the “blocking period”, by FCreg,i. These MFs are the initial MFs before

their regulation. Of course, the general form of the final MFs will remain the same. “δ i,pf” is set in

the middle of the range of fuzzy set “δi,alv”, in order to produce values of “δi,alv” near the post-

fault value “δi,pf”.

Fig. 2.7 Membership functions for the fuzzy set “δi,alv”.

The rules of FCalv,i are shown below:

If input1,i is NB, then δi,alv becomes ES

If input1,i is NS and input2,i is N, then δi,alv becomes VS.

If input1,i is NS and input2,i is P, then δi,alv becomes S.

If input1,i is OK, then δi,alv becomes OK.

If input1,i is PS and input2,i is N, then δi,alv becomes B.

If input1,i is PS and input2,i is P, then δi,alv becomes VB.

If input1,i is PB, then δi,alv becomes EB.

As it was mentioned above, FCreg,i optimizes on-line, during the blocking period, the output MFs

of FCalv,i, through the signal ofi.

The function of the Gaussian FCalv,i output MFs depends on two parameters, the center c and the

dispersion σ2, as given by (2.4):

2

( )

2( )

x c

f x e

(2.4)

The way ofi modulates the parameters of FCalv,i Gaussian output MFs is shown in (2.5)-(2.7). The

parameter c is given by (2.5) for the MF OK and by (2.6), as a function of ofi, for the rest of the

CHAPTER 2

-27-

MFs: The parameter σ, as a function of ofi, for all the MFs is given by (2.7)

, ,δnew

i ok i pfc (2.5)

, , , ,

1( )

new old

i j i j i j i j

i

c b c pof

(2.6)

, , , ,

1σ σ ( )new old

i j i j i j i j

i

a dof

(2.7)

where

j the MF index

,

new

i okc the new value of the center of the Gaussian MF OK

,

new

i jc the new value of the center of the rest of the Gaussian MFs

,

old

i jc the old value of the center of the rest of the Gaussian MFs

,σ new

i j the new value of the typical deviation of the Gaussian MFs

,σ old

i j the old value of the typical deviation of the Gaussian MFs

, , , ,, , ,i j i j i j i ja b p d constants.

The inputs of FCreg,i are the deviation of Pi from its pre-fault value, ΔPi, and its derivative,

d(Pi)/dt, at the end of the “blocking period”. Its output is the regulating factor ofi. Four subsets are

used for the input ΔPi: Big Negative (BN), Negative (N), Positive (P), Big Positive (BP). Two

subsets are used for the input d(Pi)/dt: Negative (N) and Positive (P). The fuzzy sets for the

output are Very Big (VB), Big (B), Small (S), and Very Small (VS). Gaussian MFs are used for

both inputs and outputs.

The rules of FCreg,i are based on the idea that the more fluctuating the electrical system is, the less

“strict” the control system should be, in order to eliminate the fluctuations as soon as possible.

These rules are shown below:

If ΔPi is BN and dPi/dt is N, then ofi becomes VB.

If ΔPi is BN and dPi/dt is P, then ofi becomes B.

If ΔPi is N and dPi/dt is N, then ofi becomes S.

If ΔPi is N and dPi/dt is P, then ofi becomes VS.

CHAPTER 2

-28-

If ΔPi is P and dPi/dt is N, then ofi becomes VS.

If ΔPi is P and dPi/dt is P, then ofi becomes S.

If ΔPi is BP and dPi/dt is N, then ofi becomes B.

If ΔPi is BP and dPi/dt is P, then ofi becomes VB.

4) End of the mitigation period detection: When Vdc_i reaches its reference value, the mitigation

period ends. The system has reached a steady state, so the values of δi are derived by the main

control system, as they did before the occurrence of the fault.

2.4 Description of the system studied.

The system under study is shown in Fig. 2.8. It consists of a 90 MW offshore Wind Farm of

induction generators, which feeds an ac network through an HVDC link based on VSCs.

K

F

Vdc_2 Vdc_1

dc cable

P2

Vg_2 Vc_2 Vg_1

VSC2

Idc

Converter Station

2

Wind Farm

P1

Vc_1

VSC1

PCC

Load_3

Line_1Li

ne_5

B

A

C

D

ac grid 2

Line _3

Line_4

Line_2

Converter Station

1

ac grid 1

Load_2

Load_1

Fig. 2.8 Configuration of the Power System studied.

CHAPTER 2

-29-

The technical data of the simulation system are given below:

Wind Farm:

50 squirrel-cage induction generators, designed following the international standard DIN EN

60034-1.

Rated output: 1800 kW

Rated wind speed: 12 m/s

Rated current: 1770 A

Rated voltage: 690 V

Max current: 1.5 times the rated current for 2 min (2655 A).

ac capacitors of total reactive power equal to 3.627MVar are placed at the side of the WF in order

to supply a constant amount of reactive power that is necessary for the operation of the inductive

generators.

ac Νetwork:

rated voltage: 150 kV

The grids ac grid 1 and ac grid 2 are equivalent ac grids, with Short Circuit Capacity (SCC)

350 MVA and 300 MVA respectively.

Line Characteristics:

Line_1 Line_2 Line_3 Line_4 Line_5

Length (km) 50 70 40 60 80

R (Ω/phase) 9.155 12.817 7.324 10.986 14.648

X (Ω/phase) 22.305 31.196 17.812 26.735 35.657

Y (mho/phase) 1.292·10-4

1.809·10-4

1.034·10-4

1.550·10-4

2.067·10-4

CHAPTER 2

-30-

Load Characteristics:

P (MW) Q (MVar)

Load_1 39 6

Load_2 24 6

Load_3 18 6

HVDC link based on VSCs:

length of the dc cable: 100 km

Rated voltage: 120 kV dc

Maximum voltage: 132 kV dc

IGBTs: rated current 1.2 kA.

dc capacitors: 500 μF at each converter.

Each machine of the WF is represented separately in the simulation, in order to take into account

the interaction between the generators of the WF. The simulation program used is PSCAD/

EMTDC in cooperation with MATLAB and C++ programming.

CHAPTER 2

-31-

2.5 Simulation Results

In this paragraph is studied the response of the power system under fault conditions. The system

is simulated with a wind velocity with mean value near 12m/s, Fig. 2.9:

Fig. 2.9 Wind speed.

It is important to notice that the fault cases are studied when the power system operates at full

load. The WF produces its nominal power, so the currents at the power system reach their

nominal values. Therefore, it is very important not to allow to these electrical quantities to

deviate substantially from their steady-state values after the fault, as this would jeopardize the

electrical equipment. This is the reason why the electrical system studied needs a special control

system, able to cope with every different fault case, regardless of the type or the location of the

fault, as the one proposed in this paper. In such demanding cases, the proposed control system is

essential to avoid the tripping of the WTs and the destruction of the electrical equipment. In order

to prove this, the response of the system using a control system which blocks the converters for a

standard predefined period, the same for all types of faults and takes no further action for the

mitigation of fault fluctuations is also studied.

The study is divided into two main sections: in section 2.5.1 is studied the response of the system

with the control system proposed in this paper, whereas in section 2.5.2 is studied the response

of the system with a control system which uses a standard predefined blocking time of the

converter valves and a constant value of the phase shift “δi” during the post-fault period. In both

sections is studied the response of the system under two different types of short circuit faults: a 3-

phase fault and a 1-phase fault, at the end of Line_4, near the PCC, Fig. 2.8.

At t=0.5s the fault occurs. In 120 ms the protection system manages to isolate Line_4, which is

re-connected to the ac system after 300 ms, considering a temporary fault.

CHAPTER 2

-32-

2.5.1 Response of the system using the proposed control technique

The response of the power system using the proposed control technique is studied under a 3-

phase fault and under a 1-phase fault. The FDCS detects the optimum blocking period for each

type of fault, assigning in the case of the 3-phase fault at the end of Line_4 a 15ms blocking

period, whereas in the case of the 1-phase fault a 0 ms blocking period.

The response of the power system under the 3-phase fault is shown in Fig. 2.10. This fault case is

very severe, as the 3-phase fault is almost solid and it is located very close to the PCC. In Fig.

2.10(a) we can observe that the ac voltage at the bus A manages to recover completely in 0.5

seconds after the fault, so the requirements of the national grid codes concerning the support of

the ac voltage at the PCC are met and the WTs have not to be tripped. Figs 2.10(b)-2.10(f) show

that the WTs are not stressed seriously, so they can remain connected during and after the fault,

contributing to the transient stability of the system. The current at each WT, Fig. 2.10(b) reaches

at 2.078A instantly, but stays quite below the limit of 2.655A for two minutes which is given by

the manufacturer. The electrical frequency at the WF side, ωel, Fig. 2.10(c) is also slightly

impacted, showing that the WF is not stressed by the fault. Actually the rising time of ωel is equal

to the duration of the blocking period, as it is shown in Fig. 2.10(d), which is a zoom of the Fig.

2.10(c) at the fault period. The WF ac voltage remains actually unchanged, 2.10(e). The real

power produced by the WF, P1, makes a small dip of almost 1 MW and recovers in less than 0.4s,

2.10(f). Figs 2.10(g)-(i) show the dc voltages at the two sides of the cable and the dc current of

the link. Their maximum values are 124 kV and 1 kA respectively, so the technical limits of 132

kV and 1.2 kA are not reached and the dc equipment is not jeopardized.

The response of the power system for the case of the 1-phase fault is shown in Fig. 2.11. The

proposed control system, detecting the low severity of the case and estimating that the system

integrity is not in danger, gives an order of 0 ms blocking period (i.e. no blocking), in order to

avoid the extra fluctuations that would be caused by the blocking of the valves. Fig. 2.11 shows

that in this case too, the response of the system is quite satisfactory, as the maximum allowed

stress on the electrical components is not reached, the grid codes are met and the system recovers

very quickly with almost no fluctuations.

CHAPTER 2

-33-

(a) ac voltage at the bus A, Vg_2.

(b) ac current produced by a generator of the WF, Iac_1.

(c) electrical frequency at the WF side, ωel.

(d) electrical frequency at the WF side, ωel (focused on the fault period).

(e) ac voltage at a generator of the WF, Vgen.

Fig. 2.10 Response of the system under the 3-phase fault with the proposed control technique.

CHAPTER 2

-34-

(f) real power produced by the WF, P1, and received by the ac network, P2.

(g) dc voltage at the WF side of the dc link, Vdc_1.

(h) dc voltage at the ac grid side of the dc link, Vdc_2 (i).

(i) dc current at the cable of the dc link, Idc.

Fig. 2.10 (continued) Response of the system under the 3-phase fault

with the proposed control technique.

CHAPTER 2

-35-


(b) ac current produced by a generator of the WF, Iac1.



(e) ac voltage at an induction generator of the WF, Vgen.

Fig. 2.11 Response of the system under the 1-phase fault with the proposed control technique.

CHAPTER 2

-36-



(h) dc voltage at the ac grid side of the dc link, Vdc_2.



with the proposed control technique.

CHAPTER 2

-37-

2.5.2 Response of the system using a conventional control technique

In the previous section, the control system detects the optimum blocking period for each type of

fault and assigns in the case of the 3-phase fault a 15ms blocking period, whereas in the case of

the 1-phase fault a 0 ms blocking period. In order to prove that the proposed control system is

essential to avoid the destruction of the electrical equipment, in this section is studied the

response of the system with a conventional control system, which blocks the converters for a

standard predefined period, the same for all types of faults and takes no further action for the

mitigation of fault fluctuations. The predefined blocking period is chosen to be equal to the mean

value of the optimal blocking periods, which correspond to the three phase fault and the single

phase fault, i.e. 7ms, in an attempt to confront all fault types. Furthermore, this control system

does not take any special “alleviating measures” to help the system recover more quickly. It

simply produces, during the post fault period, a value of “δi” equal to its pre-fault value just

before the occurrence of the fault.

The response of the system for the case of the 3-phase fault is shown in Fig. 2.12. By

implementing this control system, the performance of the electrical system is not acceptable, as

the integrity of the electrical equipment is jeopardized. The blocking period is not big enough to

eliminate successfully the dc overvoltages and the dc overcurrents just after the occurrence of the

fault. The dc voltages reach a peak value of 138 kV with a maximum technical limit of 132 kV,

causing damages to the dc cable. The dc current also takes a big value, reaching almost the

technical limit of 1.2 kA. Furthermore, the overall response of the system is more fluctuating, as

no special actions are taken in order to alleviate the disturbances at the electrical system.

The response of the system for the case of the 1-phase fault is shown in Fig. 2.13. In this case, the

blocking period is bigger than the required one, resulting in a more fluctuating response in

comparison with the case of 0ms blocking. It is evident that any other fault case would require a

different handling, depending on the type and the location of the fault.

CHAPTER 2

-38-






Fig. 2.12 Response of the system under the 3-phase fault with a conventional control technique.

CHAPTER 2

-39-





Fig. 2.12(continued) Response of the system under the 3-phase fault

with a conventional control technique.

CHAPTER 2

-40-






Fig. 2.13 Response of the system under the 1-phase fault with a conventional control technique.

CHAPTER 2

-41-






with a conventional control technique.

CHAPTER 2

-42-

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CHAPTER 2

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[2.37] B.D. Railing, G. Moreau, J. Wasborg, D. Stanley, “The Directlink VSC-based HVdc

project and its commissioning”, in Proc Session 2002 Cigre, 14-108.

[2.38] Ξανθή Κουτίβα, "Έλεγχος Διασύνδεσης ΕΡ/ΣΡ/ΕΡ με Μεταροπείς Πήγής Τάσης, με

Σκοπό τη βελτιωμένη Απόκριση Αιολικού Πάρκου που Τροφοδοτεί Ασθενές Σύστημα

Ηλεκτρικής Ενέργειας", Διδακτορική Διατριβή, Πανεπιστήμιο Πατρών, Τμήμα

Ηλεκτρολόγων Μηχανικών και Τεχνολογίας Υπολογιστών, Σεπτέβριος 2009.

[2.39] ΙΕΕΕ, Transactions on Power Delivery, “Optimal Integration of an offshore Wind Farm to

a weak ac Grid”, X. Koutiva, T. Vrionis, N.A. Vovos, G.B.Giannakopoulos, Vol 21, No

2, April 2006.

CHAPTER 3

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CHAPTER 3:

A GENETIC ALGORITHM-BASED LOW VOLTAGE RIDE-

THROUGH CONTROL STRATEGY FOR GRID CONNECTED

DOUBLY FED INDUCTION WIND GENERATORS

3.1 Introduction

Over the last few years, doubly fed induction generators (DFIGs) have dominated the largest

world market share of wind turbines (WTs), as an alternative concept to conventional variable

speed generators [3.1]. The schematic diagram of a grid connected DFIG WT is shown in Fig.

3.1.

Fig. 3.1 Configuration of the DFIG WT.

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The WT is connected to the DFIG through a mechanical shaft system, which consists of a low

speed turbine shaft connected to the high speed generator shaft via a gearbox. The DFIG consists

of a wound rotor induction generator with its stator windings directly connected to the grid and

its rotor windings connected to the grid via an arrangement of two ac/dc back-to-back converters,

as depicted in Fig.3.1. The Rotor Side Converter (RSC) and the Grid Side Converter (GSC) are

pulse width modulated (PWM), voltage-source converters (VSCs) [3.2]. As the converters are

sized for only the one third of the rated power of the turbine, this topology accomplishes a cost-

effective, decoupled control of the active and reactive power [3.3-3.4].

However, DFIGs present a major drawback concerning their operation during grid faults. The

voltage drop at the stator windings, due to grid faults, results in a sudden change in the stator flux

of the DFIG, which finally leads to an overcurrent to the rotor windings, due to the magnetic

coupling. This overcurrent may cause severe damage to the semiconductors of the rotor side

converter and large fluctuations of the dc-link voltage [3.5-3.6].

When DFIGs started being used in WTs, the penetration of WTs to the power system was

relatively low, so their control concerning faults focused on the protection of the DFIGs

themselves and no special actions were taken in order to provide the DFIGs with the capability of

contributing to network support. Under this concept, in order to protect the generator, its rotor

windings were protected with a crowbar circuit [3.7-3.9]. This device consists of a bank of

resistors, which is connected to the rotor windings through power electronic devices. When a

fault is detected, the rotor windings are connected to the crowbar resistors, whereas the rotor-side

converter is temporary disabled. Thus, the short-circuit current flows through the crowbar instead

of the rotor-side converter. With this solution, the machine is effectively protected, but due to the

fact that the blocking of the rotor-side converter leads to the partial loss of power control during

the crowbar action, large transients are generated after the fault, which may lead to the

disconnection of the machines from the grid. In addition, during the activation of the crowbar, the

DFIG is converted to a conventional squirrel-cage induction generator, absorbing a large amount

of reactive power from the grid [3.18, 3.19].

Nowadays, due to the fact that WTs represent a significant part of the total generation in

electrical systems, system operators worldwide have revised their grid codes (GCs), making the

requirements concerning the fault ride-through (FRT) capability of WTs more stringent. The

CHAPTER 3

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majority of the GCs require that the WTs should provide low voltage ride-through (LVRT)

capability for grid faults resulting in a 85% voltage drop or even more. This means that they

should stay connected to the grid during and after grid faults, contributing to the system stability.

Moreover, they should supply reactive power to the grid in order to support the voltage recovery

[3.10-3.13]. This requirement cannot be fulfilled by DFIGs protected with a conventional

crowbar circuit, as they cannot generate reactive power during the activation of the crowbar. For

this reason, researchers started addressing the issue of the FRT of the DFIGs from several other

points of view. For instance, [3.14] proposes an improved version of the crowbar circuit,

eliminating the duration of the crowbar action. [3.15] investigates the application of a

STATCOM to achieve the uninterrupted operation of a wind turbine equipped with a DFIG

during grid faults. In [3.16] a control strategy using a series grid-side converter is proposed.

Although these last two arrangements are promising in some cases, the complexity and the

additional cost impair their applicability.

Other papers propose some methods for FRT without any auxiliary external devices [3.17]-

[3.27]. They show that if the DFIG controllers are suitably designed, it is possible to limit the

rotor overcurrent. Xiang et al. in [3.17] propose a control strategy that orients the rotor current to

counteract the dc and negative sequence components of stator flux linkage. Experimental results

show that under certain circumstances the rotor current is limited; therefore the use of the

crowbar can be avoided. However, this method has high dependence on the estimation of stator

flux linkage and the exact knowledge of the parameters of the DFIG. In [3.18] is proposed a flux

linkage tracking-based control strategy, to suppress the fault rotor current. Its control objective is

to keep the rotor flux linkage close to the stator flux linkage instead of maintaining a certain

value accurately. In this way, there is no need to decouple the dc and negative sequence

components, which means the control scheme does not depend on the exact knowledge of the

system parameters. Although the proposed control method is promising, the paper could have

studied a bigger voltage dip for the case of the three-phase fault, as it is imposed by international

grid codes. In [3.19] Hu et al. propose the use of a virtual resistance in combination with

demagnetization control to limit the rotor side overcurrents. This method manages to enlarge the

control range in relation to the control method proposed in [3.17], but the drawbacks that were

met in [3.17] still cannot be avoided. The study described in [3.20] suggests that a properly

designed Fuzzy Controller (FC) presents a better performance in presence of variations of

CHAPTER 3

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parameters and external disturbances than a traditional Proportional Integral (PI) controller.

Comparative results between the two controllers showed that the FC manages to limit the

generator currents during the fault, avoiding the use of the crowbars. However, it would be

interesting to see which would be the response of this control system and what changes should

possibly be done, for the case where the DFIG would be connected to a weaker bus, instead of an

infinite bus. [3.21] proposes a control strategy based on Genetic Algorithms (GAs) for the

acquisition of the optimal gains of the PI controllers to the rotor-side converter of the DFIG. The

GA fitness function is defined with the objective to reduce the over-current in the rotor circuit, in

order to maintain the converter in operation during the fault period. Simulation results show that,

in some cases, if the GA gain adjustment is used, the use of the crowbar protection-scheme can

be avoided. However, in this work no analytical information is given about the electrical grid

connected to the DFIG. In addition, it is tested for a small voltage dip in relation to the voltage

dip described in most grid codes. Papers [3.22 -3.27] propose some methods for FRT without any

auxiliary external hardware for the case of asymmetrical grid faults.

Based on the experience gained from the studies published so far, this work tries to extend the

concept of the protection of the DFIG without the use of additional hardware, in more demanding

situations, such as the connection of a relatively weak electrical system with the DFIG in the case

of a fault resulting in a bigger voltage dip, as it is required from the GCs. The proposed control

scheme contributes to the optimal coordination of the two converters, aiming to attenuate the

disturbances to the system caused by the fault and ensure system stability. In order to encounter

the difficulties met due to the uncertainties of the system modeling and considering the non

linearity of the system, the controllers were designed based on Fuzzy Logic (FL) and Genetic

Algorithms (GAs), which are more efficient in such cases. By this concept the overcurrents at the

rotor windings and the dc side overvoltages are effectively eliminated. In addition, the FRT

requirement concerning the reactive power supply is fulfilled.

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3.2 Modeling of the DFIG

A synchronously rotating d-q reference frame has been selected to model the dynamic behavior

of the DFIG. Considering the generator convention, the stator and rotor voltages are given by the

following equations:

ds

ds s ds s qs

dv R i

dt

(3.1)

qs

qs s qs s ds

dv R i

dt

(3.2)

( ) drdr r dr s r qr

dv R i

dt

(3.3)

( )qr

qr r qr s r dr

dv R i

dt

(3.4)

where λs and λr are the stator and rotor flux linkages; vs and is are the stator voltages and currents;

vr and ir are the rotor voltages and currents; Rs and Rr are the stator and rotor resistances; ωs and

ωr are the stator and rotor angular frequencies, respectively. The indices d and q indicate the

direct and quadrature axis components of the reference frame.

The flux linkage in (3.5)-(3.8) is defined as:

ds s ds m drλ = -L i +L i (3.5)

qs s qs m qrλ = -L i +L i (3.6)

dr r dr m dsλ = L i +L i (3.7)

qr r qr m qsλ = L i +L i (3.8)

where Ls, Lr and Lm are the stator, rotor and magnetizing inductances respectively.

In the following paragraph is sited a brief description of a conventional control system, where no

special provisions are taken for the FRT of the DFIG. This system would normally be combined

with an auxiliary hardware such as a crowbar or a STATCOM, presenting the drawbacks

mentioned in the introduction. The reason why it is presented here is to highlight its main

differences from the proposed control system, which is presented just afterwards.

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3.3 Description of the Conventional Control System

The conventional DFIG control system, presented in several papers [3.28-3.30], is divided to

RSC control and GSC control. Its basic principles are described in this paragraph. The control

system of RSC is shown in Fig. 3.2. Its objective is to independently regulate the stator active and

reactive power, Ps and Qs, respectively. In order to achieve decoupled control of Ps and Qs, the

rotor current ir is transformed to d–q components, idr and iqr, using a reference frame oriented to

the stator-flux. The q-axis current component iqr is used to control the stator active power Ps. The

reference value of the active power Pref is obtained using a maximum power tracking (MPPT)

technique [3.31-3.32]. The measured value of Ps is subtracted from Pref and the error is driven to

the Power Controller. The output of this controller is the reference value of the q-axis rotor

current iqr_ref. This signal is compared to the actual value of iqr and the error is passed through the

Current Controller whose output is the reference voltage for the q-axis component vqr.

The reactive power control of RSC can be tuned to keep the stator voltage vs within the desired

range, when the DFIG feeds into a weak power system without any local reactive compensation

Fig. 3.2 RSC Control system.

CHAPTER 3

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When the DFIG feeds a strong power system, the command of Qs can be simply set to zero. In

this paper, the case of the DFIG which feeds a weak ac grid is studied, therefore ac voltage

control is used instead of reactive power control. The actual voltage vs at the generator terminals

is compared to its reference value vs_ref and the error is passed through the ac Voltage Controller

to generate the reference signal for the d-axis current idr_ref. This signal is compared to the d-axis

current value idr and the error is sent to the Current Controller, which determines the reference

voltage for the d-axis component vdr. The signals vdr and vqr are transformed back to abc

quantities, which are used by the PWM module to generate the IGBT gate control signals to drive

the RSC.

The objective of the GSC control system is mainly to keep the dc-link voltage constant. In this

paper, it is designed to be reactive neutral by setting Qgc_ref=0. This setting is chosen considering

that the converter is rated for only 30% of the DFIG rating, and that it is primarily used in order

to supply active power to the grid. The control system of GSC is shown in Fig. 3.3. For the

transformation of the measured instantaneous signals to d-q quantities, a reference frame oriented

to the stator voltage is used. As shown in Fig. 3.3, the dc Voltage Vdc is controlled through the

signal idgc_ref and the reactive power Qgc is controlled through the signal iqgc_ref.

Fig. 3.3 GSC Control system.

CHAPTER 3

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3.4 Description of the Optimized Control System

In the above described control system, no provisions are taken for the FRT of the DFIG. In this

paragraph, a modification of this system is attempted, in order to ride-through the fault without

any additional hardware. The proposed control scheme, achieving an optimal coordination

between the two converters, manages to attenuate the system disturbances caused by the fault,

even in the case where the WT feeds a relatively weak ac grid. As the control system has to act

efficiently in a very short period of time, it should be insensitive to the measurement noise and to

the lack of accurate information concerning the machine parameters. In order to encounter these

difficulties and considering the non linearity of the system, the controllers were designed based

on Computational Intelligence (CI), which is more efficient in such cases. More precisely, all the

controllers used are Fuzzy Controllers (FCs) whereas the tuning of the FC which achieves the

FRT, FCFRT, is realized using GAs. The reason why a GA- based approach is used for the tuning

of FCFRT is that the derivation of its rules is quite complicated and it cannot come up from simple

fuzzy reasoning.

As shown in Fig. 3.4, the optimized control system is a modification of the RSC control system,

accomplished by adding the block "Fault detection and Confrontation System" (FDCS). This

block is active only when the ac Voltage, vs, deviates more than 10% from its reference value.

The control of the GSC remains unchanged. The concept of the control strategy is analysed

below: in order to successfully protect the DFIG, there are two major issues that should be

addressed properly: the rotor overcurrent and the dc-link overvoltage [3.19]. Neither the dc

voltage nor the rotor current should exceed their acceptable limits during the restoring period.

The amount of the extra energy that is induced to the rotor during the transient must be properly

"pumped" through the converters to the grid, in order to bring the values of the rotor current and

the dc voltage back to their normal values. The problem that rises when trying to do this is the

following: if the value of the rotor current is sharply dropped by quickly "pumping" the stored

energy in the rotor to the grid, the value of the dc voltage will rise suddenly, risking exceeding its

limits. Respectively, if the value of rotor current is slowly reduced in order to avoid the dc

overvoltage, there is a high risk that it reaches unacceptable values. Therefore, the correction

signals of the rotor current should also take into account the respective values of the dc

voltage, in order to achieve a successful FRT. As depicted in

CHAPTER 3

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Fig. 3.4 Optimized control system.

Fig. 3.4, the output vqr of the current controller is corrected by a quantity ucrf derived by a FC,

FCFRT. The inputs of FCFRT, Vdc* and ir

*, are given by the following equations:

* _

_ _

dc dc ss

dc

dc mv dc ss

V VV

V V

(9)

* _

__

r r ss

r

r r ssmv

i ii

i i

(10)

CHAPTER 3

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where the indicator ss stands for the steady state value just before the dip and the indicator mv

stands for the maximum acceptable value, imposed by the manufacturer. ir is the rotor rms current

(the maximum value of the three phases).

In order to equally participate to the modulation of ucrf, the deviations of the two quantities from

their steady state values are divided by their maximum acceptable deviations. It should also be

mentioned that only the positive deviations are taken into account to the modulation of ucrf.

Negative deviations are taken as zeros. This contributes to a smoother transition from the FDCS

to the steady state control system.

3.5 Implementation of the Optimized Control System

As it was previously mentioned, all the controllers used are Fuzzy Controllers (FCs), whereas the

tuning of the FC which is responsible for the FRT, FCFRT, is implemented through genetic

algorithms.

3.5.1 Design of the RSC Control System.

As it is shown in Fig. 3.4, the ac Voltage Controller and the Power Controller of the Rotor Side

Converter produce the signals idr_ref and iqr_ref. This is accomplished through the fuzzy FCidr και

FCiqr.

Description of the controller FCidr.

The inputs of FCidr are the inputs (vs_ref-vs) and d(vs_ref-vs)/dt.

Its output is the variation of the signal idr_ref, Δidr_ref.

The value of idr_ref comes up by adding the successive values of Δidr_ref.

Input (vs_ref-vs) uses five fuzzy subsets: Big Negative (BN), Small Negative (SN), (ΟΚ), Small

Positive (SP), Big Positive (BP). Input d(vs_ref-vs)/dt uses four fuzzy subsets: Big Negative (BN),

Small Negative (SN), Small Positive (SP), Big Positive (BP). Nine fuzzy subsets are used for the

output idr_ref: Very Big Negative (VBN), Big Negative (BN), Medium Negative (MN), Small

CHAPTER 3

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Negative (SN), OK, Small Positive (SP), Medium Positive (MP), Big Positive (BP), Very Big

Positive (VBP). Gaussian membership functions are used for all fuzzy sets

The rules of FCidr are shown below:

If (vs_ref-vs) is BP,

then idr_ref becomes VBP.

If (vs_ref-vs) is SP and d(vs_ref-vs)/dt is BP,

then idr_ref becomes BP.

If (vs_ref-vs) is SP and d(vs_ref-vs)/dt is SP,

then idr_ref becomes MP.

If (vs_ref-vs) is SP and d(vs_ref-vs)/dt is SN,

then idr_ref becomes OK.

If (vs_ref-vs) is SP and d(vs_ref-vs)/dt is BN,


If (vs_ref-vs) is ΟΚ and d(vs_ref-vs)/dt is BP,

then idr_ref becomes SP.

If (vs_ref-vs) is ΟΚ and d(vs_ref-vs)/dt is SP,


If (vs_ref-vs) is ΟΚ and d(vs_ref-vs)/dt is SN,


If (vs_ref-vs) is ΟΚ and d(vs_ref-vs)/dt is BN,

then idr_ref becomes SN.

If (vs_ref-vs) is SN and d(vs_ref-vs)/dt is BP,


If (vs_ref-vs) is SN and d(vs_ref-vs)/dt is SP,


If (vs_ref-vs) is SN and d(vs_ref-vs)/dt is SN,

then idr_ref becomes MN.

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Αν η (vs_ref-vs) is SN and d(vs_ref-vs)/dt is BN,

then idr_ref becomes ΒΝ.

If (vs_ref-vs) is BN,

then idr_ref becomes VBN.

Description of FCiqr.

The inputs of FCiqr are the signal (Pref-P) and its derivative, d(Pref-P) /dt.

Its output is the variation of the signal iqr_ref, Δiqr_ref.

The value of iqr_ref comes up by adding the successive values of Δiqr_ref.

Input (Pref-P) uses five fuzzy subsets: Big Negative (BN), Small Negative (SN), (ΟΚ), Small

Positive (SP), Big Positive (BP). Input d(Pref-P)/dt uses four fuzzy subsets: Big Negative (BN),

Small Negative (SN), Small Positive (SP), Big Positive (BP). Nine fuzzy substs are used for the

output iqr_ref: Very Big Negative (VBN), Big Negative (BN), Medium Negative (MN), Small


Positive (VBP). Gaussian membership functions are used for all fuzzy sets

The rules of FCiqr are the following:

If (Pref-P) is BP,

then iqr_ref becomes VBP.

If (Pref-P) is SP and d(Pref-P) /dt is BP,

then iqr_ref becomes BP.

If (Pref-P) is SP and d(Pref-P) /dt is SP,

then iqr_ref becomes MP.

If (Pref-P) is SP and d(Pref-P) /dt is SN,

then iqr_ref becomes OK.

If (Pref-P) is SP and d(Pref-P) /dt is BN,


CHAPTER 3

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If (Pref-P) is ΟΚ and d(Pref-P) /dt is BP,

then iqr_ref becomes SP.

If (Pref-P) is ΟΚ and d(Pref-P) /dt is SP,


If (Pref-P) is ΟΚ and d(Pref-P) /dt is SN,


If (Pref-P) is ΟΚ and d(Pref-P) /dt is BN,

then iqr_ref becomes SN.

If (Pref-P) is SN and d(Pref-P) /dt is BP,


If (Pref-P) is SN and d(Pref-P) /dt is SP,


If (Pref-P) is SN and d(Pref-P) /dt is SN,

then iqr_ref becomes MN.

If (Pref-P) is SN and d(Pref-P) /dt is BN,

then iqr_ref becomes BN.

If (Pref-P) is BN,

then iqr_ref becomes VBN

Respectively, the current controller of the rotor side controller produces the signals vdr and vqr.

This is achieved through FCvdr andFCvqr.

Description of FCvdr

The inputs of FCvdr are the signal (idr_ref-id) and its derivative, d(idr_ref-id)/dt.

Its output is the variation of the signal vdr, Δvdr.

The value of vdr comes up by adding the successive values of Δvdr.

Input (idr_ref-id) uses five fuzzy subsets: Big Negative (BN), Small Negative (SN), (ΟΚ), Small

Positive (SP), Big Positive (BP). Input d(idr_ref-id)/dt uses four fuzzy subsets: Big Negative (BN),


output vdr: Very Big Negative (VBN), Big Negative (BN), Medium Negative (MN), Small

CHAPTER 3

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Positive (VBP). Gaussian membership functions are used for all fuzzy sets.

The rules of FCvdr are the following:

If (idr_ref-idr) is BP,

then vdr becomes VBP.

If (idr_ref-idr) is SP and d(idr_ref-id)/dt is BP,

then vdr becomes BP.

If (idr_ref-idr) is SP and d(idr_ref-id)/dt is SP,

then vdr becomes MP.

If (idr_ref-idr) is SP and d(idr_ref-id)/dt is SP,

then vdr becomes OK.

If (idr_ref-idr) is SP and d(idr_ref-id)/dt is BN,


If (idr_ref-idr) is ΟΚ and d(idr_ref-id)/dt is BP,

then vdr becomes SP.

If (idr_ref-idr) is ΟΚ and d(idr_ref-id)/dt is SP,


If (idr_ref-idr) is ΟΚ and d(idr_ref-id)/dt is SN,


If (idr_ref-idr) is ΟΚ and d(idr_ref-id)/dt is BN,

then vdr becomes SN.

If (idr_ref-idr) is SN and d(idr_ref-id)/dt is BP,


If (idr_ref-idr) is SN and d(idr_ref-id)/dt is SP,


If (idr_ref-idr) is SN and d(idr_ref-id)/dt is SN,

then vdr becomes MN.

If (idr_ref-idr) is SN and d(idr_ref-id)/dt is BN,

then vdr becomes BN.

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If (idr_ref-idr) is BN,

then vdr becomes VBN.

Description of FCvqr.

The inputs of FCvqr are the signal (iqr_ref-iq) and its derivative, d(iqr_ref-iq)/dt.

Its output is the variation of the signal vqr, Δvqr.

The value of vqr comes up by adding the successive values of Δvqr.

Input (iqr_ref-iq) uses five fuzzy subsets: Big Negative (BN), Small Negative (SN), (ΟΚ), Small

Positive (SP), Big Positive (BP). Input d(iqr_ref-iq)/dt uses four fuzzy subsets: Big Negative (BN),


output vdr: Very Big Negative (VBN), Big Negative (BN), Medium Negative (MN), Small


Positive (VBP). Gaussian membership functions are used for all fuzzy sets.

The rules of FCvqr are the following:

If (iqr_ref-iqr) is BP,

then vqr becomes VBP.

If (iqr_ref-iqr) is SP and d(iqr_ref-iq)/dt is BP,

then vqr becomes BP.

If (iqr_ref-iqr) is SP and d(iqr_ref-iq)/dt is SP,

then vqr becomes MP.

If (iqr_ref-iqr) is SP and d(iqr_ref-iq)/dt is SP,

then vqr becomes OK.

If (iqr_ref-iqr) is SP and d(iqr_ref-iq)/dt is BN,


If (iqr_ref-iqr) is ΟΚ and d(iqr_ref-iq)/dt is BP,

then vqr becomes SP.

CHAPTER 3

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If (iqr_ref-iqr) is ΟΚ and d(iqr_ref-iq)/dt is SP,


If (iqr_ref-iqr) is ΟΚ and d(iqr_ref-iq)/dt is SN,


If (iqr_ref-iqr) is ΟΚ and d(iqr_ref-iq)/dt is BN,

then vqr becomes SN.

If (iqr_ref-iqr) is SN and d(iqr_ref-iq)/dt is BP,


If (iqr_ref-iqr) is SN and d(iqr_ref-iq)/dt is SP,


If (iqr_ref-iqr) is SN and d(iqr_ref-iq)/dt is SN,

then vqr becomes MN.

If (iqr_ref-iqr) is SN and d(iqr_ref-iq)/dt is BN,

then vqr becomes BN.

If (iqr_ref-iqr) is BN,

then vqr becomes VBN.

3.5.2 Design of the GSC Control System..

In Fig. 3.3 is shown that the dc Voltage Vdc is controlled through the signal idgc_ref and the reactive

power Qgc is controlled through the signal iqgc_ref. As it was previously mentioned, the GSC

control system is chosen to be reactive neutral by setting Qgc_ref=0. So, only the controllers

which produce the signals idgc and vdgc, FCidgc and FCvdgc, are described below.

Description of FCidgc.

The inputs of FCidgc are the signal (Vdc-Vdc_ref) and its derivative, d(Vdc-Vdc_ref)/dt.

Its output is the variation of the signal idgc_ref, Δidgc_ref.

The value of idgc_ref comes up by adding the successive values of Δidgc_ref.

CHAPTER 3

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Input (Vdc-Vdc_ref) uses five fuzzy subsets: Big Negative (BN), Small Negative (SN), (ΟΚ), Small

Positive (SP), Big Positive (BP). Input d(Vdc-Vdc_ref)/dt uses four fuzzy subsets: Big Negative

(BN), Small Negative (SN), Small Positive (SP), Big Positive (BP). Nine fuzzy subsets are used

for the output idgc_ref: Very Big Negative (VBN), Big Negative (BN), Medium Negative (MN),

Small Negative (SN), OK, Small Positive (SP), Medium Positive (MP), Big Positive (BP), Very

Big Positive (VBP). Gaussian membership functions are used for all fuzzy sets.

The rules of FCidgc are the following:

If (Vdc-Vdc_ref) is BP,

then idgc_ref becomes VBP.

If (Vdc-Vdc_ref) is SP and d(Vdc-Vdc_ref)/dt is BP,

then idgc_ref becomes BP.

If (Vdc-Vdc_ref) is SP and d(Vdc-Vdc_ref)/dt is SP,

then idgc_ref becomes MP.

If (Vdc-Vdc_ref) is SP and d(Vdc-Vdc_ref)/dt is SP,

then idgc_ref becomes OK.

If (Vdc-Vdc_ref) is SP and d(Vdc-Vdc_ref)/dt is BN,


If (Vdc-Vdc_ref) is ΟΚ and d(Vdc-Vdc_ref)/dt is BP,

then idgc_ref becomes SP.

If (Vdc-Vdc_ref) is ΟΚ and d(Vdc-Vdc_ref)/dt is SP,


If (Vdc-Vdc_ref) is ΟΚ and d(Vdc-Vdc_ref)/dt is SN,


If (Vdc-Vdc_ref) is ΟΚ and d(Vdc-Vdc_ref)/dt is BN,

then idgc_ref becomes SN.

If (Vdc-Vdc_ref) is SN and d(Vdc-Vdc_ref)/dt is BP,


If (Vdc-Vdc_ref) is SN and d(Vdc-Vdc_ref)/dt is SP,


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If (Vdc-Vdc_ref) is SN and d(Vdc-Vdc_ref)/dt is SN,

then idgc_ref becomes MN.

If (Vdc-Vdc_ref) is SN and d(Vdc-Vdc_ref)/dt is BN,

then idgc_ref becomes BN.

If (Vdc-Vdc_ref) is BN,

then idgc_ref becomes VBN.

Description of FCvdgc.

The inputs of FCvdgc are the signal (idgc_ref-idgc) and its derivative, d(idgc_ref-idgc)/dt.

Its output is the variation of the signal vdgc, Δvdgc.

The value of vdgc comes up by adding the successive values of Δvdgc.

Input (idgc_ref-idgc) uses five fuzzy subsets: Big Negative (BN), Small Negative (SN), (ΟΚ), Small

Positive (SP), Big Positive (BP). Input d(idgc_ref-idgc)/dt uses four fuzzy subsets: Big Negative

(BN), Small Negative (SN), Small Positive (SP), Big Positive (BP). Nine fuzzy subsets are used

for the output vdgc: Very Big Negative (VBN), Big Negative (BN), Medium Negative (MN),

Small Negative (SN), OK, Small Positive (SP), Medium Positive (MP), Big Positive (BP), Very

Big Positive (VBP). Gaussian membership functions are used for all fuzzy sets.

The rules of FCvdgc are the following:

If (idgc_ref-idgc) is BP,

then vdgc becomes VBP.

If (idgc_ref-idgc) is SP and d(idgc_ref-idgc)/dt is BP,

then vdgc becomes BP.

If (idgc_ref-idgc) is SP and d(idgc_ref-idgc)/dt is SP,

then vdgc becomes MP.

If (idgc_ref-idgc) is SP and d(idgc_ref-idgc)/dt is SP,

then vdgc becomes OK.

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If (idgc_ref-idgc) is SP and d(idgc_ref-idgc)/dt is BN,


If (idgc_ref-idgc) is ΟΚ and d(idgc_ref-idgc)/dt is BP,

then vdgc becomes SP.

If (idgc_ref-idgc) is ΟΚ and d(idgc_ref-idgc)/dt is SP,


If (idgc_ref-idgc) is ΟΚ and d(idgc_ref-idgc)/dt is SN,


If (idgc_ref-idgc) is ΟΚ and d(idgc_ref-idgc)/dt is BN,

then vdgc becomes SN.

If (idgc_ref-idgc) is SN and d(idgc_ref-idgc)/dt is BP,


If (idgc_ref-idgc) is SN and d(idgc_ref-idgc)/dt is SP,


If (idgc_ref-idgc) is SN and d(idgc_ref-idgc)/dt is SN,

then vdgc becomes MN.

If (idgc_ref-idgc) is SN and d(idgc_ref-idgc)/dt is BN,

then vdgc becomes BN.

If (idgc_ref-idgc) is BN,

then vdgc becomes VBN.

3.5.3 Design of the FCFRT.

As it was mentioned in 3.4, the inputs of the FC which achieves the FRT, FCFRT, are the

quantities Vdc*

and ir* whereas its output is the correction factor ucrf. Three subsets are used for

both inputs: Small (S), Medium (M) and Big (B), whereas five subsets are used for the output

ucrf: OK, Small Positive (SP), Big Positive (BP), Small Negative (SN) and Big Negative (BN).

Triangular Membership Functions (MFs) are selected for all fuzzy sets.

The rules of FCFRT are given below:

If Vdc* is S and ir

* is S, then ucrf becomes ΟΚ

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If Vdc* is S και ir

* is Μ, then ucrf becomes SP

If Vdc* is S and ir

* B, then ucrf becomes BP

If Vdc* is M and ir

* is S, then ucrf becomes SN

If Vdc* is M and ir

* is M, then ucrf becomes OK

If Vdc* is M and ir

* is B, then ucrf becomes SP

If Vdc* is B and ir

* is S, then ucrf becomes BN

If Vdc* is B and ir

* is M, then ucrf becomes SN

If Vdc* is B and ir

* is B, then ucrf becomes OK

As it was mentioned above, a GA- based approach is used to tune the MFs of FCFRT. This

approach is described above:

Before the GA is applied, the optimization problem is converted to a suitably described function,

called fitness function, which represents the performance of the solution to the problem. Each set

of variables for the given problem is encoded into a binary bit string, called chromosome. Such a

string is made up of sub-strings, called genes, which correspond to each different variable.

Several chromosomes representing different solutions comprise the population. In this case, 20

chromosomes each consisting of 18 genes are generated as the initial population, Fig. 3.5. The

first 16 genes are parameters related to the shape and the position of the membership functions

whereas the rest of the genes are related to the range of the output. In Figs. 3.6-3.8 is shown the

impact of the selected genes to the FCFRT MFs.

The GA starts the evaluation of each chromosome’s fitness. The repopulation of the next

generation is done using three operators: reproduction, crossover, and mutation. Through

reproduction, strings with high fitness (i.e. low value of the fitness function) receive multiple

copies in the next generation while strings with low fitness receive fewer or even none at all.

Crossover refers to taking a string, splitting it into two parts at a randomly generated crossover

point and recombining it with another string which has also been split at the same crossover

point. This procedure serves to promote change in the best strings which could give them even

higher fitness. Mutation is the random alteration of a bit in the string which assists in keeping

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diversity in the population. Finally, the new population replaces the old (initial) one. This

procedure continues until a specified termination condition is reached.

i1 i2 i3 i4

input ir*

v1 v2 v3 v4

input Vdc*

p4p3p2p1 p6p5

output ucrf

p8p7 pk

Fig. 3.5 Structure of a chromosome.

Fig. 3.6 Tuning of the input Vdc* MFs.

Fig. 3.7 Tuning of the input ir* MFs.

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Fig. 3.8 Tuning of output ucrf MFs.

The selected fitness function, which is to be minimized, is given by (3.11), where the indicator

max denotes the maximum value of the signal during the whole restoring period.

2 2

_ , _,max max

_ _ _ _

dc dc ss r r ss

dc mv dc ss r mv r ss

fitnessV V i i

V V i i

(3.11)

The reasons why (3.11) is chosen as the fitness function for the problem of the FRT of the

DFIG are the following:

i) Usually, an integral function is chosen as a fitness function in a wide range of problems to

be solved. When an integral is used, the target is the overall behavior of the system in a time

interval. On the contrary, in this case the target is to limit the instantaneous values of Vdc and ir in

order to avoid the tripping of the DFIG. Therefore, the selected function does not include any

integral, but a sum of the squared values of the quantities that have to be minimized.

ii) The target is not just a minimization of the two quantities but the specific “balance”

between them in order to retain both quantities below the acceptable values. This is the reason

why the squares of the two quantities are used.

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iii) The maximum deviations of Vdc and ir from their steady state values during the whole

restoring period are divided by their maximum acceptable deviations from their steady state

values, in order to use their normalized quantities in the fitness function.

A 3D graph for the FCFRT output ucrf as a function of Vdc* and ir*, after the GA optimization, is

shown in Fig. 3.9.

The concept of the proposed control system could be used in several sizes of machines. The rules

of the fuzzy controller, FCFRT, and the process of their optimization would be the same. The only

variation would be in the maximum values imposed by the manufacturer, used in the fitness

function.

Fig. 3.9 ucrf output of FCFRT after the GA optimization.

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3.6 Validation of the Control System

To validate the effectiveness of the proposed control strategy, a case study of a 1.5 MW DFIG

supplying a relatively weak electrical system (with Short Circuit Ratio equal to 2.23) is carried

out by simulation. The layout of the electrical system studied is depicted in Fig. 3.10.

Fig. 3.10 The electrical system studied.

Tables I and II show the parameters of the DFIG system and the ac grid system used in the

simulation tests, respectively.

Apart from the response of the proposed control system, the response of the conventional control

system is also cited in this paragraph. This is not done in order to compare the effectiveness of

the two systems, as a conventional control system would also require an auxiliary system to ride-

through the fault, presenting the drawbacks mentioned in Section I. The reason why the responses

of the two systems are cited together is to show that with the proposed modification of the

conventional control system, the DFIG manages to ameliorate its overall response during the

fault and post-fault periods and to successfully ride through the fault, without the use of any

auxiliary hardware. The paper concentrates on three phase symmetrical grid faults, since the term

"fault-ride-through capability" of national grid codes refer to this type of faults.

In the case study a three-phase fault takes place at t=0.5sec, resulting in a 85% depth of voltage

dip at the PCC, as imposed by the Greek Grid Code and several other grid codes around the

world. After 80ms the reclosers open to disconnect the faulted line and reclose after 200ms. The

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technical characteristics of these reclosers are those of the custom reclosers used in the Greek

national grid. The parameters of the electrical system are cited in Appendix II. The system has

been modeled and simulated in the Simulink toolbox extension of MATLAB. The modeling of

the FCs and their tuning via GA were realized using MATLAB Programming.

TABLE I: Parameters of the 1.5MW DFIG system

Rated power 1.5MW

Rated stator voltage 690V

Rated frequency 50Hz

Nominal wind speed 12m/s

Stator resistance 0.00706pu

Rotor resistance 0.005pu

Stator leakage inductance 0.1716pu

Rotor leakage inductance 0.156pu

Magnetizing inductance 2.9pu

Pole pairs 3

Stator/rotor turns ratio

Rotational Inertia

2.7

5.04s

Resistance of grid side coupling filter 0.0015pu

Reactance of grid side coupling filter 0.15pu

Nominal dc-link rated voltage 1200V

dc bus capacitor 60mF

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TABLE II: Parameters of the ac grid

Rated voltage 20kV

Rated frequency 50Hz

Short circuit ratio at the PCC 2.23

TRANSMISSION LINE PARAMETERS

Length

(km)

Positive

sequence

Impedance

(Ω/phase)

Zero sequence Impedance

(Ω/phase)

Line 1 15 16.47+j6.13 82.35+j20.26

Line 2 30 32.94+j12.25 164.70+j40.52

Line 3 15 16.47+j6.13 82.35+j20.26

Line 4 30 32.94+j12.25 164.70+j40.52

LOAD PARAMETERS

P(kW) Q(kVar)

Load 1 400 120

Load 2 500 150

Load 3 50 15

SYNCHRONOUS MACHINE PARAMETERS

Rated electrical frequency 50Hz

Rated voltage 400V

Rated power 85kVA

Rated speed 1500rpm

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The response of the system using the conventional control system is shown in Figs. 3.11(a)-(h),

whereas its response using the proposed control system is depicted in Figs. 3.12(a)-(j). As

illustrated in Figs. 3.11(a)-(h), when the conventional system is used, the dc voltage fluctuates

intensively above its maximum acceptable limit of 125% of its the rated value, endangering to

destroy the dc capacitor. Furthermore, the rotor current exceeds its maximum acceptable rating

(100% higher than the continuous current rating) which is imposed by the IGBTs of the RSC.

Finally, the overall response of the system is quite fluctuating, submitting the drive train to

great stress.

Consequently, this system needs a proper modification, in order to ride-through the fault and

ameliorate its performance during the fault and post-fault period.

On the contrary, as depicted in Figs. 3.12(a)-(j), when the “Fault Detection and Confrontation

System” is used, all the above fluctuations are alleviated and the system reaches sooner its steady

state. Through the optimal coordination of the two converters, the FRT of the DFIG is achieved,

as the overcurrents at the rotor windings and the dc-link overvoltages are effectively constrained

below their maximum acceptable values. In addition, the dc link fluctuations are effectively

attenuated, so the stressing and the possible destruction of the dc capacitor are avoided.

Fig 3.12 (f) shows the WT output reactive power. As mentioned in the introduction, using the

proposed method, the rotor side converter is not disabled during the fault, so it is possible to

supply reactive power to the grid in order to support the voltage recovery, as imposed by several

grid codes. In the case studied, the grid voltage, being supported by the proposed control system,

recovers quickly, so there is no need for large amounts of reactive power from the DFIG after the

fault. However, it is obvious that while the ac voltage remains below its reference value, the

DFIG delivers the required amount of reactive power to the grid, in order to support the grid

voltage.

During the fault, the voltage drops, so the power from the wind that is not dissipated to the grid is

stored as kinetic energy to the rotor. The rotor of the WT, having a big mass, has a high

capability to store energy. Due to this fact, its speed rises. This can be depicted by Fig. 3.12(g),

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where the rotor speed is illustrated. When the fault duration ends, this energy is sent to the grid as

electrical power, so the rotor speed gradually turns back to its pre-fault value.

Finally, in Figs 3.11 (h) and 3.12 (h) is shown the q-component of the rotor voltage, vqr, whereas

in Fig. 3.12 (i) is illustrated the signal vqr΄, which is the signal vqr modified by the “Fault

Detection and Confrontation System”.

At t=1s a transient behavior can be observed. This transient is caused by the steady state control

system, not by the Fault Detection and Confrontation System. In this work, no effort was made in

order to optimize the steady state control system, as the subject of the paper emphasizes only on

the confrontation of the faults. In fact, the steady state controller induces this transient at the

moment where the ac voltage, which has started dropping gradually after the post fault period,

goes below its reference value. This controller takes a very quick action in order to bring the ac

voltage back to its reference value, causing the above mentioned transient. Probably this transient

would be avoided, if the controller had been optimized. However, this optimization gets off the

subject of the proposed control system.

The fitness function described in (3.11) is not optimized just for the case shown in Fig. 3.12, but

for a variety of fault cases leading to 85% voltage dip. As mentioned above, this limit is imposed

by the Greek Grid Code and coincides with the voltage limit of several other Grid Codes around

the world. For the case of a bigger voltage dip, the DFIG is allowed to disconnect. This is why

we have only studied cases that lead to 85% voltage dip. This is the worst case scenario while

being connected to the grid. Although, in order to prove that the system is also effective under

other operating conditions, we cite a case study where a fault takes place under 10m/s wind speed

(which corresponds to 1 MW output power) and leads to 85 % voltage dip. Apparently, the

selected fault resistance which is used by the simulation is now different from the previous case,

in order to cause the same dip. As shown in Fig. 3.13, in this case too, the proposed control

system manages to effectively ride-through the fault.

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(a) Three phase voltage at the PCC

(b) dc-link Voltage

(c) rotor current

Fig. 3.11 Response of the system without the "fault detection and confrontation system"

(wind speed 12m/s).

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(d) stator current

(e) WT output active power

(f) WT output reactive power

Fig. 3.11 (continued) Response of the system without the "fault detection and confrontation

system" (wind speed 12m/s).

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(g) Rotor speed

(h) The signal vqr.

Fig. 3.11 (continued) Response of the system without the "fault detection and confrontation

system" (wind speed 12m/s).

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(a) Three phase stator voltage

(b) dc-link Voltage

(c) rotor current

Fig. 3.12 Response of the system using the "fault detection and confrontation system

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(wind speed 12m/s).

(d) stator current

(e) WT output active power

(f) WT output reactive power

Fig. 3.12 (continued)Response of the system using the "fault detection and confrontation system

(wind speed 12m/s).

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(g) Rotor speed

(h) The signal vqr

(i) The signal vqr΄

Fig. 3.12 (continued)Response of the system using the "fault detection and confrontation system

(wind speed 12m/s).

CHAPTER 3

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(a) Three phase stator voltage

(b) dc-link Voltage

(c) rotor current

Fig. 3.13 Response of the system using the "fault detection and confrontation system"

(wind speed 10m/s).

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(d) WT output active power

(e) WT output reactive power

Fig. 3.13(continued) Response of the system using the "fault detection and confrontation system"

(wind speed 10m/s).

CHAPTER 3

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